static int qcom_a53pll_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct regmap *regmap;
struct resource *res;
struct clk_pll *pll;
void __iomem *base;
struct clk_init_data init = { };
int ret;
pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL);
if (!pll)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(dev, res);
if (IS_ERR(base))
return PTR_ERR(base);
regmap = devm_regmap_init_mmio(dev, base, &a53pll_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
pll->l_reg = 0x04;
pll->m_reg = 0x08;
pll->n_reg = 0x0c;
pll->config_reg = 0x14;
pll->mode_reg = 0x00;
pll->status_reg = 0x1c;
pll->status_bit = 16;
pll->freq_tbl = a53pll_freq;
init.name = "a53pll";
init.parent_names = (const char *[]){ "xo" };
init.num_parents = 1;
init.ops = &clk_pll_sr2_ops;
init.flags = CLK_IS_CRITICAL;
pll->clkr.hw.init = &init;
ret = devm_clk_register_regmap(dev, &pll->clkr);
if (ret) {
dev_err(dev, "failed to register regmap clock: %d\n", ret);
return ret;
}
ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
&pll->clkr.hw);
if (ret) {
dev_err(dev, "failed to add clock provider: %d\n", ret);
return ret;
}
return 0;
}
static const struct of_device_id qcom_a53pll_match_table[] = {
{ .compatible = "qcom,msm8916-a53pll" },
{ }
};
int qcom_cc_really_probe(struct platform_device *pdev,
const struct qcom_cc_desc *desc, struct regmap *regmap)
{
int i, ret;
struct device *dev = &pdev->dev;
struct clk *clk;
struct clk_onecell_data *data;
struct clk **clks;
struct qcom_reset_controller *reset;
struct qcom_cc *cc;
size_t num_clks = desc->num_clks;
struct clk_regmap **rclks = desc->clks;
cc = devm_kzalloc(dev, sizeof(*cc) + sizeof(*clks) * num_clks,
GFP_KERNEL);
if (!cc)
return -ENOMEM;
clks = cc->clks;
data = &cc->data;
data->clks = clks;
data->clk_num = num_clks;
for (i = 0; i < num_clks; i++) {
if (!rclks[i]) {
clks[i] = ERR_PTR(-ENOENT);
continue;
}
clk = devm_clk_register_regmap(dev, rclks[i]);
if (IS_ERR(clk))
return PTR_ERR(clk);
clks[i] = clk;
}
ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, data);
if (ret)
return ret;
reset = &cc->reset;
reset->rcdev.of_node = dev->of_node;
reset->rcdev.ops = &qcom_reset_ops;
reset->rcdev.owner = dev->driver->owner;
reset->rcdev.nr_resets = desc->num_resets;
reset->regmap = regmap;
reset->reset_map = desc->resets;
platform_set_drvdata(pdev, &reset->rcdev);
ret = reset_controller_register(&reset->rcdev);
if (ret)
of_clk_del_provider(dev->of_node);
return ret;
}
static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device *parent = dev->parent;
struct clk_regmap_mux_div *a53cc;
struct regmap *regmap;
struct clk_init_data init = { };
int ret = -ENODEV;
regmap = dev_get_regmap(parent, NULL);
if (!regmap) {
dev_err(dev, "failed to get regmap: %d\n", ret);
return ret;
}
a53cc = devm_kzalloc(dev, sizeof(*a53cc), GFP_KERNEL);
if (!a53cc)
return -ENOMEM;
init.name = "a53mux";
init.parent_names = gpll0_a53cc;
init.num_parents = ARRAY_SIZE(gpll0_a53cc);
init.ops = &clk_regmap_mux_div_ops;
init.flags = CLK_SET_RATE_PARENT;
a53cc->clkr.hw.init = &init;
a53cc->clkr.regmap = regmap;
a53cc->reg_offset = 0x50;
a53cc->hid_width = 5;
a53cc->hid_shift = 0;
a53cc->src_width = 3;
a53cc->src_shift = 8;
a53cc->parent_map = gpll0_a53cc_map;
a53cc->pclk = devm_clk_get(parent, NULL);
if (IS_ERR(a53cc->pclk)) {
ret = PTR_ERR(a53cc->pclk);
dev_err(dev, "failed to get clk: %d\n", ret);
return ret;
}
a53cc->clk_nb.notifier_call = a53cc_notifier_cb;
ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb);
if (ret) {
dev_err(dev, "failed to register clock notifier: %d\n", ret);
return ret;
}
ret = devm_clk_register_regmap(dev, &a53cc->clkr);
if (ret) {
dev_err(dev, "failed to register regmap clock: %d\n", ret);
goto err;
}
ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
&a53cc->clkr.hw);
if (ret) {
dev_err(dev, "failed to add clock provider: %d\n", ret);
goto err;
}
platform_set_drvdata(pdev, a53cc);
return 0;
err:
clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
return ret;
}
