static int df_config (const char *key, const char *value)
{
df_init ();
if (strcasecmp (key, "Device") == 0)
{
if (ignorelist_add (il_device, value))
return (1);
return (0);
}
else if (strcasecmp (key, "MountPoint") == 0)
{
if (ignorelist_add (il_mountpoint, value))
return (1);
return (0);
}
else if (strcasecmp (key, "FSType") == 0)
{
if (ignorelist_add (il_fstype, value))
return (1);
return (0);
}
else if (strcasecmp (key, "IgnoreSelected") == 0)
{
if (IS_TRUE (value))
{
ignorelist_set_invert (il_device, 0);
ignorelist_set_invert (il_mountpoint, 0);
ignorelist_set_invert (il_fstype, 0);
}
else
{
ignorelist_set_invert (il_device, 1);
ignorelist_set_invert (il_mountpoint, 1);
ignorelist_set_invert (il_fstype, 1);
}
return (0);
}
else if (strcasecmp (key, "ReportByDevice") == 0)
{
if (IS_TRUE (value))
by_device = 1;
return (0);
}
else if (strcasecmp (key, "ReportInodes") == 0)
{
if (IS_TRUE (value))
report_inodes = 1;
else
report_inodes = 0;
return (0);
}
return (-1);
}
static void
web_main (void)
{
struct df *df;
struct web_entry *def_entry;
struct web_entry *use_entry;
unsigned int i;
int max = max_reg_num ();
char *used;
df = df_init (DF_EQUIV_NOTES);
df_chain_add_problem (df, DF_UD_CHAIN);
df_analyze (df);
df_reorganize_refs (&df->def_info);
df_reorganize_refs (&df->use_info);
def_entry = XCNEWVEC (struct web_entry, DF_DEFS_SIZE (df));
use_entry = XCNEWVEC (struct web_entry, DF_USES_SIZE (df));
used = XCNEWVEC (char, max);
if (dump_file)
df_dump (df, dump_file);
/* Produce the web. */
for (i = 0; i < DF_USES_SIZE (df); i++)
union_defs (df, DF_USES_GET (df, i), def_entry, use_entry, unionfind_union);
/* Update the instruction stream, allocating new registers for split pseudos
in progress. */
for (i = 0; i < DF_USES_SIZE (df); i++)
replace_ref (DF_USES_GET (df, i),
entry_register (use_entry + i, DF_USES_GET (df, i), used));
for (i = 0; i < DF_DEFS_SIZE (df); i++)
replace_ref (DF_DEFS_GET (df, i),
entry_register (def_entry + i, DF_DEFS_GET (df, i), used));
/* Dataflow information is corrupt here, but it can be easily updated
by creating new entries for new registers and updates or calling
df_insns_modify. */
free (def_entry);
free (use_entry);
free (used);
df_finish (df);
df = NULL;
}
static int df_config (const char *key, const char *value)
{
df_init ();
if (strcasecmp (key, "Device") == 0)
{
if (ignorelist_add (il_device, value))
return (1);
return (0);
}
else if (strcasecmp (key, "MountPoint") == 0)
{
if (ignorelist_add (il_mountpoint, value))
return (1);
return (0);
}
else if (strcasecmp (key, "FSType") == 0)
{
if (ignorelist_add (il_fstype, value))
return (1);
return (0);
}
else if (strcasecmp (key, "IgnoreSelected") == 0)
{
if ((strcasecmp (value, "True") == 0)
|| (strcasecmp (value, "Yes") == 0)
|| (strcasecmp (value, "On") == 0))
{
ignorelist_set_invert (il_device, 0);
ignorelist_set_invert (il_mountpoint, 0);
ignorelist_set_invert (il_fstype, 0);
}
else
{
ignorelist_set_invert (il_device, 1);
ignorelist_set_invert (il_mountpoint, 1);
ignorelist_set_invert (il_fstype, 1);
}
return (0);
}
return (-1);
}
void
web_main (void)
{
struct df *df;
struct web_entry *def_entry;
struct web_entry *use_entry;
unsigned int i;
int max = max_reg_num ();
char *used;
df = df_init ();
df_analyze (df, 0, DF_UD_CHAIN | DF_EQUIV_NOTES);
def_entry = xcalloc (df->n_defs, sizeof (struct web_entry));
use_entry = xcalloc (df->n_uses, sizeof (struct web_entry));
used = xcalloc (max, sizeof (char));
if (dump_file)
df_dump (df, DF_UD_CHAIN | DF_DU_CHAIN, dump_file);
/* Produce the web. */
for (i = 0; i < df->n_uses; i++)
union_defs (df, df->uses[i], def_entry, use_entry);
/* Update the instruction stream, allocating new registers for split pseudos
in progress. */
for (i = 0; i < df->n_uses; i++)
replace_ref (df->uses[i], entry_register (use_entry + i, df->uses[i],
used));
for (i = 0; i < df->n_defs; i++)
replace_ref (df->defs[i], entry_register (def_entry + i, df->defs[i],
used));
/* Dataflow information is corrupt here, but it can be easily updated
by creating new entries for new registers and updates or calling
df_insns_modify. */
free (def_entry);
free (use_entry);
free (used);
df_finish (df);
}
static int do_df(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const char *cmd;
/* need at least two arguments */
if (argc < 2)
goto usage;
cmd = argv[1];
if (strcmp(cmd, "init") == 0) {
df_init(0, 0, 1000000);
return 0;
}
if (strcmp(cmd, "info") == 0) {
df_show_info();
return 0;
}
usage:
return CMD_RET_USAGE;
}
void main(void) {
#else
int main(void) {
#endif
uint32_t blcc;
// Prevent optimizing of bootloader revision in progmem
volatile uint16_t tmp2 = ATmega3290p_bl_rev;
// Disable watchdog
watchdog_disable();
// Configuring LCD with Extern clock (TOSC, 32.768kHz)
// 32786 Hz 32786 Hz
// frame_rate = ------------------ = ------------- = 32 Hz
// 8 * .prescl * .div 8 * 16 * 8
//
lcd_config_t lcd_config = LCD_DEFAULT_CONFIG;
// Initialization
if (true != avr_init()) { // Generic MCU initialization
error_handler();
} else if (df_init() != 0) { // Data flash initialization
error_handler();
} else if (lcd_init(lcd_config) != 0) { // Display
error_handler();
} else if (led_init() != 0) { // Led
error_handler();
}
/* start timer 2*/
ASSR |= (1<<AS2); // Asynchronous operation
TCCR2A &= ~((1<<CS22)|(1<<CS21)|(1<<CS20));
TCCR2A |= (1<<CS20);
// Check shorting of "Factory default pins"
uint8_t prr = PRR;
PRR &= ~(1 << PRADC);
DIDR1 &= ~((1 << AIN1D)|(1 << AIN0D));
PRR = prr;
BOOT_DDR |= (1 << BOOT_TX); // Tx output
BOOT_PORT &= ~(1 << BOOT_TX); // Tx low
BOOT_DDR &= ~(1 << BOOT_RX); // Rx input
BOOT_PORT |= (1 << BOOT_RX); // Rx pullup on
if ((BOOT_PIN & (1 << BOOT_RX)) != (1 << BOOT_RX)) { // Rx pin low?
/* Check that RX goes high when TX is pulled high. */
BOOT_PORT |= (1 << BOOT_TX); // Set Tx high
nop();
nop();
nop();
nop();
if ((BOOT_PIN & (1 << BOOT_RX)) == (1 << BOOT_RX)) { // Rx high?
intvecs_to_boot(); // move interrutp vectors to boot section, and start boot loader
sei();
// Check supply voltage
if (supply_voltage_read() < 2600) {
lcd_puts("LOW BAT");
error_handler();
}
BLCC_WRITE(BLCC_NORMAL_APP_START); // write communication channel in case abnormal exit of boot loader (power off etc.)
lcd_symbol_set(LCD_SYMBOL_RAVEN);
lcd_puts("WRITING");
led_status_set(LED_FAST_BLINK);
do_fw_upgrade(M3290P_FLASH_FD_IMG_ADR);
// Signal ATmega3290p application program that FW upgrade is complete
// This makes the application program continue upgrade ATmega1284p after booting
BLCC_WRITE(BLCC_LOAD_FACTORY_DEFAULT);
app_start(); // start application program
}
}
// Read bootloader communication channel in EEPROM and take proper action
BLCC_READ(blcc);
if (blcc == BLCC_FW_UPGRADE_START_REQUEST_FROM_APP) {
intvecs_to_boot(); // move interrutp vectors to boot section, and start boot loader
sei();
// Check supply voltage
if (supply_voltage_read() < 2600) {
lcd_puts("LOW BAT");
error_handler();
}
BLCC_WRITE(BLCC_NORMAL_APP_START); // write communication channel in case abnormal exit of boot loader (power off etc.)
lcd_symbol_set(LCD_SYMBOL_RAVEN);
lcd_puts("WRITING");
led_status_set(LED_FAST_BLINK);
do_fw_upgrade(M3290P_FLASH_USR_IMG_ADR);
// Signal ATmega3290p application program that FW upgrade is complete
BLCC_WRITE(BLCC_FW_UPGRADE_COMPLETE);
reboot();
} else if (blcc == BLCC_FW_UPGRADE_COMPLETE) {
BLCC_WRITE(BLCC_FW_UPGRADE_COMPLETE);
sei();
app_start(); // start application program
} else if (blcc == BLCC_RESTART_REQUEST_FROM_APP) {
/* Start application program*/
BLCC_WRITE(BLCC_NORMAL_APP_START);
sei();
app_start();
} else {
/*else, start application program*/
BLCC_WRITE(BLCC_NORMAL_APP_START);
sei();
app_start();
}
}
int
main(void)
{
wdt_enable(WDTO_2S);
clock_prescale_set(clock_div_1); // Disable Clock Division
// if we had been restarted by watchdog check the REQ BootLoader byte in the
// EEPROM ...
if (bit_is_set(MCUSR,WDRF) && erb(EE_REQBL)) {
ewb( EE_REQBL, 0 ); // clear flag
start_bootloader();
}
// Setup the timers. Are needed for watchdog-reset
OCR0A = 249; // Timer0: 0.008s = 8MHz/256/250
TCCR0B = _BV(CS02);
TCCR0A = _BV(WGM01);
TIMSK0 = _BV(OCIE0A);
TCCR1A = 0;
TCCR1B = _BV(CS11) | _BV(WGM12); // Timer1: 1us = 8MHz/8
#ifdef CURV3
// Timer3 is used by the LCD backlight (PWM)
TCCR3A = _BV(COM3A1)| _BV(WGM30); // Fast PWM, 8-bit, clear on match
TCCR3B = _BV(WGM32) | _BV(CS31); // Prescaler 8MHz/8: 3.9KHz
#endif
MCUSR &= ~(1 << WDRF); // Enable the watchdog
led_init();
spi_init();
eeprom_init();
USB_Init();
fht_init();
tx_init();
joy_init(); // lcd init is done manually from menu_init
bat_init();
df_init(&df);
fs_init(&fs, df, 0); // needs df_init
rtc_init(); // does i2c_init too
log_init(); // needs fs_init & rtc_init
menu_init(); // needs fs_init
input_handle_func = analyze_ttydata;
log_enabled = erb(EE_LOGENABLED);
display_channel = DISPLAY_USB|DISPLAY_LCD|DISPLAY_RFROUTER;
rf_router_init();
checkFrequency();
LED_OFF();
for(;;) {
USB_USBTask();
CDC_Task();
RfAnalyze_Task();
Minute_Task();
FastRF_Task();
rf_router_task();
JOY_Task();
}
}
int
main(void)
{
//ewb((uint8_t*)0x80, erb((uint8_t*)0x80)+1);
wdt_enable(WDTO_2S); // Avoid an early reboot
clock_prescale_set(clock_div_1); // Disable Clock Division:1->8MHz
#ifdef HAS_XRAM
init_memory_mapped(); // First initialize the RAM
#endif
// if we had been restarted by watchdog check the REQ BootLoader byte in the
// EEPROM
if(bit_is_set(MCUSR,WDRF) && erb(EE_REQBL)) {
ewb( EE_REQBL, 0 ); // clear flag
start_bootloader();
}
while(tx_report); // reboot if the bss is not initialized
// Setup the timers. Are needed for watchdog-reset
OCR0A = 249; // Timer0: 0.008s = 8MHz/256/250
TCCR0B = _BV(CS02);
TCCR0A = _BV(WGM01);
TIMSK0 = _BV(OCIE0A);
TCCR1A = 0;
TCCR1B = _BV(CS11) | _BV(WGM12); // Timer1: 1us = 8MHz/8
MCUSR &= ~(1 << WDRF); // Enable the watchdog
led_init(); // So we can debug
spi_init();
eeprom_init();
USB_Init();
fht_init();
tx_init();
ethernet_init();
#ifdef HAS_FS
df_init(&df);
fs_init(&fs, df, 0); // needs df_init
log_init(); // needs fs_init & rtc_init
log_enabled = erb(EE_LOGENABLED);
#endif
input_handle_func = analyze_ttydata;
display_channel = DISPLAY_USB;
LED_OFF();
for(;;) {
USB_USBTask();
CDC_Task();
RfAnalyze_Task();
Minute_Task();
FastRF_Task();
rf_router_task();
#ifdef HAS_ASKSIN
rf_asksin_task();
#endif
#ifdef HAS_ETHERNET
Ethernet_Task();
#endif
}
}
