__s32 DDC_Read(char cmd,char pointer,char offset,int nbyte,char * pbuf)
{
#if 0
char i=0;
char n=0;
char off = offset;
__u32 wait_ms;
__inf("DDC_Read\n");
while(nbyte >0)
{
if(nbyte > 16)
n = 16;
else
n = nbyte;
nbyte = nbyte -n;
HDMI_WUINT32(0x518,HDMI_RUINT32(0x518)| 0x00008000); //FIFO address clear
HDMI_WUINT8(0x50f,pointer ); //segment pointer
HDMI_WUINT8(0x50d,off ); //offset address
HDMI_WUINT32(0x508,(n<<16) +cmd); //nbyte to access and cmd type
HDMI_WUINT32(0x500,HDMI_RUINT32(0x500)| 0x08000000); //start the command
off += n;
wait_ms = 0;
while(HDMI_RUINT32(0x500) & 0x08000000)
{
disp_delay_ms(1);
wait_ms ++;
if(wait_ms > 1000)
{
__wrn("ddc read timeout\n");
return -1;
}
}
i=0;
while(i<n)
{
* pbuf ++ = HDMI_RUINT8(0x580);
i++;
}
}
#endif
return 0;
}
__s32 hdmi_core_initial(void)
{
hdmi_state = HDMI_State_Idle;
video_mode = HDMI720P_50;
memset(&audio_info,0,sizeof(HDMI_AUDIO_INFO));
memset(Device_Support_VIC,0,sizeof(Device_Support_VIC));
HDMI_WUINT32(0x004,0x80000000); //start hdmi controller
HDMI_WUINT32(0x208,((__u32)1<<31)+ (0<<30)+ (1<<29)+ (3<<27)+ (0<<26)+
(1<<25)+ (0<<24)+ (0<<23)+ (4<<20)+ (4<<17)+
(10<<12)+ (3<<8)+ ((4-1)<<4)+(8<<0) );
// tx driver setting
HDMI_WUINT32(0x200,0x60000000); //bias en
disp_delay_ms(1);
HDMI_WUINT32(0x200,0x7e80000f);
HDMI_WUINT32(0x204,0x01ded070);
return 0;
}
__s32 main_Hpd_Check(void)
{
__s32 i,times_0 = 0,times_1 = 0;
for(i=0; i<3; i++)
{
disp_delay_ms(10);
if( HDMI_RUINT32(0x00c)&0x01)
{
times_1++;
}
else
{
times_0++;
}
}
if(times_1 == 3)
return 1;
if(times_0 == 3)
return 0;
return HPD;
}
int board_display_device_open(void)
{
#if (defined CONFIG_ARCH_SUN8IW5P1)
int ret = 0;
__u32 output_type = 0;
unsigned long arg[4] = {0};
output_type = DISP_OUTPUT_TYPE_LCD;
if(output_type == DISP_OUTPUT_TYPE_LCD)
{
debug("lcd open\n");
arg[0] = screen_id;
arg[1] = 0;
arg[2] = 0;
ret = disp_ioctl(NULL, DISP_CMD_LCD_ENABLE, (void*)arg);
debug("lcd open,ret=%d\n",ret);
}
else if(output_type == DISP_OUTPUT_TYPE_HDMI)
{
}
#else
int value = 1;
int ret = 0;
__u32 output_type = 0;
__u32 output_mode = 0;
__u32 auto_hpd = 0;
__u32 err_count = 0;
unsigned long arg[4] = {0};
int i;
debug("De_OpenDevice\n");
//channel
if(script_parser_fetch("boot_disp", "output_disp", &value, 1) < 0)
{
tick_printf("fetch script data boot_disp.output_disp fail\n");
err_count ++;
value = 0;
}
else
{
tick_printf("boot_disp.output_disp=%d\n", value);
screen_id = value;
}
//screen0_output_type
if(script_parser_fetch("boot_disp", "output_type", &value, 1) < 0)
{
tick_printf("fetch script data boot_disp.output_type fail\n");
err_count ++;
value = 0;
}
else
{
tick_printf("boot_disp.output_type=%d\n", value);
}
if(value == 0)
{
output_type = DISP_OUTPUT_TYPE_NONE;
}
else if(value == 1)
{
output_type = DISP_OUTPUT_TYPE_LCD;
}
else if(value == 2)
{
output_type = DISP_OUTPUT_TYPE_TV;
}
else if(value == 3)
{
output_type = DISP_OUTPUT_TYPE_HDMI;
}
else if(value == 4)
{
output_type = DISP_OUTPUT_TYPE_VGA;
}
else
{
tick_printf("invalid screen0_output_type %d\n", value);
return -1;
}
//screen0_output_mode
if(script_parser_fetch("boot_disp", "output_mode", &value, 1) < 0)
{
tick_printf("fetch script data boot_disp.output_mode fail\n");
err_count ++;
value = 0;
}
else
{
tick_printf("boot_disp.output_mode=%d\n", value);
}
if(output_type == DISP_OUTPUT_TYPE_TV || output_type == DISP_OUTPUT_TYPE_HDMI)
{
output_mode = value;
}
else if(output_type == DISP_OUTPUT_TYPE_VGA)
{
output_mode = value;
}
//auto hot plug detect
if(script_parser_fetch("boot_disp", "auto_hpd", &value, 1) < 0)
{
tick_printf("fetch script data boot_disp.auto_hpd fail\n");
err_count ++;
value = 0;
}else
{
auto_hpd = value;
tick_printf("boot_disp.auto_hpd=%d\n", value);
}
if(err_count == 4)//no boot_disp config
{
if(script_parser_fetch("lcd0_para", "lcd_used", &value, 1) < 0)
{
tick_printf("fetch script data lcd0_para.lcd_used fail\n");
value = 0;
}else
{
tick_printf("lcd0_para.lcd_used=%d\n", value);
}
if(value == 1) //lcd available
{
output_type = DISP_OUTPUT_TYPE_LCD;
}
else
{
arg[0] = screen_id;
arg[1] = 0;
arg[2] = 0;
ret = 0;
for(i=0; (i<3)&&(ret==0); i++)
{
#if defined(CONFIG_VIDEO_SUNXI_V1) || defined(CONFIG_VIDEO_SUNXI_V2)
ret = disp_ioctl(NULL, DISP_CMD_HDMI_GET_HPD_STATUS, (void*)arg);
#endif
}
if(ret == 1)
{
output_type = DISP_OUTPUT_TYPE_HDMI;
//output_mode = (output_mode == -1)? DISP_TV_MOD_720P_50HZ:output_mode;
output_mode = DISP_TV_MOD_720P_50HZ;
}
}
}
else//has boot_disp config
{
if(output_type == DISP_OUTPUT_TYPE_LCD)
{
}
else if(auto_hpd == 1)
{
arg[0] = screen_id;
arg[1] = 0;
for(i=0; (i<3)&&(ret==0); i++)
{
#if defined(CONFIG_VIDEO_SUNXI_V1) || defined(CONFIG_VIDEO_SUNXI_V2)
ret=disp_ioctl(NULL, DISP_CMD_HDMI_GET_HPD_STATUS, (void*)arg);
debug("hdmi pending%d\n",i);
// disp_delay_ms(200);
#endif
}
if (ret == 1)
{
output_type = DISP_OUTPUT_TYPE_HDMI;
output_mode = (output_mode == -1)? DISP_TV_MOD_720P_50HZ:output_mode;
//output_mode = DISP_TV_MOD_1080P_60HZ;
debug("------DISP_OUTPUT_TYPE_HDMI-----\n");
}
else
{
#if defined(CONFIG_VIDEO_SUNXI_V1)
ret = 0;
arg[0] = screen_id;
arg[1] = 0;
for(i=0; (i<6)&&(ret==0); i++)
{
debug("%d\n",i);
ret = disp_ioctl(NULL, DISP_CMD_TV_GET_INTERFACE, (void*)arg);
disp_delay_ms(200);
}
debug("tv detect, ret = %d\n", ret);
if((ret & DISP_TV_CVBS) == DISP_TV_CVBS)
{
output_type = DISP_OUTPUT_TYPE_TV;
output_mode = DISP_TV_MOD_PAL;
debug("------DISP_TV_CVBS-----\n");
}else if((ret & DISP_TV_YPBPR) == DISP_TV_YPBPR)
{
output_type = DISP_OUTPUT_TYPE_VGA;
output_mode = DISP_VGA_H1024_V768;
debug("------DISP_TV_YPBPR-----\n");
}else
{
output_type = DISP_OUTPUT_TYPE_NONE;
debug("------DISP_OUTPUT_TYPE_NONE-----\n");
}
#endif
}
}
}
#if !defined(CONFIG_VIDEO_SUNXI_V3)
if(output_type == DISP_OUTPUT_TYPE_LCD)
{
printf("lcd open\n");
arg[0] = screen_id;
arg[1] = 0;
arg[2] = 0;
#if !(defined CONFIG_ARCH_SUN9IW1P1) && !(defined CONFIG_ARCH_SUN8IW8P1)&& !(defined CONFIG_ARCH_SUN8IW7P1)
ret = disp_ioctl(NULL, DISP_CMD_LCD_ON, (void*)arg);
#else
ret = disp_ioctl(NULL, DISP_CMD_LCD_ENABLE, (void*)arg);
#endif
debug("lcd open,ret=%d\n",ret);
}
else if(output_type == DISP_OUTPUT_TYPE_HDMI)
{
printf("hdmi open\n");
arg[0] = screen_id;
arg[1] = output_mode;
arg[2] = 0;
#if !(defined CONFIG_ARCH_SUN9IW1P1) && !(defined CONFIG_ARCH_SUN8IW8P1)&& !(defined CONFIG_ARCH_SUN8IW7P1)
disp_ioctl(NULL, DISP_CMD_HDMI_SET_MODE, (void *)arg);
ret = disp_ioctl(NULL, DISP_CMD_HDMI_ON, (void *)arg);
#else
disp_ioctl(NULL, DISP_CMD_HDMI_SET_MODE, (void *)arg);
ret = disp_ioctl(NULL, DISP_CMD_HDMI_ENABLE, (void *)arg);
#endif
}
#if defined(CONFIG_VIDEO_SUNXI_V1)
else if(output_type == DISP_OUTPUT_TYPE_TV)
{
printf("tv open\n");
//udelay(1000*1000*10);
arg[0] = screen_id;
arg[1] = output_mode;
arg[2] = 0;
disp_ioctl(NULL, DISP_CMD_TV_SET_MODE, (void *)arg);
ret = disp_ioctl(NULL, DISP_CMD_TV_ON, (void *)arg);
}
else if(output_type == DISP_OUTPUT_TYPE_VGA)
{
printf("vga open\n");
//udelay(1000*200);
arg[0] = screen_id;
arg[1] = output_mode;
arg[2] = 0;
disp_ioctl(NULL, DISP_CMD_VGA_SET_MODE, (void *)arg);
ret = disp_ioctl(NULL, DISP_CMD_VGA_ON, (void *)arg);
}
#endif // !(defined CONFIG_ARCH_SUN9IW1P1)
#else
/* CONFIG_VIDEO_SUNXI_V3 */
arg[0] = screen_id;
arg[1] = output_type;
arg[2] = output_mode;
disp_ioctl(NULL, DISP_DEVICE_SWITCH, (void *)arg);
#endif // !CONFIG_VIDEO_SUNXI_V3
#endif // CONFIG_ARCH_SUN8IW5P1
return ret;
}
