コード例 #1
0
ファイル: ddp_wdma.c プロジェクト: CobraJet93/kernel-3.10.54
int WDMAReset(unsigned idx) {
    unsigned int delay_cnt = 0;
    static unsigned int wdma_timeout_cnt = 0;
    
    //WDMA_RST = 0x00;
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_RST , 0x01);            // soft reset
    while((DISP_REG_GET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_FLOW_CTRL_DBG)&0x1) != 0x1)
    {
         delay_cnt++;
         if(delay_cnt>10000)
         {
             printk("[DDP] error, WDMAReset(%d) timeout! wdma_timeout_cnt=%d \n", idx, wdma_timeout_cnt++);
             WDMADumpHidenReg(idx);
             disp_dump_reg(DISP_MODULE_WDMA0);
             smi_dumpDebugMsg();
             break;
         }
    }
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_RST , 0x00);
    
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_CFG , 0x00);
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_SRC_SIZE , 0x00);
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_CLIP_SIZE , 0x00);
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_CLIP_COORD , 0x00);
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_DST_ADDR , 0x00);
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_DST_W_IN_BYTE , 0x00);
    DISP_REG_SET(idx*DISP_INDEX_OFFSET+DISP_REG_WDMA_ALPHA , 0x00);          // clear regs

    return 0;
}
コード例 #2
0
ファイル: ddp_ovl.c プロジェクト: resbeut/S5501-3.10
int OVLReset() {

    unsigned int delay_cnt = 0;
    static unsigned int cnt=0;
    printk("[DDP] OVLReset called %d \n", cnt++);

    DISP_REG_SET(DISP_REG_OVL_RST, 0x1);              // soft reset
    DISP_REG_SET(DISP_REG_OVL_RST, 0x0);
    while (((DISP_REG_GET(DISP_REG_OVL_FLOW_CTRL_DBG)&0x3ff) != 0x1) &&
            ((DISP_REG_GET(DISP_REG_OVL_FLOW_CTRL_DBG)&0x3ff) != 0x2)) {
        delay_cnt++;
        if(delay_cnt>10000)
        {
            printk("[DDP] error, OVLReset() timeout! \n");
            ddp_dump_info(DISP_MODULE_CONFIG);
            ddp_dump_info(DISP_MODULE_MUTEX);
            ddp_dump_info(DISP_MODULE_OVL);
            ddp_dump_info(DISP_MODULE_RDMA);
            disp_dump_reg(DISP_MODULE_OVL);
            smi_dumpDebugMsg();
            break;
        }
    }

#if 0
    DISP_REG_SET(DISP_REG_OVL_ROI_SIZE    , 0x00);           // clear regs
    DISP_REG_SET(DISP_REG_OVL_ROI_BGCLR   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_SRC_CON     , 0x00);

    DISP_REG_SET(DISP_REG_OVL_L0_CON      , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L0_SRCKEY   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L0_SRC_SIZE , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L0_OFFSET   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L0_ADDR     , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L0_PITCH    , 0x00);

    DISP_REG_SET(DISP_REG_OVL_L1_CON      , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L1_SRCKEY   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L1_SRC_SIZE , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L1_OFFSET   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L1_ADDR     , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L1_PITCH    , 0x00);

    DISP_REG_SET(DISP_REG_OVL_L2_CON      , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L2_SRCKEY   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L2_SRC_SIZE , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L2_OFFSET   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L2_ADDR     , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L2_PITCH    , 0x00);

    DISP_REG_SET(DISP_REG_OVL_L3_CON      , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L3_SRCKEY   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L3_SRC_SIZE , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L3_OFFSET   , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L3_ADDR     , 0x00);
    DISP_REG_SET(DISP_REG_OVL_L3_PITCH    , 0x00);
#endif

    return 0;
}
コード例 #3
0
ファイル: ddp_bls.c プロジェクト: Lesozav25/mtk_6572
void disp_bls_init(unsigned int srcWidth, unsigned int srcHeight)
{       
    DISP_MSG("disp_bls_init : srcWidth = %d, srcHeight = %d\n", srcWidth, srcHeight);

    // TODO: fix register setting
    DISP_REG_SET(DISP_REG_BLS_SRC_SIZE, (srcHeight << 16) | srcWidth);
    DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, DISP_REG_GET(DISP_REG_BLS_PWM_DUTY));
    DISP_REG_SET(DISP_REG_BLS_PWM_CON, 0x0);
    DISP_REG_SET(DISP_REG_BLS_INTEN, 0xF);

    disp_bls_update_gamma_lut();
    //disp_bls_update_pwm_lut();  // not used in 6572

#if 0 // TODO: fix Dither setting
    // Dithering
    DISP_REG_SET(DISP_REG_BLS_DITHER(0), 0x00000001);
    DISP_REG_SET(DISP_REG_BLS_DITHER(6), 0x00000000);
    DISP_REG_SET(DISP_REG_BLS_DITHER(13), 0x00000222);
    DISP_REG_SET(DISP_REG_BLS_DITHER(14), 0x00000000);
    DISP_REG_SET(DISP_REG_BLS_DITHER(15), 0x22220001);
    DISP_REG_SET(DISP_REG_BLS_DITHER(16), 0x22222222);
    DISP_REG_SET(DISP_REG_BLS_DITHER(17), 0x00000000);
#endif

    DISP_REG_SET(DISP_REG_BLS_EN, 0x00010001);          // enable BLS_EN

    disp_bls_config_full(srcWidth, srcHeight);

#if 0
    disp_dump_reg(DISP_MODULE_BLS);
#endif

}
コード例 #4
0
ファイル: ddp_path.c プロジェクト: kuailexs/iq451_mt6589
int disp_path_release_mutex()
{
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX(gMutexID), 0);
    if(disp_wait_timeout(((DISP_REG_GET(DISP_REG_CONFIG_MUTEX(gMutexID)) & 0x2) == 0), 1000*1000*500))
    {
        printf("[DDP] error! disp_path_release_mutex(), release mutex timeout! \n");
        disp_dump_reg(DISP_MODULE_CONFIG);
    }
}
コード例 #5
0
void disp_bls_init(unsigned int srcWidth, unsigned int srcHeight)
{       
    DDP_DRV_DBG("disp_bls_init : srcWidth = %d, srcHeight = %d\n", srcWidth, srcHeight);

    struct cust_mt65xx_led *cust_led_list = get_cust_led_list();
    struct cust_mt65xx_led *cust = NULL;
    struct PWM_config *config_data = NULL;

    if(cust_led_list)
    {
        cust = &cust_led_list[MT65XX_LED_TYPE_LCD];
        if((strcmp(cust->name,"lcd-backlight") == 0) && (cust->mode == MT65XX_LED_MODE_CUST_BLS_PWM))
        {
            config_data = &cust->config_data;
            if (config_data->clock_source >= 0 && config_data->clock_source <= 1)
            {
                unsigned int regVal = DISP_REG_GET(0xF0000000);
                if(config_data->clock_source == 0)
                    clkmux_sel(MT_CLKMUX_PWM_MM_MUX_SEL, MT_CG_SYS_26M, "DISP_PWM");
                else
                    clkmux_sel(MT_CLKMUX_PWM_MM_MUX_SEL, MT_CG_UPLL_D12, "DISP_PWM");
                DISP_DBG("disp_bls_init : 0xF0000000: 0x%x => 0x%x\n", regVal, DISP_REG_GET(0xF0000000));
            }
        }
    }

    // TODO: fix register setting
    DISP_REG_SET(DISP_REG_BLS_SRC_SIZE, (srcHeight << 16) | srcWidth);
    DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, DISP_REG_GET(DISP_REG_BLS_PWM_DUTY));
    DISP_REG_SET(DISP_REG_BLS_PWM_CON, 0x0);
    DISP_REG_SET(DISP_REG_BLS_INTEN, 0xF);

    disp_bls_update_gamma_lut();
    //disp_bls_update_pwm_lut();  // not used in 6572

#if 0 // TODO: fix Dither setting
    // Dithering
    DISP_REG_SET(DISP_REG_BLS_DITHER(0), 0x00000001);
    DISP_REG_SET(DISP_REG_BLS_DITHER(6), 0x00000000);
    DISP_REG_SET(DISP_REG_BLS_DITHER(13), 0x00000222);
    DISP_REG_SET(DISP_REG_BLS_DITHER(14), 0x00000000);
    DISP_REG_SET(DISP_REG_BLS_DITHER(15), 0x22220001);
    DISP_REG_SET(DISP_REG_BLS_DITHER(16), 0x22222222);
    DISP_REG_SET(DISP_REG_BLS_DITHER(17), 0x00000000);
#endif

    DISP_REG_SET(DISP_REG_BLS_EN, 0x00010001);          // enable BLS_EN

    disp_bls_config_full(srcWidth, srcHeight);

#if 0
    disp_dump_reg(DISP_MODULE_BLS);
#endif

}
コード例 #6
0
int hdmi_dst_display_path_config(bool enable)
{
    HDMI_FUNC();

    if (enable)
    {
        //FIXME: now nothing can be seen on TV if output UYVY from WDMA0

        unsigned int hdmiSourceAddr = hdmi_mva_r;// + p->hdmi_width * p->hdmi_height * hdmi_bpp * hdmi_buffer_read_id;

        struct disp_path_config_struct config = {0};

        // Config RDMA->DPI1
        config.srcWidth = 1280;
        config.srcHeight = 720;

        config.srcModule = DISP_MODULE_RDMA1;
        config.inFormat = RDMA_INPUT_FORMAT_ARGB;
        config.outFormat = RDMA_OUTPUT_FORMAT_ARGB;
        config.addr = hdmiSourceAddr;
        config.pitch = config.srcWidth * 4;

        config.dstModule = DISP_MODULE_DPI0;

        //if(-1 == dp_mutex_dst)
        //   dp_mutex_dst = disp_lock_mutex();
        dp_mutex_dst = 2;
        disp_dump_reg(DISP_MODULE_RDMA0);
        disp_dump_reg(DISP_MODULE_RDMA1);
        disp_dump_reg(DISP_MODULE_CONFIG);

        HDMI_LOG("Get mutex ID %d for RDMA1>DPI1\n", dp_mutex_dst);
        disp_path_get_mutex_(dp_mutex_dst);
        disp_path_config_(&config, dp_mutex_dst);
        disp_path_release_mutex_(dp_mutex_dst);
        disp_dump_reg(DISP_MODULE_CONFIG);
        disp_dump_reg(DISP_MODULE_RDMA0);
        disp_dump_reg(DISP_MODULE_RDMA1);
    }
    else
    {
        if (-1 != dp_mutex_dst)
        {
            //FIXME: release mutex timeout
            HDMI_LOG("Stop RDMA1>DPI1\n");
            disp_path_get_mutex_(dp_mutex_dst);

            DISP_REG_SET_FIELD(1 << dp_mutex_src , DISP_REG_CONFIG_MUTEX_INTEN,  1);
            RDMAStop(1);
            RDMAReset(1);
            disp_path_release_mutex_(dp_mutex_dst);

            //disp_unlock_mutex(dp_mutex_dst);
            dp_mutex_dst = -1;
        }
    }

    return 0;
}
コード例 #7
0
ファイル: ddp_bls.c プロジェクト: Elnter/j608_kernel
static int disp_bls_release_mutex(void)
{ 
    if (gBLSMutexID < 0)
        return -1;
    
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0);
    if(disp_poll_for_reg(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0, 0x2, POLLING_TIME_OUT))
    {
        BLS_ERR("release mutex timeout! \n");
        disp_dump_reg(DISP_MODULE_CONFIG);
        return -1;
    }
    return 0;
}
コード例 #8
0
ファイル: ddp_bls.c プロジェクト: Elnter/j608_kernel
void disp_bls_init(unsigned int srcWidth, unsigned int srcHeight)
{
    struct cust_mt65xx_led *cust_led_list = get_cust_led_list();
    struct cust_mt65xx_led *cust = NULL;
    struct PWM_config *config_data = NULL;

    if(cust_led_list)
    {
        cust = &cust_led_list[MT65XX_LED_TYPE_LCD];
        if((strcmp(cust->name,"lcd-backlight") == 0) && (cust->mode == MT65XX_LED_MODE_CUST_BLS_PWM))
        {
            config_data = &cust->config_data;
            if (config_data->clock_source >= 0 && config_data->clock_source <= 3)
            {
                unsigned int regVal = DISP_REG_GET(CLK_CFG_1);
                clkmux_sel(MT_MUX_PWM, config_data->clock_source, "DISP_PWM");
                BLS_DBG("disp_bls_init : CLK_CFG_1 0x%x => 0x%x\n", regVal, DISP_REG_GET(CLK_CFG_1));
            }
            gPWMDiv = (config_data->div == 0) ? PWM_DEFAULT_DIV_VALUE : config_data->div;
            gPWMDiv &= 0x3FF;
            BLS_MSG("disp_bls_init : PWM config data (%d,%d)\n", config_data->clock_source, config_data->div);
        }
    }
        
    BLS_DBG("disp_bls_init : srcWidth = %d, srcHeight = %d\n", srcWidth, srcHeight);
    BLS_MSG("disp_bls_init : BLS_EN=0x%x, PWM_DUTY=%d, PWM_DUTY_RD=%d, CG=0x%x, %d, %d\n", 
        DISP_REG_GET(DISP_REG_BLS_EN),
        DISP_REG_GET(DISP_REG_BLS_PWM_DUTY),
        DISP_REG_GET(DISP_REG_BLS_PWM_DUTY_RD),
        DISP_REG_GET(DISP_REG_CONFIG_MMSYS_CG_CON0),
        clock_is_on(MT_CG_DISP0_MDP_BLS_26M),
        clock_is_on(MT_CG_DISP0_DISP_BLS));
      
    DISP_REG_SET(DISP_REG_BLS_SRC_SIZE, (srcHeight << 16) | srcWidth);
    DISP_REG_SET(DISP_REG_BLS_PWM_CON, 0x0 | (gPWMDiv << 16));
    DISP_REG_SET(DISP_REG_BLS_BLS_SETTING, 0x0);
    DISP_REG_SET(DISP_REG_BLS_INTEN, 0xF);
    if (!(DISP_REG_GET(DISP_REG_BLS_EN) & 0x10000))
        DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, 0);

    disp_bls_update_gamma_lut();
    //disp_bls_update_pwm_lut();

    disp_bls_config_full(srcWidth, srcHeight);

    if (dbg_log) 
        disp_dump_reg(DISP_MODULE_BLS);
}
コード例 #9
0
ファイル: ddp_bls.c プロジェクト: SteveHuang27/Thunder-Kernel
static int disp_bls_release_mutex()
{
#if !defined(MTK_AAL_SUPPORT)    
    if (gBLSMutexID < 0)
        return -1;
    
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0);
    if(disp_poll_for_reg(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0, 0x2, POLLING_TIME_OUT))
    {
        printf("[DDP] error! disp_bls_release_mutex(), release mutex timeout! \n");
        disp_dump_reg(DISP_MODULE_CONFIG);
        return -1;
    }
#endif    
    return 0;
}
コード例 #10
0
ファイル: ddp_bls.c プロジェクト: Elnter/j608_kernel
void disp_bls_update_pwm_lut(void)
{
    int i;
    unsigned int regValue;

    BLS_MSG("disp_bls_update_pwm_lut!\n");

    regValue = DISP_REG_GET(DISP_REG_BLS_EN);
    if (regValue & 0x1) {
        BLS_ERR("update PWM LUT while BLS func enabled!\n");
        disp_dump_reg(DISP_MODULE_BLS);
    }
    //DISP_REG_SET(DISP_REG_BLS_EN, (regValue & 0x00010000));

    for (i = 0; i < PWM_LUT_ENTRY; i++)
    {
        DISP_REG_SET(DISP_REG_BLS_LUMINANCE(i), g_pwm_lut.entry[i]);
        BLS_DBG("[%d] PWM LUT = 0x%x (%lu)\n", i, DISP_REG_GET(DISP_REG_BLS_LUMINANCE(i)), g_pwm_lut.entry[i]);

    }
    DISP_REG_SET(DISP_REG_BLS_LUMINANCE_255, g_pwm_lut.entry[PWM_LUT_ENTRY-1]);
    //DISP_REG_SET(DISP_REG_BLS_EN, regValue);
}
コード例 #11
0
ファイル: ddp_path.c プロジェクト: kuailexs/iq451_mt6589
int disp_path_config(struct disp_path_config_struct* pConfig)
{
    ///> get mutex and set mout/sel
//        unsigned int gMutexID = 0;
    unsigned int mutex_mode;

    printf("[DDP]disp_path_config(), srcModule=%d, addr=0x%x, inFormat=%d, \n\
        pitch=%d, bgROI(%d,%d,%d,%d), bgColor=%d, outFormat=%d, dstModule=%d, dstAddr=0x%x,  \n",
           pConfig->srcModule,
           pConfig->addr,
           pConfig->inFormat,
           pConfig->pitch,
           pConfig->bgROI.x,
           pConfig->bgROI.y,
           pConfig->bgROI.width,
           pConfig->bgROI.height,
           pConfig->bgColor,
           pConfig->outFormat,
           pConfig->dstModule,
           pConfig->dstAddr);

    if(pConfig->srcModule==DISP_MODULE_RDMA0 && pConfig->dstModule==DISP_MODULE_WDMA1)
    {
        printf("[DDP] error! rdma0 wdma1 can not enable together! \n");
        return -1;
    }


    switch(pConfig->dstModule)
    {
    case DISP_MODULE_DSI_VDO:
        mutex_mode = 1;
        break;

    case DISP_MODULE_DPI0:
        mutex_mode = 2;
        break;

    case DISP_MODULE_DBI:
    case DISP_MODULE_DSI_CMD:
    case DISP_MODULE_WDMA1:
        mutex_mode = 0;
        break;

    default:
        printf("[DDP] error! unknown dstModule=%d \n", pConfig->dstModule);
    }


    DISP_REG_SET(DISP_REG_CONFIG_MUTEX_RST(gMutexID), 1);
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX_RST(gMutexID), 0);
    if(pConfig->srcModule==DISP_MODULE_RDMA0)
    {
        DISP_REG_SET(DISP_REG_CONFIG_MUTEX_MOD(gMutexID), 0x80); //rdma0=7
    }
    else
    {
        if(pConfig->dstModule==DISP_MODULE_WDMA1)
        {
            DISP_REG_SET(DISP_REG_CONFIG_MUTEX_MOD(gMutexID), 0x44); //ovl=2, wdma1=6
        }
        else
        {
#if defined(MTK_AAL_SUPPORT)
            DISP_REG_SET(DISP_REG_CONFIG_MUTEX_MOD(gMutexID), 0x284); //ovl=2, bls=9, rdma0=7
#else
            // Elsa: de-couple BLS from OVL stream
            DISP_REG_SET(DISP_REG_CONFIG_MUTEX_MOD(gMutexID), 0x84); //ovl=2, rdma0=7
#endif
        }
    }
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX_SOF(gMutexID), mutex_mode);
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX_INTSTA, (1 << gMutexID));
    DISP_REG_SET(DISP_REG_CONFIG_MUTEX_INTEN, (1 << gMutexID));

    // disp_path_get_mutex();

    ///> config config reg
    switch(pConfig->dstModule)
    {
    case DISP_MODULE_DSI:
    case DISP_MODULE_DSI_VDO:
    case DISP_MODULE_DSI_CMD:
        DISP_REG_SET(DISP_REG_CONFIG_OVL_MOUT_EN, 0x2);  // ovl_mout output to bls
        DISP_REG_SET(DISP_REG_CONFIG_BLS_SEL, 0);        // bls_sel from overlay
        DISP_REG_SET(DISP_REG_CONFIG_RDMA0_OUT_SEL, 0);  // rdma0_mout to dsi0
        break;

    case DISP_MODULE_DPI0:
        printf("DISI_MODULE_DPI0\n");
        DISP_REG_SET(DISP_REG_CONFIG_OVL_MOUT_EN, 0x2);   // ovl_mout output to bls
        DISP_REG_SET(DISP_REG_CONFIG_BLS_SEL, 0);         // bls_sel from overlay
        DISP_REG_SET(DISP_REG_CONFIG_RDMA0_OUT_SEL, 0x2); // rdma0_mout to dpi0
        DISP_REG_SET(DISP_REG_CONFIG_DPI0_SEL, 0);        // dpi0_sel from rdma0
        break;

    case DISP_MODULE_DBI:
        DISP_REG_SET(DISP_REG_CONFIG_OVL_MOUT_EN, 0x2);   // ovl_mout output to bls
        DISP_REG_SET(DISP_REG_CONFIG_BLS_SEL, 0);         // bls_sel from overlay
        DISP_REG_SET(DISP_REG_CONFIG_RDMA0_OUT_SEL, 0x1); // rdma0_mout to dbi
        DISP_REG_SET(DISP_REG_CONFIG_DBI_SEL, 0);         // dbi_sel from rdma0
        break;

    case DISP_MODULE_WDMA1:
        DISP_REG_SET(DISP_REG_CONFIG_OVL_MOUT_EN, 0x1);   // ovl_mout output to wdma1
        break;

    default:
        printf("[DDP] error! unknown dstModule=%d \n", pConfig->dstModule);
    }

    ///> config engines
    if(pConfig->srcModule!=DISP_MODULE_RDMA0)
    {   // config OVL
        OVLStop();
        // OVLReset();
        OVLROI(pConfig->bgROI.width, // width
               pConfig->bgROI.height, // height
               pConfig->bgColor);// background B

        OVLLayerSwitch(pConfig->ovl_config.layer, pConfig->ovl_config.layer_en);
        if(pConfig->ovl_config.layer_en!=0)
        {
            OVLLayerConfig(pConfig->ovl_config.layer,   // layer
                           pConfig->ovl_config.source,   // data source (0=memory)
                           pConfig->ovl_config.fmt,
                           pConfig->ovl_config.addr, // addr
                           pConfig->ovl_config.x,  // x
                           pConfig->ovl_config.y,  // y
                           pConfig->ovl_config.w, // width
                           pConfig->ovl_config.h, // height
                           pConfig->ovl_config.pitch,
                           pConfig->ovl_config.keyEn,  //color key
                           pConfig->ovl_config.key,  //color key
                           pConfig->ovl_config.aen, // alpha enable
                           pConfig->ovl_config.alpha); // alpha
        }

        OVLStart();

        if(pConfig->dstModule==DISP_MODULE_WDMA1)  //1. mem->ovl->wdma1->mem
        {
            WDMAReset(1);
            WDMAConfig(1,
                       WDMA_INPUT_FORMAT_ARGB,
                       pConfig->srcROI.width,
                       pConfig->srcROI.height,
                       0,
                       0,
                       pConfig->srcROI.width,
                       pConfig->srcROI.height,
                       pConfig->outFormat,
                       pConfig->dstAddr,
                       pConfig->srcROI.width,
                       1,
                       0);
            WDMAStart(1);
        }
        else    //2. ovl->bls->rdma0->lcd
        {

#if defined(MTK_AAL_SUPPORT)
            disp_bls_init(pConfig->srcROI.width, pConfig->srcROI.height);
#endif

            ///config RDMA
            RDMAStop(0);
            RDMAReset(0);
            RDMAConfig(0,
                       RDMA_MODE_DIRECT_LINK,       ///direct link mode
                       RDMA_INPUT_FORMAT_RGB888,    // inputFormat
                       NULL,                        // address
                       pConfig->outFormat,          // output format
                       pConfig->pitch,              // pitch
                       pConfig->srcROI.width,       // width
                       pConfig->srcROI.height,      // height
                       0,                           //byte swap
                       0);                          // is RGB swap

            RDMAStart(0);
        }
    }
    else  //3. mem->rdma->lcd
    {
        ///config RDMA
        RDMAStop(0);
        RDMAReset(0);
        RDMAConfig(0,
                   RDMA_MODE_MEMORY,       ///direct link mode
                   pConfig->inFormat,      // inputFormat
                   pConfig->addr,          // address
                   pConfig->outFormat,     // output format
                   pConfig->pitch,          //
                   pConfig->srcROI.width,
                   pConfig->srcROI.height,
                   0,                       //byte swap
                   0);                      // is RGB swap
        RDMAStart(0);
    }


    disp_dump_reg(DISP_MODULE_OVL);
    disp_dump_reg(DISP_MODULE_WDMA1);
    disp_dump_reg(DISP_MODULE_DPI0);
    disp_dump_reg(DISP_MODULE_RDMA0);
    disp_dump_reg(DISP_MODULE_CONFIG);

//		disp_path_release_mutex();

    return 0;
}
コード例 #12
0
ファイル: ddp_debug.c プロジェクト: dimsink1/KK_huawei_y511
static void process_dbg_opt(const char *opt)
{
    char *buf = dbg_buf + strlen(dbg_buf);
    if (0 == strncmp(opt, "regr:", 5))
    {
        char *p = (char *)opt + 5;
        unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);

        if (addr) 
        {
            unsigned int regVal = DISP_REG_GET(addr);
            DDP_DRV_INFO("regr: 0x%08X = 0x%08X\n", addr, regVal);
            sprintf(buf, "regr: 0x%08X = 0x%08X\n", addr, regVal);
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "regw:", 5))
    {
        char *p = (char *)opt + 5;
        unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);
        unsigned int val = (unsigned int) simple_strtoul(p + 1, &p, 16);
        if (addr) 
        {
            unsigned int regVal;
            DISP_REG_SET(addr, val);
            regVal = DISP_REG_GET(addr);
            DDP_DRV_DBG("regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
            sprintf(buf, "regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "ddp_drv_dbg_log:", 16))
    {
        char *p = (char *)opt + 16;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if (enable)
            ddp_drv_dbg_log = 1;
        else
            ddp_drv_dbg_log = 0;

        sprintf(buf, "ddp_drv_dbg_log: %d\n", ddp_drv_dbg_log);
    }
    else if (0 == strncmp(opt, "ddp_drv_irq_log:", 16))
    {
        char *p = (char *)opt + 16;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if (enable)
            ddp_drv_irq_log = 1;
        else
            ddp_drv_irq_log = 0;
        
        sprintf(buf, "ddp_drv_irq_log: %d\n", ddp_drv_irq_log);        
    }
    else if (0 == strncmp(opt, "backlight:", 10))
    {
        char *p = (char *)opt + 10;
        unsigned int level = (unsigned int) simple_strtoul(p, &p, 10);

        if (level) 
        {
            disp_bls_set_backlight(level);            
            sprintf(buf, "backlight: %d\n", level); 
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "dump_reg:", 9))
    {
        char *p = (char *)opt + 9;
        unsigned int module = (unsigned int) simple_strtoul(p, &p, 10);
        DDP_DRV_INFO("process_dbg_opt, module=%d \n", module);
        if (module<DISP_MODULE_MAX) 
        {
            disp_dump_reg(module);            
            sprintf(buf, "dump_reg: %d\n", module); 
        } else {
            DDP_DRV_INFO("process_dbg_opt2, module=%d \n", module);
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "dump_aal:", 9))
    {        
        char *p = (char *)opt + 9;
        unsigned int arg = (unsigned int) simple_strtoul(p, &p, 10);
        if (arg == 0)
        {
            int i;
            unsigned int hist[LUMA_HIST_BIN];
            disp_get_hist(hist);
            for (i = 0; i < LUMA_HIST_BIN; i++)
            {
                DDP_DRV_DBG("LUMA_HIST_%02d: %d\n", i, hist[i]);
                sprintf(dbg_buf + strlen(dbg_buf), "LUMA_HIST_%2d: %d\n", i, hist[i]);
            }
        }
        else if (arg == 1)
        {
            int i;
            DISP_AAL_PARAM param;
            
            GetUpdateMutex();
            memcpy(&param, get_aal_config(), sizeof(DISP_AAL_PARAM));
            ReleaseUpdateMutex();

            DDP_DRV_DBG("pwmDuty: %lu\n", param.pwmDuty);
            sprintf(dbg_buf + strlen(dbg_buf), "pwmDuty: %lu\n", param.pwmDuty);
            for (i = 0; i < LUMA_CURVE_POINT; i++)
            {
                DDP_DRV_DBG("lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
                sprintf(dbg_buf + strlen(dbg_buf), "lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
            }
        }
    }
    else if (0 == strncmp(opt, "debug:", 6))
    {
        char *p = (char *)opt + 6;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if(enable==1)
        {
            printk("[DDP] debug=1, trigger AEE\n");
            aee_kernel_exception("DDP-TEST-ASSERT", "[DDP] DDP-TEST-ASSERT");
        }
        else if(enable==2)
        {
           ddp_mem_test();
        }
        else if(enable==3)
        {
           ddp_mem_test2();
        }
#if 0
        else if(enable==4)
        {
            DDP_IRQ_ERR("test 4");
        }
#endif
        else if(enable==5)
        {
            DISP_MSG("SMI_LARB_MON_REQ0=0x%x, SMI_LARB_MON_REQ1=0x%x, SMI_0=0x%x, SMI_600=0x%x, SMI_604=0x%x, SMI_610=0x%x, SMI_614=0x%x, \
                              color_h_cnt=%d, color_line_cnt=%d, ovl_add_con=0x%x, ovl_ctrl_flow=0x%x \n", 
                              *(volatile unsigned int*)0xf4010450, 
                              *(volatile unsigned int*)0xf4010454,
                              *(volatile unsigned int*)0xf4010000,
                              *(volatile unsigned int*)0xf4010600,
                              *(volatile unsigned int*)0xf4010604,
                              *(volatile unsigned int*)0xf4010610,
                              *(volatile unsigned int*)0xf4010614,
                              *(volatile unsigned int*)0xf400b404,
                              *(volatile unsigned int*)0xf400b408,
                              DISP_REG_GET(DISP_REG_OVL_ADDCON_DBG),
                              DISP_REG_GET(DISP_REG_OVL_FLOW_CTRL_DBG));
             sprintf(dbg_buf + strlen(dbg_buf), "SMI_LARB_MON_REQ0=0x%x, SMI_LARB_MON_REQ1=0x%x, SMI_0=0x%x, SMI_600=0x%x, SMI_604=0x%x, SMI_610=0x%x, SMI_614=0x%x,"
                       "color_h_cnt=%d, color_line_cnt=%d, ovl_add_con=0x%x, ovl_ctrl_flow=0x%x \n",
                       *(volatile unsigned int*)0xf4010450, 
                       *(volatile unsigned int*)0xf4010454,
                       *(volatile unsigned int*)0xf4010000,
                       *(volatile unsigned int*)0xf4010600,
                       *(volatile unsigned int*)0xf4010604,
                       *(volatile unsigned int*)0xf4010610,
                       *(volatile unsigned int*)0xf4010614,
                       *(volatile unsigned int*)0xf400b404,
                       *(volatile unsigned int*)0xf400b408,
                       DISP_REG_GET(DISP_REG_OVL_ADDCON_DBG),
                       DISP_REG_GET(DISP_REG_OVL_FLOW_CTRL_DBG));               
        }
コード例 #13
0
int ddp_mem_test(void)
{    
    int result = 0;
    struct disp_path_config_struct config;
    unsigned int* pSrc;
    unsigned char* pSrcPa;
    unsigned int* pDst;
    unsigned char* pDstPa;

    
    pSrc= dma_alloc_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, (dma_addr_t *)&pSrcPa, GFP_KERNEL);
    if(pSrc==0 || pSrcPa==0)
    {
        printk("dma_alloc_coherent error!  dma memory not available.\n");
        return 0;
    }
    else
    {
        printk("[ddp] pSrc=0x%x, pSrcPa=0x%x \n", (unsigned int)pSrc, (unsigned int)pSrcPa);
    }
    memcpy((void*)pSrc, data_rgb888_64x64, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);
    
    pDst= dma_alloc_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, (dma_addr_t *)&pDstPa, GFP_KERNEL);
    if(pDst==0 || pDstPa==0)
    {
        printk("dma_alloc_coherent error!  dma memory not available.\n");
        return 0;
    }
    else
    {
        printk("[ddp] pDst=0x%x, pDstPa=0x%x \n",(unsigned int) pDst, (unsigned int)pDstPa);
    }
    memset((void*)pDst, 0, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);


    // config port to physical
    {
        M4U_PORT_STRUCT sPort;
        
        sPort.ePortID = M4U_PORT_LCD_W;
        sPort.Virtuality = 0; 					   
        sPort.Security = 0;
        sPort.Distance = 1;
        sPort.Direction = 0;
        m4u_config_port(&sPort);
    }

    config.srcModule = DISP_MODULE_OVL;
    config.addr = (unsigned int)pSrcPa; 
    config.inFormat = eRGB888; 
    config.pitch = DDP_TEST_WIDTH;
    config.srcROI.x = 0;
    config.srcROI.y = 0; 
    config.srcROI.width = DDP_TEST_WIDTH; 
    config.srcROI.height = DDP_TEST_HEIGHT; 
    config.srcWidth = DDP_TEST_WIDTH;
    config.srcHeight = DDP_TEST_HEIGHT;
    config.dstModule = DISP_MODULE_WDMA0;
    config.outFormat = eRGB888; 
    config.dstAddr = (unsigned int)pDstPa; 
    config.dstWidth = DDP_TEST_WIDTH; 
    config.dstHeight = DDP_TEST_HEIGHT;
    config.dstPitch = DDP_TEST_WIDTH;
    /*
    disp_power_on(DISP_MODULE_ROT);
    disp_power_on(DISP_MODULE_SCL);
    disp_power_on(DISP_MODULE_WDMA0);
    */
    disp_path_get_mutex_(DDP_MUTEX_FOR_ROT_SCL_WDMA);
    disp_path_config_(&config, DDP_MUTEX_FOR_ROT_SCL_WDMA);
    
    printk("*after ddp test config start: -------------------\n");
    disp_dump_reg(DISP_MODULE_OVL);
    disp_dump_reg(DISP_MODULE_WDMA0);
    disp_dump_reg(DISP_MODULE_CONFIG);
    printk("*after ddp test config end: ---------------------\n");
    
    disp_path_release_mutex_(DDP_MUTEX_FOR_ROT_SCL_WDMA);
    if(*(volatile unsigned int*)DISP_REG_CONFIG_MUTEX1 != 0)
    {
        *(volatile unsigned int*)DISP_REG_CONFIG_MUTEX1 = 0;
    }
    
    printk("ddp_mem_test wdma wait done... \n"); 
    WDMAWait(0);
    printk("ddp_mem_test wdma done! \n");            
    
    if(0) //compare source
    {
        unsigned int diff_cnt = 0;
        unsigned int t=0;
        unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
        for(t=0;t<size;t++)
        {
            if( *((unsigned char*)pSrc+t) != *((unsigned char*)data_rgb888_64x64+t) )
            {
                diff_cnt++;
                printk("t=%d, diff_cnt=%d, dst=0x%x, gold=0x%x \n", 
                t, 
                diff_cnt, 
                *((unsigned char*)pSrc+t), 
                *((unsigned char*)data_rgb888_64x64+t) );
            }
    
        }
        if(diff_cnt == 0)
            printk("ddp_mem_test src compare result: success \n");
        else
        {
            printk("ddp_mem_test src compare result: fail \n");
            printk("detail, %d, %d, %%%d \n", diff_cnt, size, diff_cnt*100/size);  
            result = -1;
        }              
    }
    
    if(1)  //compare dst
    {
        unsigned int diff_cnt = 0;
        unsigned int t=0;
        unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
        for(t=0;t<size;t++)
        {
            if( *((unsigned char*)pDst+t) != *((unsigned char*)data_rgb888_64x64_golden+t) )
            {
                diff_cnt++;
                printk("t=%d, diff_cnt=%d, dst=0x%x, gold=0x%x \n", 
                t, 
                diff_cnt, 
                *((unsigned char*)pDst+t), 
                *((unsigned char*)data_rgb888_64x64_golden+t) );
            }
    
        }
        if(diff_cnt == 0)
            printk("ddp_mem_test result: success \n");
        else
        {
            printk("ddp_mem_test result: fail \n");
            printk("detail, %d, %d, %%%d \n", diff_cnt, size, diff_cnt*100/size); 
            result = -1;
        }              
    }
    
    // print out dst buffer to save as golden
    if(0)
    {
        unsigned int t=0;
        unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;

        for(t=0;t<size;t++)
        {
            printk("0x%x, ", *((unsigned char*)pDst+t));
            if((t+1)%12==0)
            {
                printk("\n%05d: ", (t+1)/12);
            }
        }
    }

    /*
    disp_power_off(DISP_MODULE_ROT);
    disp_power_off(DISP_MODULE_SCL);
    disp_power_off(DISP_MODULE_WDMA0);
    */
    //dealloc memory
    dma_free_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, pSrc, (dma_addr_t)&pSrcPa);
    dma_free_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, pDst, (dma_addr_t)&pDstPa);   

    return result;
}
コード例 #14
0
int ddp_mem_test2(void)
{  
    int result = 0;
    unsigned int* pSrc;
    unsigned int* pDst;
#if 0
    DdpkBitbltConfig pddp;
#endif

    
    pSrc= vmalloc(DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);
    if(pSrc==0)
    {
        printk("[DDP] error: dma_alloc_coherent error!  dma memory not available.\n");
        return 0;
    }
    else
    {
        printk("[ddp] pSrc=0x%x \n", (unsigned int)pSrc);
    }
    memcpy((void*)pSrc, data_rgb888_64x64, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);
    
    pDst= vmalloc(DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);
    if(pDst==0)
    {
        printk("[DDP] error: dma_alloc_coherent error!  dma memory not available.\n");
        return 0;
    }
    else
    {
        printk("[ddp] pDst=0x%x\n", (unsigned int)pDst);
    }
    memset((void*)pDst, 0, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);

    /*
    disp_power_on(DISP_MODULE_ROT);
    disp_power_on(DISP_MODULE_SCL);
    disp_power_on(DISP_MODULE_WDMA0); 
   */
    // config port to virtual
    {
        M4U_PORT_STRUCT sPort;

        sPort.ePortID = M4U_PORT_LCD_W;
        sPort.Virtuality = 1; 					   
        sPort.Security = 0;
        sPort.Distance = 1;
        sPort.Direction = 0;
        m4u_config_port(&sPort);
    }
    //config

#if 0
    pddp.srcX = 0;
    pddp.srcY = 0;
    pddp.srcW = DDP_TEST_WIDTH;
    pddp.srcWStride = DDP_TEST_WIDTH;
    pddp.srcH = DDP_TEST_HEIGHT;
    pddp.srcHStride = DDP_TEST_HEIGHT;
    pddp.srcAddr[0] = (unsigned int)pSrc;
    pddp.srcFormat = eRGB888_K;
    pddp.srcPlaneNum = 1;
    pddp.srcBufferSize[0] = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
    
    pddp.dstX = 0;
    pddp.dstY = 0;
    pddp.dstW = DDP_TEST_WIDTH;
    pddp.dstWStride = DDP_TEST_WIDTH;
    pddp.dstH = DDP_TEST_HEIGHT;
    pddp.dstHStride = DDP_TEST_HEIGHT;
    pddp.dstAddr[0] = (unsigned int)pDst;
    pddp.dstFormat = eRGB888_K;
    pddp.pitch = DDP_TEST_WIDTH;
    pddp.dstPlaneNum = 1;
    pddp.dstBufferSize[0] = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
    pddp.orientation = 0;   
    result = DDPK_Bitblt_Config( DDPK_CH_HDMI_0, &pddp );
    if(result)
    {
        printk("[DDP] error: DDPK_Bitblt_Config fail!, ret=%d\n", result);
    }

    printk("DDP, DDPK_Bitblt module setting: \n");
    disp_dump_reg(DISP_MODULE_ROT);
    disp_dump_reg(DISP_MODULE_SCL);
    disp_dump_reg(DISP_MODULE_WDMA0);
    disp_dump_reg(DISP_MODULE_CONFIG);
    
    result = DDPK_Bitblt( DDPK_CH_HDMI_0);
    if(result)
    {
        printk("[DDP] error: DDPK_Bitblt() fail, result=%d \n", result);
    }
#endif

        
    // result verify
    {
        unsigned int diff_cnt = 0;
        unsigned int t=0;
        unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
        for(t=0;t<size;t++)
        {
            if( *((unsigned char*)pSrc+t) != *((unsigned char*)data_rgb888_64x64+t) )
            {
                diff_cnt++;
                printk("t=%d, diff_cnt=%d, dst=0x%x, gold=0x%x \n", 
                t, 
                diff_cnt, 
                *((unsigned char*)pSrc+t), 
                *((unsigned char*)data_rgb888_64x64+t) );
            }
    
        }
        if(diff_cnt == 0)
            printk("ddp_mem_test src compare result: success \n");
        else
        {
            printk("[DDP] error: ddp_mem_test src compare result: fail \n");
            printk("detail, %d, %d, %%%d \n", diff_cnt, size, diff_cnt*100/size);  
            result = -1;
        }              
    }
    
    {
        unsigned int diff_cnt = 0;
        unsigned int t=0;
        unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
        for(t=0;t<size;t++)
        {
            if( *((unsigned char*)pDst+t) != *((unsigned char*)data_rgb888_64x64_golden+t) )
            {
                diff_cnt++;
                printk("t=%d, diff_cnt=%d, dst=0x%x, gold=0x%x \n", 
                t, 
                diff_cnt, 
                *((unsigned char*)pDst+t), 
                *((unsigned char*)data_rgb888_64x64_golden+t) );
            }
    
        }
        if(diff_cnt == 0)
            printk("ddp_mem_test result: success \n");
        else
        {
            printk("[DDP] error: ddp_mem_test result: fail \n");
            printk("detail, %d, %d, %%%d \n", diff_cnt, size, diff_cnt*100/size); 
            result = -1;
        }              
    }
    /*
    disp_power_off(DISP_MODULE_ROT);
    disp_power_off(DISP_MODULE_SCL);
    disp_power_off(DISP_MODULE_WDMA0);
    */
    //dealloc memory
    vfree(pSrc);
    vfree(pDst);   

    return result;
}
コード例 #15
0
static void process_dbg_opt(const char *opt)
{
    char *buf = dbg_buf + strlen(dbg_buf);
    if (0 == strncmp(opt, "regr:", 5))
    {
        char *p = (char *)opt + 5;
        unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);

        if (addr) 
        {
            unsigned int regVal = DISP_REG_GET(addr);
            DDP_DRV_INFO("regr: 0x%08X = 0x%08X\n", addr, regVal);
            sprintf(buf, "regr: 0x%08X = 0x%08X\n", addr, regVal);
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "regw:", 5))
    {
        char *p = (char *)opt + 5;
        unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);
        unsigned int val = (unsigned int) simple_strtoul(p + 1, &p, 16);
        if (addr) 
        {
            unsigned int regVal;
            DISP_REG_SET(addr, val);
            regVal = DISP_REG_GET(addr);
            DDP_DRV_DBG("regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
            sprintf(buf, "regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "ddp_drv_dbg_log:", 16))
    {
        char *p = (char *)opt + 16;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if (enable)
            ddp_drv_dbg_log = 1;
        else
            ddp_drv_dbg_log = 0;

        sprintf(buf, "ddp_drv_dbg_log: %d\n", ddp_drv_dbg_log);
    }
    else if (0 == strncmp(opt, "ddp_drv_irq_log:", 16))
    {
        char *p = (char *)opt + 16;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if (enable)
            ddp_drv_irq_log = 1;
        else
            ddp_drv_irq_log = 0;
        
        sprintf(buf, "ddp_drv_irq_log: %d\n", ddp_drv_irq_log);        
    }
    else if (0 == strncmp(opt, "backlight:", 10))
    {
        char *p = (char *)opt + 10;
        unsigned int level = (unsigned int) simple_strtoul(p, &p, 10);

        if (level) 
        {
            disp_bls_set_backlight(level);            
            sprintf(buf, "backlight: %d\n", level); 
        } else {
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "dump_reg:", 9))
    {
        char *p = (char *)opt + 9;
        unsigned int module = (unsigned int) simple_strtoul(p, &p, 10);
        DDP_DRV_INFO("process_dbg_opt, module=%d \n", module);
        if (module<DISP_MODULE_MAX) 
        {
            disp_dump_reg(module);            
            sprintf(buf, "dump_reg: %d\n", module); 
        } else {
            DDP_DRV_INFO("process_dbg_opt2, module=%d \n", module);
            goto Error;
        }
    }
    else if (0 == strncmp(opt, "dump_aal:", 9))
    {        
        char *p = (char *)opt + 9;
        unsigned int arg = (unsigned int) simple_strtoul(p, &p, 10);
        if (arg == 0)
        {
            int i;
            unsigned int hist[LUMA_HIST_BIN];
            disp_get_hist(hist);
            for (i = 0; i < LUMA_HIST_BIN; i++)
            {
                DDP_DRV_DBG("LUMA_HIST_%02d: %d\n", i, hist[i]);
                sprintf(dbg_buf + strlen(dbg_buf), "LUMA_HIST_%2d: %d\n", i, hist[i]);
            }
        }
        else if (arg == 1)
        {
            int i;
            DISP_AAL_PARAM param;
            
            GetUpdateMutex();
            memcpy(&param, get_aal_config(), sizeof(DISP_AAL_PARAM));
            ReleaseUpdateMutex();

            DDP_DRV_DBG("pwmDuty: %lu\n", param.pwmDuty);
            sprintf(dbg_buf + strlen(dbg_buf), "pwmDuty: %lu\n", param.pwmDuty);
            for (i = 0; i < LUMA_CURVE_POINT; i++)
            {
                DDP_DRV_DBG("lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
                sprintf(dbg_buf + strlen(dbg_buf), "lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
            }
        }
    }
    else if (0 == strncmp(opt, "debug:", 6))
    {
        char *p = (char *)opt + 6;
        unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
        if(enable==1)
        {
            printk("[DDP] debug=1, trigger AEE\n");
            aee_kernel_exception("DDP-TEST-ASSERT", "[DDP] DDP-TEST-ASSERT");
        }
        else if(enable==2)
        {
           ddp_mem_test();
        }
        else if(enable==3)
        {
           ddp_mem_test2();
        }
    }
    else if (0 == strncmp(opt, "mmp", 3))
    {
        init_ddp_mmp_events();
    }
    else if (0 == strncmp(opt, "dpfd_ut1:", 9))
    {
#if 0
        char *p = (char *)opt + 9;
        unsigned int channel = (unsigned int) simple_strtoul(p, &p, 10);        
        //ddpk_testfunc_1(channel);
#endif
    }
    else if (0 == strncmp(opt, "dpfd_ut2:", 9))
    {
#if 0
        char *p = (char *)opt + 9;
        unsigned int channel = (unsigned int) simple_strtoul(p, &p, 10);        
        //ddpk_testfunc_2(channel);
#endif
    }
    else if (0 == strncmp(opt, "dpfd:log", 8))
    {
    }
    else if (0 == strncmp(opt, "pqon", 4))
    {
        pq_debug_flag=0;
        sprintf(buf, "Turn on PQ %d\n", pq_debug_flag);
    }
    else if (0 == strncmp(opt, "pqoff", 5))
    {
        pq_debug_flag=1;
        sprintf(buf, "Turn off PQ %d\n", pq_debug_flag);        
    }
    else if (0 == strncmp(opt, "pqdemo", 6))
    {
        pq_debug_flag=2;
        sprintf(buf, "Turn on PQ (demo) %d\n", pq_debug_flag);    
    }
    else if (0 == strncmp(opt, "pqstop", 6))
    {
        pq_debug_flag=3;
        sprintf(buf, "Stop mutex update %d\n", pq_debug_flag);    
    }
    else if (0 == strncmp(opt, "aalon", 5))
    {
        aal_debug_flag=0;
        sprintf(buf, "resume aal update %d\n", aal_debug_flag);    
    }
    else if (0 == strncmp(opt, "aaloff", 6))
    {
        aal_debug_flag=1;
        sprintf(buf, "suspend aal update %d\n", aal_debug_flag);    
    }
    else if (0 == strncmp(opt, "color_win:", 10))
    {
        char *p = (char *)opt + 10;
        unsigned int sat_upper, sat_lower, hue_upper, hue_lower;
        sat_upper = (unsigned int) simple_strtoul(p, &p, 10);
        p++;
        sat_lower = (unsigned int) simple_strtoul(p, &p, 10);
        p++;
        hue_upper = (unsigned int) simple_strtoul(p, &p, 10);
        p++;
        hue_lower = (unsigned int) simple_strtoul(p, &p, 10);
        DDP_DRV_INFO("Set color_win: %u, %u, %u, %u\n", sat_upper, sat_lower, hue_upper, hue_lower);
        disp_pq_set_window(sat_upper, sat_lower, hue_upper, hue_lower);
    }
    else if (0 == strncmp(opt, "dpx", 3))
    {
        ddp_debug_flag = ddp_debug_flag ^ 1;
        DDP_DRV_INFO("ddp_debug_flag: %d\n", ddp_debug_flag);
    }
    else if (0 == strncmp(opt, "ovl_reg:", 8))
    {
        char *p = (char *)opt + 8;
        unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
        unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);

        disp_path_get_mutex_(gMutexID);
        DISP_REG_SET(DISP_OVL_BASE+offset, value);
        disp_path_release_mutex_(gMutexID);

        DDP_DRV_INFO("ovl_reg: 0x%08X = 0x%08X\n", DISP_OVL_BASE+offset, value);
    }
    else if (0 == strncmp(opt, "rdma_reg:", 9))
    {
        char *p = (char *)opt + 9;
        unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
        unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);

        disp_path_get_mutex_(gMutexID);
        DISP_REG_SET(DISP_RDMA_BASE+offset, value);
        disp_path_release_mutex_(gMutexID);

        DDP_DRV_INFO("rdma_reg: 0x%08X = 0x%08X\n", DISP_RDMA_BASE+offset, value);
    }
    else if (0 == strncmp(opt, "bls_reg:", 8))
    {
        char *p = (char *)opt + 8;
        unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
        unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);

        disp_path_get_mutex_(gMutexID);
        DISP_REG_SET(DISP_BLS_BASE+offset, value);
        disp_path_release_mutex_(gMutexID);

        DDP_DRV_INFO("bls_reg: 0x%08X = 0x%08X\n", DISP_BLS_BASE+offset, value);
    }
    else if (0 == strncmp(opt, "pq_reg:", 7))
    {
        char *p = (char *)opt + 7;
        unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
        unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);

        disp_path_get_mutex_(gMutexID);
        DISP_REG_SET(DISP_PQ_BASE+offset, value);
        disp_path_release_mutex_(gMutexID);

        DDP_DRV_INFO("pq_reg: 0x%08X = 0x%08X\n", DISP_PQ_BASE+offset, value);
    }
    else
    {
	    goto Error;
    }

    return;

Error:
    DDP_DRV_ERR("parse command error!\n%s\n\n%s", opt, STR_HELP);
}