static int32_t sprdfb_dispc_early_init(struct sprdfb_device *dev) { FB_PRINT("sprdfb:[%s]\n", __FUNCTION__); //select DISPC clock source __raw_bits_and(~(1<<1), AHB_DISPC_CLK); //pll_src=256M __raw_bits_and(~(1<<2), AHB_DISPC_CLK); //set DISPC divdior __raw_bits_and(~(1<<3), AHB_DISPC_CLK); //div=0 __raw_bits_and(~(1<<4), AHB_DISPC_CLK); __raw_bits_and(~(1<<5), AHB_DISPC_CLK); //select DBI clock source __raw_bits_and(~(1<<9), AHB_DISPC_CLK); //pll_src=256M __raw_bits_and(~(1<<10), AHB_DISPC_CLK); //set DBI divdior __raw_bits_and(~(1<<11), AHB_DISPC_CLK); //div=0 __raw_bits_and(~(1<<12), AHB_DISPC_CLK); __raw_bits_and(~(1<<13), AHB_DISPC_CLK); //select DPI clock source __raw_bits_and(~(1<<17), AHB_DISPC_CLK); //pll_src=384M __raw_bits_and(~(1<<18), AHB_DISPC_CLK); //set DPI divdior __raw_bits_and(~(1<<19), AHB_DISPC_CLK); //div=10, dpi_clk = pll_src/(10+1) __raw_bits_or((1<<20), AHB_DISPC_CLK); __raw_bits_and(~(1<<21), AHB_DISPC_CLK); __raw_bits_or((1<<22), AHB_DISPC_CLK); __raw_bits_and(~(1<<23), AHB_DISPC_CLK); __raw_bits_and(~(1<<24), AHB_DISPC_CLK); __raw_bits_and(~(1<<25), AHB_DISPC_CLK); __raw_bits_and(~(1<<26), AHB_DISPC_CLK); //enable dispc matric clock __raw_bits_or((1<<9), AHB_CTL2); //core_clock_en __raw_bits_or((1<<11), AHB_CTL2); //matrix clock en //enable DISPC clock __raw_bits_or(1<<22, AHB_CTL0); printf("0x20900200 = 0x%x\n", __raw_readl(0x20900200)); printf("0x20900208 = 0x%x\n", __raw_readl(0x20900208)); printf("0x20900220 = 0x%x\n", __raw_readl(0x20900220)); dispc_reset(); dispc_module_enable(); is_first_frame = 1; return 0; }
int32_t autotst_dispc_init(int display_type) { int ret = 0; printk(KERN_INFO "autotst_dispc:[%s]\n",__FUNCTION__); //autotst_dsi_dump(); autotst_dispc_uninit(DISPLAY_TYPE_MIPI); ret = dispc_clk_init(); if(ret){ printk(KERN_WARNING "autotst_dispc: dispc_clk_init fail!\n"); return -1; } dispc_reset(); dispc_module_enable(); /*set bg color*/ dispc_set_bg_color(0xFFFFFFFF); /*enable dithering*/ dispc_dithering_enable(true); /*use MSBs as img exp mode*/ dispc_set_exp_mode(0x0); //enable DISPC Power Control dispc_pwr_enable(true); switch(display_type){ case DISPLAY_TYPE_MCU: autotst_panel = &lcd_dummy_mcu_spec; mcu_dispc_init_config(autotst_panel); mcu_dispc_set_timing(autotst_panel); break; case DISPLAY_TYPE_RGB: autotst_panel = &lcd_dummy_rgb_spec; rgb_dispc_init_config(autotst_panel); rgb_dispc_set_timing(autotst_panel); autotst_dispc_ctx.dispc_if = DISPC_IF_DPI; break; case DISPLAY_TYPE_MIPI: autotst_panel = &lcd_dummy_mipi_spec; mipi_dispc_init_config(autotst_panel); mipi_dispc_set_timing(autotst_panel); autotst_dsi_init(autotst_panel); break; default: printk("autotst_dispc:[%s] error display type (%d)\n", __FUNCTION__, display_type); } dispc_layer_init(autotst_panel); if(DISPC_IF_DPI == autotst_dispc_ctx.dispc_if){ if(1){ /*set dpi register update only with SW*/ dispc_set_bits(BIT(4), DISPC_DPI_CTRL); }else{ /*set dpi register update with SW & VSYNC*/ dispc_clear_bits(BIT(4), DISPC_DPI_CTRL); } /*enable dispc update done INT*/ //dispc_write((1<<4), DISPC_INT_EN); }else{ /* enable dispc DONE INT*/ //dispc_write((1<<0), DISPC_INT_EN); } //dispc_set_bits(BIT(2), DISPC_INT_EN); return 0; }
static int32_t sprdfb_dispc_early_init(struct sprdfb_device *dev) { int ret = 0; struct clk *clk_parent1, *clk_parent2, *clk_parent3; pr_debug(KERN_INFO "sprdfb:[%s]\n", __FUNCTION__); if(dispc_ctx.is_inited){ printk(KERN_WARNING "sprdfb: dispc early init warning!(has been inited)"); return 0; } #ifdef CONFIG_FB_DYNAMIC_CLK_SUPPORT dispc_ctx.clk_open = false; #endif /*usesd to open dipsc matix clock*/ __raw_writel((__raw_readl(REG_AHB_MATRIX_CLOCK)) | (1<<DISPC_CORE_CLK_EN) | (1<<DISPMTX_CLK_EN), REG_AHB_MATRIX_CLOCK); clk_parent1 = clk_get(NULL, DISPC_CLOCK_PARENT); if (IS_ERR(clk_parent1)) { printk(KERN_WARNING "sprdfb: get clk_parent1 fail!\n"); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_parent1 ok!\n"); } clk_parent2 = clk_get(NULL, DISPC_DBI_CLOCK_PARENT); if (IS_ERR(clk_parent2)) { printk(KERN_WARNING "sprdfb: get clk_parent2 fail!\n"); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_parent2 ok!\n"); } clk_parent3 = clk_get(NULL, DISPC_DPI_CLOCK_PARENT); if (IS_ERR(clk_parent3)) { printk(KERN_WARNING "sprdfb: get clk_parent3 fail!\n"); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_parent3 ok!\n"); } dispc_ctx.clk_dispc = clk_get(NULL, "clk_dispc"); if (IS_ERR(dispc_ctx.clk_dispc)) { printk(KERN_WARNING "sprdfb: get clk_dispc fail!\n"); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_dispc ok!\n"); } dispc_ctx.clk_dispc_dbi = clk_get(NULL, "clk_dispc_dbi"); if (IS_ERR(dispc_ctx.clk_dispc_dbi)) { printk(KERN_WARNING "sprdfb: get clk_dispc_dbi fail!\n"); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_dispc_dbi ok!\n"); } dispc_ctx.clk_dispc_dpi = clk_get(NULL, "clk_dispc_dpi"); if (IS_ERR(dispc_ctx.clk_dispc_dpi)) { printk(KERN_WARNING "sprdfb: get clk_dispc_dpi fail!\n"); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_dispc_dpi ok!\n"); } ret = clk_set_parent(dispc_ctx.clk_dispc, clk_parent1); if(ret){ printk(KERN_ERR "sprdfb: dispc set clk parent fail\n"); } ret = clk_set_rate(dispc_ctx.clk_dispc, DISPC_CLOCK); if(ret){ printk(KERN_ERR "sprdfb: dispc set clk parent fail\n"); } ret = clk_set_parent(dispc_ctx.clk_dispc_dbi, clk_parent2); if(ret){ printk(KERN_ERR "sprdfb: dispc set dbi clk parent fail\n"); } ret = clk_set_rate(dispc_ctx.clk_dispc_dbi, DISPC_DBI_CLOCK); if(ret){ printk(KERN_ERR "sprdfb: dispc set dbi clk parent fail\n"); } ret = clk_set_parent(dispc_ctx.clk_dispc_dpi, clk_parent3); if(ret){ printk(KERN_ERR "sprdfb: dispc set dpi clk parent fail\n"); } ret = clk_set_rate(dispc_ctx.clk_dispc_dpi, DISPC_DPI_CLOCK); if(ret){ printk(KERN_ERR "sprdfb: dispc set dpi clk parent fail\n"); } ret = clk_enable(dispc_ctx.clk_dispc); if (ret) { printk(KERN_WARNING "sprdfb: enable clk_dispc fail!\n"); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_dispc ok!\n"); } ret = clk_enable(dispc_ctx.clk_dispc_dbi); if (ret) { printk(KERN_WARNING "sprdfb: enable clk_dispc_dbi fail!\n"); clk_disable(dispc_ctx.clk_dispc); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_dispc_dbi ok!\n"); } ret = clk_enable(dispc_ctx.clk_dispc_dpi); if (ret) { printk(KERN_WARNING "sprdfb: enable clk_dispc_dpi fail!\n"); clk_disable(dispc_ctx.clk_dispc); clk_disable(dispc_ctx.clk_dispc_dbi); return 0; } else { pr_debug(KERN_INFO "sprdfb: get clk_dispc_dpi ok!\n"); } #ifdef CONFIG_FB_DYNAMIC_CLK_SUPPORT dispc_ctx.clk_open = true; #endif printk("0x20900200 = 0x%x\n", __raw_readl(SPRD_AHB_BASE + 0x200)); printk("0x20900208 = 0x%x\n", __raw_readl(SPRD_AHB_BASE + 0x208)); printk("0x20900220 = 0x%x\n", __raw_readl(SPRD_AHB_BASE + 0x220)); if(!dev->panel_ready){ dispc_reset(); dispc_module_enable(); dispc_ctx.is_first_frame = true; }else{ dispc_ctx.is_first_frame = false; } dispc_ctx.vsync_done = 1; dispc_ctx.vsync_waiter = 0; init_waitqueue_head(&(dispc_ctx.vsync_queue)); #ifdef CONFIG_FB_LCD_OVERLAY_SUPPORT sema_init(&dispc_ctx.overlay_lock, 1); #endif dispc_ctx.is_inited = true; ret = request_irq(IRQ_DISPC_INT, dispc_isr, IRQF_DISABLED, "DISPC", &dispc_ctx); if (ret) { printk(KERN_ERR "sprdfb: dispcfailed to request irq!\n"); clk_disable(dispc_ctx.clk_dispc); clk_disable(dispc_ctx.clk_dispc_dbi); clk_disable(dispc_ctx.clk_dispc_dpi); #ifdef CONFIG_FB_DYNAMIC_CLK_SUPPORT dispc_ctx.clk_open = false; #endif dispc_ctx.is_inited = false; return -1; } return 0; }