void configure_usb20sr(sls_avalon_usb20sr_dev *pUsb20srDev)
{
usb_initialize_descriptor(pUsb20srDev,(unsigned char*)device_desc_,
(unsigned char*)conf_desc_hs_,
(unsigned char*)conf_desc_fs_,
(unsigned char*)conf_desc_ls_,
sizeof(conf_desc_hs_),
sizeof(conf_desc_fs_),
sizeof(conf_desc_ls_),
(unsigned int*)str_desc_indexes_,
(unsigned char*)str_desc_,
sizeof(str_desc_indexes_),
(unsigned char*)device_quali_desc_,
(unsigned char*)other_speed_conf_desc_hs_,
(unsigned char*)other_speed_conf_desc_fs_);
usb_ep_config( pUsb20srDev, SUPPORTED_CONF, supported_ep_, ep_ip_csr_hs_, ep_ip_csr_fs_, ep_ip_csr_ls_,
ep_buf0_sz_hs_, ep_buf1_sz_hs_, ep_buf0_sz_fs_, ep_buf1_sz_fs_, ep_buf0_sz_ls_, ep_buf1_sz_ls_,
ep_ip_int_hs, ep_ip_int_fs, ep_ip_int_ls );
//Use DMA/UDSC's BASE, IRQ & NAME from system.h file
dma_config(pUsb20srDev, DMA_0_BASE, DMA_0_IRQ, DMA_0_NAME, DMA_FLAG); //set DMA_FLAG as 1 while using DMA
//dma_config(pUsb20srDev, UDSC_0_BASE, UDSC_0_IRQ, UDSC_0_NAME, DMA_FLAG); //set DMA_FLAG as 0 while using UDSC
usb20_event_isr(pUsb20srDev, USB_Attached_Event, USB_Detached_Event, USB_Reset_Event, USB_Resume_Event, USB_Suspend_Event, USB_WakeUpCfg_Event);
if(usb20sr_config(pUsb20srDev, USB20SR_BASE, USB20SR_IRQ, USB20SR_NAME, usb20sr_error_event, HandleClassSpecificControlRequests, HandleClassSpecificDescriptorRequests))
{}
}
/*!
\brief main function
\param[in] none
\param[out] none
\retval none
*/
int main(void)
{
gpio_config();
dma_config();
timer_config();
while (1);
}
static int start_dma(struct device *dev_dma, u32_t channel,
struct dma_config *dcfg, void *src, void *dst,
u32_t blk_size)
{
struct dma_block_config blk_cfg;
int ret;
memset(&blk_cfg, 0, sizeof(blk_cfg));
blk_cfg.block_size = blk_size / sizeof(u16_t);
blk_cfg.source_address = (u32_t)src;
blk_cfg.dest_address = (u32_t)dst;
dcfg->head_block = &blk_cfg;
ret = dma_config(dev_dma, channel, dcfg);
if (ret < 0) {
return ret;
}
ret = dma_start(dev_dma, channel);
return ret;
}
/**
* sw_dma_config - config dma hardware paras
* @dma_hdl: dma handle
* @pcfg: dma cofig para
*
* Returns 0 if sucess, otherwise failed
*/
u32 sw_dma_config(dma_hdl_t dma_hdl, dma_config_t *pcfg)
{
BUG_ON(unlikely(!dma_handle_is_valid(dma_hdl)));
dma_config(dma_hdl, pcfg);
return 0;
}
int sensor_init()
{
/* Do a power cycle */
DCMI_PWDN_HIGH();
systick_sleep(10);
DCMI_PWDN_LOW();
systick_sleep(100);
/* Initialize the SCCB interface */
SCCB_Init();
systick_sleep(10);
/* Configure the external clock (XCLK) */
extclk_config(XCLK_FREQ);
systick_sleep(10);
/* Reset the sesnor state */
memset(&sensor, 0, sizeof(struct sensor_dev));
/* Some sensors have different reset polarities, and we can't know which sensor
is connected before initializing SCCB and reading the PID register, which in
turn requires pulling the sensor out of the reset state. So we try to read a
register with both polarities to determine line state. */
sensor.reset_pol = ACTIVE_HIGH;
DCMI_RESET_HIGH();
systick_sleep(10);
DCMI_RESET_LOW();
systick_sleep(10);
/* Check if we can read PID */
if (SCCB_Read(REG_PID) == 255) {
/* Sensor is held in reset, so reset is active high */
sensor.reset_pol = ACTIVE_LOW;
DCMI_RESET_LOW();
systick_sleep(10);
DCMI_RESET_HIGH();
systick_sleep(10);
}
/* Read the sensor information */
sensor.id.MIDH = SCCB_Read(REG_MIDH);
sensor.id.MIDL = SCCB_Read(REG_MIDL);
sensor.id.PID = SCCB_Read(REG_PID);
sensor.id.VER = SCCB_Read(REG_VER);
/* Call the sensor-specific init function */
switch (sensor.id.PID) {
case OV9650_PID:
ov9650_init(&sensor);
break;
case OV2640_PID:
ov2640_init(&sensor);
break;
default:
/* sensor not supported */
return -1;
}
/* Configure the DCMI DMA Stream */
if (dma_config() != 0) {
return -1;
}
/* Configure the DCMI interface. This should be called
after ovxxx_init to set VSYNC/HSYNC/PCLK polarities */
if (dcmi_config() != 0){
return -1;
}
/* init/re-init mutex */
mutex_init(&fb->lock);
return 0;
}
int sensor_init()
{
/* Do a power cycle */
DCMI_PWDN_HIGH();
systick_sleep(10);
DCMI_PWDN_LOW();
systick_sleep(100);
/* Initialize the SCCB interface */
SCCB_Init();
systick_sleep(10);
/* Configure the sensor external clock (XCLK) to XCLK_FREQ (13MHz).
Note: The sensor's internal PLL (when CLKRC=0x80) doubles the XCLK_FREQ
(XCLK=XCLK_FREQ*2), and the unscaled PIXCLK output is XCLK_FREQ*4 */
extclk_config(XCLK_FREQ);
/* Uncomment this to pass through the MCO1 clock (HSI=16MHz) this results in a
64MHz PIXCLK output from the sensor.
Note: The maximum pixel clock input on the STM32F4xx is 54MHz,
the STM32F7 can probably handle higher input pixel clock.
*/
//(void) extclk_config;
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1);
/* Reset the sesnor state */
memset(&sensor, 0, sizeof(struct sensor_dev));
/* Some sensors have different reset polarities, and we can't know which sensor
is connected before initializing SCCB and reading the PID register, which in
turn requires pulling the sensor out of the reset state. So we try to read a
register with both polarities to determine line state. */
sensor.reset_pol = ACTIVE_HIGH;
DCMI_RESET_HIGH();
systick_sleep(10);
DCMI_RESET_LOW();
systick_sleep(10);
/* Check if we can read PID */
if (SCCB_Read(REG_PID) == 255) {
/* Sensor is held in reset, so reset is active high */
sensor.reset_pol = ACTIVE_LOW;
DCMI_RESET_LOW();
systick_sleep(10);
DCMI_RESET_HIGH();
systick_sleep(10);
}
/* Read the sensor information */
sensor.id.MIDH = SCCB_Read(REG_MIDH);
sensor.id.MIDL = SCCB_Read(REG_MIDL);
sensor.id.PID = SCCB_Read(REG_PID);
sensor.id.VER = SCCB_Read(REG_VER);
/* Call the sensor-specific init function */
switch (sensor.id.PID) {
case OV9650_PID:
ov9650_init(&sensor);
break;
case OV2640_PID:
ov2640_init(&sensor);
break;
default:
/* sensor not supported */
return -1;
}
/* Configure the DCMI DMA Stream */
if (dma_config() != 0) {
return -2;
}
/* Configure the DCMI interface. This should be called
after ovxxx_init to set VSYNC/HSYNC/PCLK polarities */
if (dcmi_config(DCMI_JPEG_DISABLE) != 0){
return -3;
}
/* init/re-init mutex */
mutex_init(&fb->lock);
// blocks usbdbg until the sensor is configured
fb->ready=0;
return 0;
}
