int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
if (cpu_is_omap44xx() && dssdev->channel != OMAP_DSS_CHANNEL_LCD2) {
/* Only LCD2 channel is connected to DPI on OMAP4 */
return -EINVAL;
}
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
return r;
}
if (cpu_is_omap34xx() && !cpu_is_omap3630()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err0;
}
/* turn on clock(s) */
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
if (!cpu_is_omap44xx())
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
/*Should need only FCK2 (38.4MHz)*/
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2);
#endif
dss_mainclk_state_enable();
dpi_basic_init(dssdev);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
if (!cpu_is_omap44xx())
r = dsi_pll_init(dssdev, 0, 1);
else {
r = dsi_pll_init(dssdev, 1, 1);
}
if (r)
goto err1;
#endif /* CONFIG_OMAP2_DSS_USE_DSI_PLL */
r = dpi_set_mode(dssdev);
if (r)
goto err2;
mdelay(2);
if (dssdev->manager) {
if (cpu_is_omap44xx())
dpi_start_auto_update(dssdev);
dssdev->manager->enable(dssdev->manager);
}
return 0;
err2:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit(dssdev->channel == OMAP_DSS_CHANNEL_LCD ? DSI1 : DSI2);
err1:
#endif
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
if (!cpu_is_omap44xx())
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dss_mainclk_state_disable(true);
if (cpu_is_omap34xx() && !cpu_is_omap3630())
regulator_disable(dpi.vdds_dsi_reg);
err0:
omap_dss_stop_device(dssdev);
return r;
}
static int dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
int lcd_channel_ix = 1;
int use_dsi_for_hdmi = 0;
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) {
DSSINFO("Lcd channel index 1");
dpi2_base = ioremap(DPI2_BASE, 2000);
lcd_channel_ix = 1;
} else
lcd_channel_ix = 0;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) {
DSSERR("display already enabled\n");
r = -EINVAL;
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
if (use_dsi_for_hdmi) {
dss_clk_enable(DSS_CLK_FCK2);
enable_vpll2_power(1);
if (cpu_is_omap3630())
r = dsi_pll_init(lcd_channel_ix, dssdev, 1, 1);
else
/*check param 2*/
r = dsi_pll_init(lcd_channel_ix, dssdev, 0, 1);
if (r)
goto err3;
}
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
if (cpu_is_omap44xx())
dpi_start_auto_update(dssdev);
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 1);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 1);
r = dssdev->driver->enable(dssdev);
if (r)
goto err5;
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
/* This is done specifically for HDMI panel
* Default HDMI panel timings may not work for all monitors
* Reset HDMI panel timings after enabling HDMI.
*/
if (use_dsi_for_hdmi)
dpi_set_timings(dssdev, &dssdev->panel.timings);
return 0;
err5:
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
err4:
if (use_dsi_for_hdmi) {
dsi_pll_uninit(lcd_channel_ix);
enable_vpll2_power(0);
err3:
dss_clk_disable(DSS_CLK_FCK2);
}
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
