static void amdgpu_ctx_do_release(struct kref *ref) { struct amdgpu_ctx *ctx; u32 i; ctx = container_of(ref, struct amdgpu_ctx, refcount); for (i = 0; i < ctx->adev->num_rings; i++) { if (ctx->adev->rings[i] == &ctx->adev->gfx.kiq.ring) continue; drm_sched_entity_fini(&ctx->adev->rings[i]->sched, &ctx->rings[i].entity); } amdgpu_ctx_fini(ref); }
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr) { unsigned num_entities = amdgput_ctx_total_num_entities(); struct amdgpu_ctx *ctx; struct idr *idp; uint32_t id, i; idp = &mgr->ctx_handles; idr_for_each_entry(idp, ctx, id) { if (kref_read(&ctx->refcount) != 1) { DRM_ERROR("ctx %p is still alive\n", ctx); continue; } for (i = 0; i < num_entities; i++) drm_sched_entity_fini(&ctx->entities[0][i].entity); } }
static int amdgpu_ctx_init(struct amdgpu_device *adev, enum drm_sched_priority priority, struct drm_file *filp, struct amdgpu_ctx *ctx) { unsigned i, j; int r; if (priority < 0 || priority >= DRM_SCHED_PRIORITY_MAX) return -EINVAL; r = amdgpu_ctx_priority_permit(filp, priority); if (r) return r; memset(ctx, 0, sizeof(*ctx)); ctx->adev = adev; kref_init(&ctx->refcount); spin_lock_init(&ctx->ring_lock); ctx->fences = kcalloc(amdgpu_sched_jobs * AMDGPU_MAX_RINGS, sizeof(struct dma_fence*), GFP_KERNEL); if (!ctx->fences) return -ENOMEM; mutex_init(&ctx->lock); for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { ctx->rings[i].sequence = 1; ctx->rings[i].fences = &ctx->fences[amdgpu_sched_jobs * i]; } ctx->reset_counter = atomic_read(&adev->gpu_reset_counter); ctx->reset_counter_query = ctx->reset_counter; ctx->vram_lost_counter = atomic_read(&adev->vram_lost_counter); ctx->init_priority = priority; ctx->override_priority = DRM_SCHED_PRIORITY_UNSET; /* create context entity for each ring */ for (i = 0; i < adev->num_rings; i++) { struct amdgpu_ring *ring = adev->rings[i]; struct drm_sched_rq *rq; rq = &ring->sched.sched_rq[priority]; if (ring == &adev->gfx.kiq.ring) continue; r = drm_sched_entity_init(&ring->sched, &ctx->rings[i].entity, rq, &ctx->guilty); if (r) goto failed; } r = amdgpu_queue_mgr_init(adev, &ctx->queue_mgr); if (r) goto failed; return 0; failed: for (j = 0; j < i; j++) drm_sched_entity_fini(&adev->rings[j]->sched, &ctx->rings[j].entity); kfree(ctx->fences); ctx->fences = NULL; return r; }