C++ (Cpp) dumphex32の例

コード例 #1

ファイル: mmc_bsp.c プロジェクト: carpecarp/CC-A80-u-boot

static int mmc_clk_io_onoff(int sdc_no, int onoff, normal_gpio_cfg *gpio_info, int offset)
{
	unsigned int rval;
	struct sunxi_mmc_host* mmchost = &mmc_host[sdc_no];

	if(sdc_no == 0)
	{
		boot_set_gpio((void *)gpio_info, 8, 1);
	}
	else // if(sdc_no == 2)
	{
		boot_set_gpio((void *)(gpio_info + offset), 8, 1);
	}
	/* config ahb clock */
	rval = readl(mmchost->hclkbase);
	rval |= (1 << (8 + sdc_no));
	writel(rval, mmchost->hclkbase);

	rval = readl(mmchost->hclkrst);
	rval |= (1 << (8 + sdc_no));
	writel(rval, mmchost->hclkrst);
	/* config mod clock */
	writel(0x80000000, mmchost->mclkbase);
	mmchost->mclk = 24000000;
	dumphex32("ccmu", (char*)CCMM_REGS_BASE, 0x100);
	dumphex32("gpio", (char*)PIOC_REGS_BASE, 0x100);
	dumphex32("mmc", (char*)mmchost->reg, 0x100);

	return 0;
}

コード例 #2

ファイル: nand_osal_for_linux.c プロジェクト: songjmcn/linux-3.4-sunxi

void NAND_DumpReg(void)
{
	dumphex32("nand0 reg", (char*)0xf1c03000, 60);
  	dumphex32("gpio reg", (char*)0xf1c20848, 40);
	dumphex32("clk reg", (char*)0xf1c20080, 8);
	dumphex32("dma reg part0", (char*)0xf1c02000, 8);
	dumphex32("dma reg part1", (char*)0xf1c02100, 50);
}

コード例 #3

ファイル: nand_osal_for_linux.c プロジェクト: xwliu/Cubietruck_Plus-kernel-source

void NAND_DumpReg(void)
{
    dumphex32("nand0 reg", (char*)0xf1c03000, 136);
    dumphex32("nand1 reg", (char*)0xf1c04000, 136);
    dumphex32("gpio reg", (char*)0xf6000848, 20);
    dumphex32("clk reg0",  (char*)0xf6000400, 10);
    dumphex32("clk reg1",  (char*)0xf6000000, 10);
}

コード例 #4

ファイル: mmc_bsp.c プロジェクト: GREYFOXRGR/BPI-M3-bsp

static int mmc_clk_io_onoff(int sdc_no, int onoff, const normal_gpio_cfg *gpio_info, int offset)
{
	unsigned int rval;
	struct sunxi_mmc_host* mmchost = &mmc_host[sdc_no];

	if(sdc_no == 0)
	{
		/*
			1. change the initial status of gpio-f;
			2. change the bias voltage of gpio-f to 3.0V
		*/
		*(volatile unsigned int *)(0x06000800 + 0xB4) = 0x111111; //CFG0
		*(volatile unsigned int *)(0x06000800 + 0xD0) = 0x555; //PULL0
		*(volatile unsigned int *)(0x06000800 + 0xC4) = 0x3F; //DATA
		__msdelay(5);
		*(volatile unsigned int *)(0x06000800 + 0xC4) = 0x0;
		__msdelay(5);
		*(volatile unsigned int *)(0x06000800 + 0xC4) = 0x3F;
		__msdelay(5);

		*(volatile unsigned int *)(0x06000800 + 0x314) = 0xA; //BIAS

		boot_set_gpio((void *)gpio_info, 8, 1);
	}
	else // if(sdc_no == 2)
	{
		boot_set_gpio((void *)(gpio_info + offset), 8, 1);
	}
	/* config ahb clock */
	rval = readl(mmchost->hclkbase);
	rval |= (1 << 8);
	writel(rval, mmchost->hclkbase);

	rval = readl(mmchost->hclkrst);
	rval |= (1 << 8);
	writel(rval, mmchost->hclkrst);

	rval = readl(mmchost->commreg);
	rval |= (1<<16)|(1<<18);
	writel(rval, mmchost->commreg);
	/* config mod clock */
	writel(0x80000000, mmchost->mclkbase);
	mmchost->mclk = 24000000;
	dumphex32("ccmu", (char*)CCMM_REGS_BASE, 0x100);
	dumphex32("gpio", (char*)PIOC_REGS_BASE, 0x100);
	dumphex32("mmc", (char*)mmchost->reg, 0x100);

	return 0;
}

コード例 #5

ファイル: mmc_bsp.c プロジェクト: GREYFOXRGR/BPI-M3-bsp

static int mmc_update_clk(struct mmc *mmc)
{
	struct sunxi_mmc_host* mmchost = (struct sunxi_mmc_host *)mmc->priv;
	unsigned int cmd;
	int timeout = 0xfffff;

	cmd = (1U << 31) | (1 << 21) | (1 << 13);
  	writel(cmd, &mmchost->reg->cmd);
	while((readl(&mmchost->reg->cmd)&0x80000000) && timeout--);
	if (timeout<0){
		mmcinfo("mmc %d update clk failed\n",mmchost ->mmc_no);
		dumphex32("mmc", (char*)mmchost->reg, 0x100);
		return -1;
    }

	writel(readl(&mmchost->reg->rint), &mmchost->reg->rint);
	return 0;
}

コード例 #6

ファイル: sunxi_host0_2_v4p1.c プロジェクト: dmitry-shavyrin/a64_lichee

static int mmc_update_clk(struct sunxi_mmc_host* mmchost)
{
	struct mmc_reg_v4p1 *reg = (struct mmc_reg_v4p1 *)mmchost->reg;
	unsigned int cmd;
	unsigned timeout = 1000;

	writel(readl(&reg->clkcr)|(0x1<<31), &reg->clkcr);

	cmd = (1U << 31) | (1 << 21) | (1 << 13);
  	writel(cmd, &reg->cmd);
	while((readl(&reg->cmd)&0x80000000) && --timeout){
		__msdelay(1);
	}
	if (!timeout){
		MMCINFO("mmc %d update clk failed\n",mmchost->mmc_no);
		dumphex32("mmc", (char*)reg, 0x100);
		return -1;
	}
	writel(readl(&reg->clkcr) & (~(0x1<<31)), &reg->clkcr);
	writel(readl(&reg->rint), &reg->rint);
	return 0;
}

コード例 #7

ファイル: mmc_bsp.c プロジェクト: choxnox/a33_bootloader

static int mmc_clk_io_onoff(int sdc_no, int onoff)
{
	unsigned int rval;
	struct sunxi_mmc_host* mmchost = &mmc_host[sdc_no];

	if(sdc_no == 0)
	{
#if defined CONFIG_ARCH_SUN9IW1P1
	/*
		1. change the initial status of gpio-f;
		2. change the bias voltage of gpio-f to 3.0V 
	*/
	*(volatile unsigned int *)(0x06000800 + 0xB4) = 0x111111; //CFG0
	*(volatile unsigned int *)(0x06000800 + 0xD0) = 0x555; //PULL0
	*(volatile unsigned int *)(0x06000800 + 0xC4) = 0x3F; //DATA
	__msdelay(5);
	*(volatile unsigned int *)(0x06000800 + 0xC4) = 0x0;
	__msdelay(5);
	*(volatile unsigned int *)(0x06000800 + 0xC4) = 0x3F;
	__msdelay(5);

	*(volatile unsigned int *)(0x06000800 + 0x314) = 0xA; //BIAS
#endif

		boot_set_gpio((void *)BT0_head.prvt_head.storage_gpio, 8, 1);
	}
	else // if(sdc_no == 2)
	{
		boot_set_gpio((void *)(BT0_head.prvt_head.storage_gpio + 16), 8, 1);
	}
#if defined(CONFIG_ARCH_SUN8IW1P1) || defined(CONFIG_ARCH_SUN8IW3P1) || defined(CONFIG_ARCH_SUN8IW5P1)|| defined(CONFIG_ARCH_SUN8IW6P1) || defined(CONFIG_ARCH_SUN8IW8P1)|| (defined CONFIG_ARCH_SUN8IW7P1) ||(defined CONFIG_ARCH_SUN8IW9P1)
	/* config ahb clock */
	rval = readl(mmchost->hclkbase);
	rval |= (1 << (8 + sdc_no));
	writel(rval, mmchost->hclkbase);

	rval = readl(mmchost->hclkrst);
	rval |= (1 << (8 + sdc_no));
	writel(rval, mmchost->hclkrst);
#elif defined(CONFIG_ARCH_SUN7I)|| defined(CONFIG_ARCH_SUN5I)
	/* config ahb clock */
	rval = readl(mmchost->hclkbase);
	rval |= (1 << (8 + sdc_no));
	writel(rval, mmchost->hclkbase);
#elif defined(CONFIG_ARCH_SUN9IW1P1)
	/* config ahb clock */
	rval = readl(mmchost->hclkbase);
	rval |= (1 << 8);
	writel(rval, mmchost->hclkbase);

	rval = readl(mmchost->hclkrst);
	rval |= (1 << 8);
	writel(rval, mmchost->hclkrst);

	rval = readl(mmchost->commreg);
	rval |= (1<<16)|(1<<18);
	writel(rval, mmchost->commreg);
#else
	#error The platform is not seleted
#endif
	/* config mod clock */
	writel(0x80000000, mmchost->mclkbase);
	mmchost->mclk = 24000000;
	dumphex32("ccmu", (char*)CCMM_REGS_BASE, 0x100);
	dumphex32("gpio", (char*)PIOC_REGS_BASE, 0x100);
	dumphex32("mmc", (char*)mmchost->reg, 0x100);

	return 0;
}