static unsigned bfin_ebiu_ddrc_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_ebiu_ddrc *ddrc = hw_data (me); bu32 mmr_off; bu32 *value32p; bu16 *value16p; void *valuep; mmr_off = addr - ddrc->base; valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(errmst): case mmr_offset(rstctl): dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); dv_store_2 (dest, *value16p); break; default: dv_bfin_mmr_require_32 (me, addr, nr_bytes, false); dv_store_4 (dest, *value32p); break; } return nr_bytes; }
static unsigned bfin_eppi_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_eppi *eppi = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - eppi->base; valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(status): dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); dv_w1c_2 (value16p, value, 0x1ff); break; case mmr_offset(hcount): case mmr_offset(hdelay): case mmr_offset(vcount): case mmr_offset(vdelay): case mmr_offset(frame): case mmr_offset(line): case mmr_offset(clkdiv): dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); *value16p = value; break; case mmr_offset(control): *value32p = value; bfin_eppi_gui_setup (eppi); break; case mmr_offset(fs1w_hbl): case mmr_offset(fs1p_avpl): case mmr_offset(fsw2_lvb): case mmr_offset(fs2p_lavf): case mmr_offset(clip): case mmr_offset(err): dv_bfin_mmr_require_32 (me, addr, nr_bytes, true); *value32p = value; break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, true); break; } return nr_bytes; }
static unsigned bfin_ebiu_sdc_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_ebiu_sdc *sdc = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - sdc->base; valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(sdgctl): /* XXX: SRFS should make external mem unreadable. */ *value32p = value; break; case mmr_offset(sdbctl): if (sdc->type == 561) { dv_bfin_mmr_require_32 (me, addr, nr_bytes, true); *value32p = value; } else { dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); *value16p = value; } break; case mmr_offset(sdrrc): dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); *value16p = value; break; case mmr_offset(sdstat): dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); /* XXX: Some bits are W1C ... */ break; } return nr_bytes; }
static unsigned bfin_eppi_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_eppi *eppi = hw_data (me); bu32 mmr_off; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; mmr_off = addr - eppi->base; valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(status): case mmr_offset(hcount): case mmr_offset(hdelay): case mmr_offset(vcount): case mmr_offset(vdelay): case mmr_offset(frame): case mmr_offset(line): case mmr_offset(clkdiv): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) return 0; dv_store_2 (dest, *value16p); break; case mmr_offset(control): case mmr_offset(fs1w_hbl): case mmr_offset(fs1p_avpl): case mmr_offset(fsw2_lvb): case mmr_offset(fs2p_lavf): case mmr_offset(clip): case mmr_offset(err): if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; dv_store_4 (dest, *value32p); break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, false); return 0; } return nr_bytes; }
static unsigned bfin_gpio_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_gpio *port = hw_data (me); bu32 mmr_off; bu16 *value16p; bu32 *value32p; void *valuep; mmr_off = addr - port->base; /* Invalid access mode is higher priority than missing register. */ if (mmr_off == mmr_offset (mux)) { if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; } else if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) return 0; valuep = (void *)((unsigned long)port + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(data): case mmr_offset(clear): case mmr_offset(set): dv_store_2 (dest, port->data); break; case mmr_offset(dir_clear): case mmr_offset(dir_set): dv_store_2 (dest, port->dir); break; case mmr_offset(fer): case mmr_offset(inen): dv_store_2 (dest, *value16p); break; case mmr_offset(mux): dv_store_4 (dest, *value32p); break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, false); return 0; } return nr_bytes; }
static unsigned bfin_gptimer_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_gptimer *gptimer = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - gptimer->base; valuep = (void *)((unsigned long)gptimer + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(config): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) return 0; *value16p = value; break; case mmr_offset(counter): case mmr_offset(period): case mmr_offset(width): if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) return 0; *value32p = value; break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, true); return 0; } return nr_bytes; }
static unsigned bfin_ebiu_ddrc_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_ebiu_ddrc *ddrc = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - ddrc->base; valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(errmst): case mmr_offset(rstctl): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) return 0; *value16p = value; break; default: if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) return 0; *value32p = value; break; } return nr_bytes; }
static unsigned bfin_ebiu_sdc_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_ebiu_sdc *sdc = hw_data (me); bu32 mmr_off; bu32 *value32p; bu16 *value16p; void *valuep; mmr_off = addr - sdc->base; valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(sdgctl): dv_store_4 (dest, *value32p); break; case mmr_offset(sdbctl): if (sdc->type == 561) { dv_bfin_mmr_require_32 (me, addr, nr_bytes, false); dv_store_4 (dest, *value32p); } else { dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); dv_store_2 (dest, *value16p); } break; case mmr_offset(sdrrc): case mmr_offset(sdstat): dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); dv_store_2 (dest, *value16p); break; } return nr_bytes; }
static unsigned bfin_gptimer_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_gptimer *gptimer = hw_data (me); bu32 mmr_off; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false)) return 0; mmr_off = addr - gptimer->base; valuep = (void *)((unsigned long)gptimer + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(config): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) return 0; dv_store_2 (dest, *value16p); break; case mmr_offset(counter): case mmr_offset(period): case mmr_offset(width): if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; dv_store_4 (dest, *value32p); break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, false); return 0; } return nr_bytes; }
static unsigned bfin_cec_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_cec *cec = hw_data (me); bu32 mmr_off; bu32 *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; mmr_off = addr - cec->base; valuep = (void *)((unsigned long)cec + mmr_base() + mmr_off); HW_TRACE_READ (); dv_store_4 (dest, *valuep); return nr_bytes; }
static unsigned bfin_cec_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_cec *cec = hw_data (me); bu32 mmr_off; bu32 value; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) return 0; value = dv_load_4 (source); mmr_off = addr - cec->base; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(evt_override): cec->evt_override = value; break; case mmr_offset(imask): _cec_imask_write (cec, value); bfin_cec_check_pending (me, cec); break; case mmr_offset(ipend): /* Read-only register. */ break; case mmr_offset(ilat): dv_w1c_4 (&cec->ilat, value, 0xffee); break; case mmr_offset(iprio): cec->iprio = (value & IVG_UNMASKABLE_B); break; } return nr_bytes; }
static unsigned bfin_ebiu_ddrc_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_ebiu_ddrc *ddrc = hw_data (me); bu32 mmr_off; bu32 *value32p; bu16 *value16p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; mmr_off = addr - ddrc->base; valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(errmst): case mmr_offset(rstctl): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) return 0; dv_store_2 (dest, *value16p); break; default: if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; dv_store_4 (dest, *value32p); break; } return nr_bytes; }
static unsigned bfin_gpio_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_gpio *port = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; mmr_off = addr - port->base; /* Invalid access mode is higher priority than missing register. */ if (mmr_off == mmr_offset (mux)) { if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) return 0; } else if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) return 0; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); valuep = (void *)((unsigned long)port + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(fer): case mmr_offset(data): case mmr_offset(inen): *value16p = value; break; case mmr_offset(clear): /* We want to clear the related data MMR. */ dv_w1c_2 (&port->data, value, -1); break; case mmr_offset(set): /* We want to set the related data MMR. */ port->data |= value; break; case mmr_offset(dir_clear): dv_w1c_2 (&port->dir, value, -1); break; case mmr_offset(dir_set): port->dir |= value; break; case mmr_offset(mux): *value32p = value; break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, true); return 0; } /* If tweaking output pins, make sure we send updated port info. */ switch (mmr_off) { case mmr_offset(data): case mmr_offset(set): case mmr_offset(clear): case mmr_offset(dir_set): { int i; bu32 bit; for (i = 0; i < 16; ++i) { bit = (1 << i); if (!(port->inen & bit)) hw_port_event (me, i, !!(port->data & bit)); } break; } } return nr_bytes; }