void
gcpu_mca_poll_start(cmi_hdl_t hdl)
{
ASSERT(cmi_hdl_class(hdl) == CMI_HDL_SOLARIS_xVM_MCA);
/*
* We are on the boot cpu (cpu 0), called at the end of its
* multiprocessor startup.
*/
if (gcpu_xpv_poll_bankregs_sz != 0 && gcpu_xpv_virq_vect == -1) {
/*
* The hypervisor will poll MCA state for us, but it cannot
* poll MCH state so we do that via a timeout.
*/
if (gcpu_xpv_mch_poll_interval_secs != 0) {
gcpu_xpv_mch_poll_timeoutid =
timeout(gcpu_xpv_mch_poll, GCPU_XPV_MCH_POLL_REARM,
drv_usectohz(gcpu_xpv_mch_poll_interval_secs *
MICROSEC));
}
/*
* Register handler for VIRQ_MCA; once this is in place
* the hypervisor will begin to forward polled MCA observations
* to us.
*/
gcpu_xpv_virq_vect = ec_bind_virq_to_irq(VIRQ_MCA, 0);
(void) add_avintr(NULL, gcpu_xpv_virq_level,
(avfunc)gcpu_xpv_virq_intr, "MCA", gcpu_xpv_virq_vect,
NULL, NULL, NULL, NULL);
}
}
/*ARGSUSED*/
static int
xen_uppc_get_clockirq(int ipl)
{
if (xen_clock_irq != -1)
return (xen_clock_irq);
xen_clock_irq = ec_bind_virq_to_irq(VIRQ_TIMER, 0);
return (xen_clock_irq);
}
