static inline void s3c_irq_eint_mask(unsigned int irq) { u32 mask; mask = __raw_readl(S5PC1XX_EINTMASK(eint_mask_reg(irq))); mask |= eint_irq_to_bit(irq); __raw_writel(mask, S5PC1XX_EINTMASK(eint_mask_reg(irq))); }
static void s5p_irq_eint_unmask(unsigned int irq) { u32 mask; mask = __raw_readl(S5P_EINTMASK(eint_mask_reg(irq))); mask &= ~(eint_irq_to_bit(irq)); __raw_writel(mask, S5P_EINTMASK(eint_mask_reg(irq))); }
static void s3c_irq_eint_unmask(unsigned int irq) { u32 mask; mask = __raw_readl(S5PC11X_EINTMASK(eint_mask_reg(irq))); mask &= ~(eint_irq_to_bit(irq)); __raw_writel(mask, S5PC11X_EINTMASK(eint_mask_reg(irq))); #ifdef S5PC11X_ALIVEGPIO_STORE mask = __raw_readl(S5PC11X_EINTMASK(eint_mask_reg(irq))); #endif }
// intr_mode 0x2=>falling edge, 0x3=>rising dege, 0x4=>Both edge static void s5pc11x_pm_set_eint(unsigned int irq, unsigned int intr_mode) { int offs = (irq); int shift; u32 ctrl, mask, tmp; //u32 newvalue = 0x2; // Falling edge shift = (offs & 0x7) * 4; if((0 <= offs) && (offs < 8)) { tmp = readl(S5PC11X_GPH0CON); tmp |= (0xf << shift); writel(tmp , S5PC11X_GPH0CON); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_GPH0CON); // FIX for EVT0 bug #endif /*pull up disable*/ } else if((8 <= offs) && (offs < 16)) { tmp = readl(S5PC11X_GPH1CON); tmp |= (0xf << shift); writel(tmp , S5PC11X_GPH1CON); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_GPH1CON); // FIX for EVT0 bug #endif } else if((16 <= offs) && (offs < 24)) { tmp = readl(S5PC11X_GPH2CON); tmp |= (0xf << shift); writel(tmp , S5PC11X_GPH2CON); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_GPH2CON); // FIX for EVT0 bug #endif } else if((24 <= offs) && (offs < 32)) { tmp = readl(S5PC11X_GPH3CON); tmp |= (0xf << shift); writel(tmp , S5PC11X_GPH3CON); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_GPH3CON); // FIX for EVT0 bug #endif } else { printk(KERN_ERR "No such irq number %d", offs); return; } /*special handling for keypad eint*/ if( (24 <= irq) && (irq <= 27)) { // disable the pull up tmp = readl(S5PC11X_GPH3PUD); tmp &= ~(0x3 << ((offs & 0x7) * 2)); writel(tmp, S5PC11X_GPH3PUD); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_GPH3PUD); // FIX for EVT0 bug #endif DBG("S5PC11X_GPH3PUD = %x\n",readl(S5PC11X_GPH3PUD)); } /*Set irq type*/ mask = 0x7 << shift; ctrl = readl(S5PC11X_EINTCON(eint_conf_reg(irq))); ctrl &= ~mask; //ctrl |= newvalue << shift; ctrl |= intr_mode << shift; writel(ctrl, S5PC11X_EINTCON(eint_conf_reg(irq))); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_EINTCON(eint_conf_reg(irq))); #endif /*clear mask*/ mask = readl(S5PC11X_EINTMASK(eint_mask_reg(irq))); mask &= ~(eint_irq_to_bit(irq)); writel(mask, S5PC11X_EINTMASK(eint_mask_reg(irq))); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_EINTMASK(eint_mask_reg(irq))); #endif /*clear pending*/ mask = readl(S5PC11X_EINTPEND(eint_pend_reg(irq))); mask &= (eint_irq_to_bit(irq)); writel(mask, S5PC11X_EINTPEND(eint_pend_reg(irq))); #ifdef S5PC11X_ALIVEGPIO_STORE readl(S5PC11X_EINTPEND(eint_pend_reg(irq))); #endif /*Enable wake up mask*/ tmp = readl(S5P_EINT_WAKEUP_MASK); tmp &= ~(1 << (irq)); writel(tmp , S5P_EINT_WAKEUP_MASK); DBG("S5PC11X_EINTCON = %x\n",readl(S5PC11X_EINTCON(eint_conf_reg(irq)))); DBG("S5PC11X_EINTMASK = %x\n",readl(S5PC11X_EINTMASK(eint_mask_reg(irq)))); DBG("S5PC11X_EINTPEND = %x\n",readl(S5PC11X_EINTPEND(eint_pend_reg(irq)))); return; }