void _start()
{
/* copy data segment from flash to ram */
{
const size_t datalen = (size_t) &_edata - (unsigned int) &_sdata;
memcpy(&_sdata, &_sidata, datalen);
}
/* zero out bss segment */
{
const size_t bsslen = (size_t) &_ebss - (unsigned int) &_sbss;
memset(&_sbss, 0x0, bsslen);
}
SystemInit();
/* set process stack */
__set_PSP((uint32_t) &_eusrstack);
/* enable drivers */
for (size_t i = 0; i < sizeof(drivers); i++)
{
const driver_t* drv_p = drivers[i];
if (drv_p->driver_reset != NULL)
drv_p->driver_reset();
enable_clocks(drv_p);
}
(void) _init_crt1();
(void) main();
}
static int footswitch_disable(struct regulator_dev *rdev)
{
struct footswitch *fs = rdev_get_drvdata(rdev);
int rc;
rc = enable_clocks(fs);
if (rc)
return rc;
rc = set_rail_state(fs->pcom_id, PCOM_CLKCTL_RPC_RAIL_DISABLE);
if (!rc)
fs->is_enabled = false;
disable_clocks(fs);
return rc;
}
void nx_hwinit()
{
enable_clocks();
clock_enable_se();
clock_enable_fuse(1);
fuse_disable_program();
mc_enable();
config_oscillators();
_REG(0x70000000, 0x40) = 0;
config_gpios();
clock_enable_i2c(I2C_1);
clock_enable_i2c(I2C_5);
clock_enable(&clock_unk1);
clock_enable(&clock_unk2);
i2c_init(I2C_1);
i2c_init(I2C_5);
//Config PMIC (TODO: use max77620.h)
i2c_send_byte(I2C_5, 0x3C, 4, 0x40);
i2c_send_byte(I2C_5, 0x3C, 0x41, 0x78);
i2c_send_byte(I2C_5, 0x3C, 0x43, 0x38);
i2c_send_byte(I2C_5, 0x3C, 0x44, 0x3A);
i2c_send_byte(I2C_5, 0x3C, 0x45, 0x38);
i2c_send_byte(I2C_5, 0x3C, 0x4A, 0xF);
i2c_send_byte(I2C_5, 0x3C, 0x4E, 0xC7);
i2c_send_byte(I2C_5, 0x3C, 0x4F, 0x4F);
i2c_send_byte(I2C_5, 0x3C, 0x50, 0x29);
i2c_send_byte(I2C_5, 0x3C, 0x52, 0x1B);
i2c_send_byte(I2C_5, 0x3C, 0x16, 42); //42 = (1000 * 1125 - 600000) / 12500
config_pmc_scratch();
CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) & 0xFFFF8888 | 0x3333;
mc_config_carveout();
sdram_init();
}
