/* * From evt2irq to ilc2irq */ int ilc2irq(unsigned int evtcode) { struct ilc *ilc = get_irq_data(evt2irq(evtcode)); #if defined(CONFIG_CPU_SUBTYPE_STX5206) || \ defined(CONFIG_CPU_SUBTYPE_STX7108) || \ defined(CONFIG_CPU_SUBTYPE_STX7111) || \ defined(CONFIG_CPU_SUBTYPE_STX7141) unsigned int priority = 7; #elif defined(CONFIG_CPU_SUBTYPE_FLI7510) || \ defined(CONFIG_CPU_SUBTYPE_STX5197) || \ defined(CONFIG_CPU_SUBTYPE_STX7105) || \ defined(CONFIG_CPU_SUBTYPE_STX7200) unsigned int priority = 14 - evt2irq(evtcode); #endif unsigned long status; int idx; for (idx = 0, status = 0; idx < DIV_ROUND_UP(ilc->inputs_num, 32) && !status; ++idx) status = readl(ilc->base + ILC_BASE_STATUS + (idx << 2)) & readl(ilc->base + ILC_BASE_ENABLE + (idx << 2)) & ilc->priority[priority][idx]; if (!status) return -1; return ilc->first_irq + ((idx-1) * 32) + (ffs(status) - 1); }
int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; if (dev->bus->number == 0) { switch (slot) { case 4: return evt2irq(0x2a0); /* eth0 */ case 8: return evt2irq(0x2a0); /* eth1 */ case 6: return evt2irq(0x240); /* PCI bridge */ default: printk(KERN_ERR "PCI: Bad IRQ mapping request " "for slot %d\n", slot); return evt2irq(0x240); } } else { switch (pin) { case 0: irq = evt2irq(0x240); break; case 1: irq = evt2irq(0x240); break; case 2: irq = evt2irq(0x240); break; case 3: irq = evt2irq(0x240); break; case 4: irq = evt2irq(0x240); break; default: irq = -1; break; } } return irq; }
void __init sh7377_init_irq(void) { void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE); register_intc_controller(&intca_desc); register_intc_controller(&intcs_desc); /* demux using INTEVTSA */ irq_set_handler_data(evt2irq(INTCS_INTVECT), (void *)intevtsa); irq_set_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux); }
void __init sh7372_init_irq(void) { void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); register_intc_controller(&intca_desc); register_intc_controller(&intcs_desc); /* demux using INTEVTSA */ set_irq_data(evt2irq(0xf80), (void *)intevtsa); set_irq_chained_handler(evt2irq(0xf80), intcs_demux); }
int __init pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin) { switch (slot) { case 0: return evt2irq(0x3a0); case 1: return evt2irq(0x3a0); /* AMD Ethernet controller */ case 2: return -1; case 3: return -1; case 4: return -1; default: printk("PCI: Bad IRQ mapping request for slot %d\n", slot); return -1; } }
void __init sh7372_init_irq(void) { void __iomem *intevtsa; int n; intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE); intevtsa = intcs_ffd2 + 0x100; intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE); register_intc_controller(&intca_desc); register_intc_controller(&intca_irq_pins_lo_desc); register_intc_controller(&intca_irq_pins_hi_desc); register_intc_controller(&intcs_desc); /* setup dummy cascade chip for INTCS */ n = evt2irq(0xf80); irq_alloc_desc_at(n, numa_node_id()); irq_set_chip_and_handler_name(n, &dummy_irq_chip, handle_level_irq, "level"); set_irq_flags(n, IRQF_VALID); /* yuck */ /* demux using INTEVTSA */ irq_set_handler_data(n, (void *)intevtsa); irq_set_chained_handler(n, intcs_demux); /* unmask INTCS in INTAMASK */ iowrite16(0, intcs_ffd2 + 0x104); }
void __init sh7372_init_irq(void) { void __iomem *intevtsa; intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE); intevtsa = intcs_ffd2 + 0x100; intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE); register_intc_controller(&intca_desc); register_intc_controller(&intca_irq_pins_desc); register_intc_controller(&intcs_desc); irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); irq_set_chained_handler(evt2irq(0xf80), intcs_demux); }
void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs) { int i; for (i = 0; i < nr_vecs; i++) irq_reserve_irq(evt2irq(vectors[i].vect)); }
static int __init eraseconfig_init(void) { unsigned int irq = evt2irq(0x240); printk("SnapGear: EraseConfig init\n"); if (request_irq(irq, eraseconfig_interrupt, 0, "Erase Config", NULL)) printk("SnapGear: failed to register IRQ%d for Reset witch\n", irq); else printk("SnapGear: registered EraseConfig switch on IRQ%d\n", irq); return 0; }
.name = "physmap-flash", .dev = { .platform_data = &nor_flash_data, }, .num_resources = ARRAY_SIZE(nor_flash_resources), .resource = nor_flash_resources, }; /* SMSC 9220 */ static struct resource smc911x_resources[] = { { .start = 0x14000000, .end = 0x16000000 - 1, .flags = IORESOURCE_MEM, }, { .start = evt2irq(0x02c0) /* IRQ6A */, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, }, }; static struct smsc911x_platform_config smsc911x_info = { .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS, .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, }; static struct platform_device smc911x_device = { .name = "smsc911x", .id = -1, .num_resources = ARRAY_SIZE(smc911x_resources), .resource = smc911x_resources,
#define SCPDR 0xa4000136 /* CF Slot */ static struct resource cf_ide_resources[] = { [0] = { .start = 0x15000000 + 0x1f0, .end = 0x15000000 + 0x1f0 + 0x08 - 0x01, .flags = IORESOURCE_MEM, }, [1] = { .start = 0x15000000 + 0x1fe, .end = 0x15000000 + 0x1fe + 0x01, .flags = IORESOURCE_MEM, }, [2] = { .start = evt2irq(0xba0), .flags = IORESOURCE_IRQ, }, }; static struct platform_device cf_ide_device = { .name = "pata_platform", .id = -1, .num_resources = ARRAY_SIZE(cf_ide_resources), .resource = cf_ide_resources, }; static struct platform_device jornadakbd_device = { .name = "jornada680_kbd", .id = -1, };
static int stxh205_evttoirq(unsigned long evt) { return ((evt == 0xa00) ? ilc2irq(evt) : evt2irq(evt)); }
}; static struct resource dmac0_resources[] = { { .start = 0xfe008020, .end = 0xfe00808f, .flags = IORESOURCE_MEM, }, { .start = 0xfe009000, .end = 0xfe00900b, .flags = IORESOURCE_MEM, }, { .name = "error_irq", .start = evt2irq(0x5c0), .end = evt2irq(0x5c0), .flags = IORESOURCE_IRQ, }, { .start = evt2irq(0x500), .end = evt2irq(0x5a0), .flags = IORESOURCE_IRQ, }, }; static struct platform_device dma0_device = { .name = "sh-dma-engine", .id = 0, .resource = dmac0_resources, .num_resources = ARRAY_SIZE(dmac0_resources),
} static struct r8a66597_platdata usb_host_data = { .on_chip = 1, .port_power = usb_host_port_power, }; static struct resource usb_host_resources[] = { [0] = { .name = "USBHS", .start = 0xe6890000, .end = 0xe68900e5, .flags = IORESOURCE_MEM, }, [1] = { .start = evt2irq(0xa20), /* USBHS_USHI0 */ .flags = IORESOURCE_IRQ, }, }; static struct platform_device usb_host_device = { .name = "r8a66597_hcd", .id = 0, .dev = { .platform_data = &usb_host_data, .dma_mask = NULL, .coherent_dma_mask = 0xffffffff, }, .num_resources = ARRAY_SIZE(usb_host_resources), .resource = usb_host_resources, };
static const unsigned long whitelist[] = { STi7111_REGISTER_BASE + STi7111_DENC_BASE, STi7111_REGISTER_BASE + STi7111_DENC_BASE+PAGE_SIZE, STi7111_REGISTER_BASE + STi7111_DENC_BASE+(PAGE_SIZE*2), STi7111_REGISTER_BASE + STi7111_HDMI_BASE, _ALIGN_DOWN(STi7111_REGISTER_BASE + STi7111_BLITTER_BASE, PAGE_SIZE), }; static struct stmcore_display_pipeline_data platform_data[] = { { .owner = THIS_MODULE, .name = "STi7106-main", .device = 0, .vtg_irq = evt2irq(0x1540), .blitter_irq = evt2irq(0x1220), .hdmi_irq = evt2irq(0x15C0), #if defined(CONFIG_SH_ST_MB840) .hdmi_i2c_adapter_id = 3, #else .hdmi_i2c_adapter_id = 0, #endif .main_output_id = STi7111_OUTPUT_IDX_VDP0_MAIN, .aux_output_id = STi7111_OUTPUT_IDX_VDP0_AUX, .hdmi_output_id = STi7111_OUTPUT_IDX_VDP0_HDMI, .dvo_output_id = STi7111_OUTPUT_IDX_DVO0, .blitter_id = STi7111_BLITTER_IDX_VDP0_MAIN, .blitter_type = STMCORE_BLITTER_BDISPII,
.num_resources = ARRAY_SIZE(nor_flash_resources), .dev = { .platform_data = &nor_flash_data, }, }; /* SH Eth */ #define SH_ETH_ADDR (0xA4600000) static struct resource sh_eth_resources[] = { [0] = { .start = SH_ETH_ADDR, .end = SH_ETH_ADDR + 0x1FC, .flags = IORESOURCE_MEM, }, [1] = { .start = evt2irq(0xd60), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, }; static struct sh_eth_plat_data sh_eth_plat = { .phy = 0x1f, /* SMSC LAN8700 */ .edmac_endian = EDMAC_LITTLE_ENDIAN, .phy_interface = PHY_INTERFACE_MODE_MII, .ether_link_active_low = 1 }; static struct platform_device sh_eth_device = { .name = "sh7724-ether", .id = 0, .dev = {
.gpios = (struct stm_pad_gpio []) { STM_PAD_PIO_OUT(5, 0, 3), /* TX */ STM_PAD_PIO_IN(5, 1, -1), /* RX */ STM_PAD_PIO_IN_NAMED(5, 3, -1, "CTS"), STM_PAD_PIO_OUT_NAMED(5, 2, 3, "RTS"), }, }; static struct platform_device stx7105_asc_devices[] = { [0] = { .name = "stm-asc", /* .id set in stx7105_configure_asc() */ .num_resources = 4, .resource = (struct resource[]) { STM_PLAT_RESOURCE_MEM(0xfd030000, 0x2c), STM_PLAT_RESOURCE_IRQ(evt2irq(0x1160), -1), STM_PLAT_RESOURCE_DMA_NAMED("rx_half_full", 11), STM_PLAT_RESOURCE_DMA_NAMED("tx_half_empty", 15), }, .dev.platform_data = &(struct stm_plat_asc_data) { .pad_config = &stx7105_asc0_pio0_pad_config, }, }, [1] = { .name = "stm-asc", /* .id set in stx7105_configure_asc() */ .num_resources = 4, .resource = (struct resource[]) { STM_PLAT_RESOURCE_MEM(0xfd031000, 0x2c), STM_PLAT_RESOURCE_IRQ(evt2irq(0x1140), -1), STM_PLAT_RESOURCE_DMA_NAMED("rx_half_full", 12),
#include <linux/sh_dma.h> #include <linux/sh_intc.h> #include <linux/usb/ohci_pdriver.h> #include <cpu/dma-register.h> #include <asm/mmzone.h> static struct plat_sci_port scif0_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; static struct resource scif0_resources[] = { DEFINE_RES_MEM(0xffea0000, 0x100), DEFINE_RES_IRQ(evt2irq(0x700)), DEFINE_RES_IRQ(evt2irq(0x720)), DEFINE_RES_IRQ(evt2irq(0x760)), DEFINE_RES_IRQ(evt2irq(0x740)), }; static struct platform_device scif0_device = { .name = "sh-sci", .id = 0, .resource = scif0_resources, .num_resources = ARRAY_SIZE(scif0_resources), .dev = { .platform_data = &scif0_platform_data, }, };
static const unsigned long whitelist[] = { STi7111_REGISTER_BASE + STi7111_DENC_BASE, STi7111_REGISTER_BASE + STi7111_DENC_BASE+PAGE_SIZE, STi7111_REGISTER_BASE + STi7111_DENC_BASE+(PAGE_SIZE*2), STi7111_REGISTER_BASE + STi7111_HDMI_BASE, _ALIGN_DOWN(STi7111_REGISTER_BASE + STi7111_BLITTER_BASE, PAGE_SIZE), }; /* BDisp IRQs on 7111: all aq sharing 0x1580, cq1 ???, cq2 ??? */ static struct stmcore_display_pipeline_data platform_data[] = { { .owner = THIS_MODULE, .name = "STi7111-main", .device = 0, .vtg_irq = evt2irq(0x1540), .blitter_irq = evt2irq(0x1580), .blitter_irq_kernel = evt2irq(0x1580), .hdmi_irq = evt2irq(0x15C0), #if defined(UFS912) .hdmi_i2c_adapter_id = 3, #elif defined(SPARK) \ || defined(HS7110) \ || defined(HS7119) \ || defined(HS7420) \ || defined(HS7429) \ || defined(HS7810A) \ || defined(HS7819) \ || defined(ATEMIO520) \ || defined(ATEMIO530) .hdmi_i2c_adapter_id = 2,
.name = "heartbeat", .id = -1, .num_resources = 1, .resource = &heartbeat_resource, }; static struct resource smsc911x_resources[] = { [0] = { .name = "smsc911x-memory", .start = 0x07ffff00, .end = 0x07ffff00 + SZ_256 - 1, .flags = IORESOURCE_MEM, }, [1] = { .name = "smsc911x-irq", .start = evt2irq(0x2c0), .end = evt2irq(0x2c0), .flags = IORESOURCE_IRQ, }, }; static struct smsc911x_platform_config smsc911x_config = { .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, .flags = SMSC911X_USE_32BIT, .phy_interface = PHY_INTERFACE_MODE_MII, }; static struct platform_device smsc911x_device = { .name = "smsc911x", .id = -1,
}, [3] = &(struct stm_pad_config) { .gpios_num = 1, .gpios = (struct stm_pad_gpio []) { STM_PAD_PIO_OUT(8, 7, 1), }, }, #endif static struct platform_device fli7510_pwm_device = { .name = "stm-pwm", .id = -1, .num_resources = 2, .resource = (struct resource[]) { STM_PLAT_RESOURCE_MEM(0xfd010000, 0x68), STM_PLAT_RESOURCE_IRQ(evt2irq(0x11c0), -1), }, .dev.platform_data = &fli7510_pwm_platform_data, }; void __init fli7510_configure_pwm(struct fli7510_pwm_config *config) { static int configured; BUG_ON(configured); configured = 1; if (config) { fli7510_pwm_platform_data.channel_enabled[0] = config->out0_enabled; /* PWM output 0 is physically unavailable on 7520 & 7530 */
#include <linux/smsc911x.h> #include <linux/irq.h> #include <linux/clk.h> #include <asm/machvec.h> #include <asm/sizes.h> static struct resource smsc911x_resources[] = { [0] = { .name = "smsc911x-memory", .start = 0xA4000000, .end = 0xA4000000 + SZ_256 - 1, .flags = IORESOURCE_MEM, }, [1] = { .name = "smsc911x-irq", .start = evt2irq(0x200), .end = evt2irq(0x200), .flags = IORESOURCE_IRQ, }, }; static struct smsc911x_platform_config smsc911x_config = { .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, .flags = SMSC911X_USE_16BIT, .phy_interface = PHY_INTERFACE_MODE_MII, }; static struct platform_device smsc911x_device = { .name = "smsc911x", .id = -1,
} static struct r8a66597_platdata usb_host_data = { .on_chip = 1, .port_power = usb_host_port_power, }; static struct resource usb_host_resources[] = { [0] = { .name = "USBHS", .start = 0xe6890000, .end = 0xe68900e5, .flags = IORESOURCE_MEM, }, [1] = { .start = evt2irq(0x0a20), /* USBHS_USHI0 */ .flags = IORESOURCE_IRQ, }, }; static struct platform_device usb_host_device = { .name = "r8a66597_hcd", .id = 0, .dev = { .platform_data = &usb_host_data, .dma_mask = NULL, .coherent_dma_mask = 0xffffffff, }, .num_resources = ARRAY_SIZE(usb_host_resources), .resource = usb_host_resources, };
* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A) */ static struct smc91x_platdata smc91x_info = { .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, }; static struct resource smc91x_eth_resources[] = { [0] = { .name = "SMC91C111" , .start = 0x10000300, .end = 0x1000030f, .flags = IORESOURCE_MEM, }, [1] = { .start = evt2irq(0x600), /* IRQ0 */ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, }; static struct platform_device smc91x_eth_device = { .name = "smc91x", .num_resources = ARRAY_SIZE(smc91x_eth_resources), .resource = smc91x_eth_resources, .dev = { .platform_data = &smc91x_info, }, }; static struct sh_keysc_info sh_keysc_info = { .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
#include <linux/serial_sci.h> #include <linux/sh_dma.h> #include <linux/sh_timer.h> #include <linux/sh_intc.h> #include <cpu/dma-register.h> static struct plat_sci_port scif0_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; static struct resource scif0_resources[] = { DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_IRQ(evt2irq(0x700)), }; static struct platform_device scif0_device = { .name = "sh-sci", .id = 0, .resource = scif0_resources, .num_resources = ARRAY_SIZE(scif0_resources), .dev = { .platform_data = &scif0_platform_data, }, }; static struct plat_sci_port scif1_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
#include <soc/sti5206/sti5206reg.h> #include <soc/sti5206/sti5206device.h> static const unsigned long whitelist[] = { STi5206_REGISTER_BASE + STi5206_DENC_BASE, _ALIGN_DOWN(STi5206_REGISTER_BASE + STi5206_BLITTER_BASE, PAGE_SIZE), }; static struct stmcore_display_pipeline_data platform_data[] = { { .owner = THIS_MODULE, .name = "STi5206-main", .device = 0, .vtg_irq = evt2irq(0x1540), .blitter_irq = evt2irq(0x15C0), .blitter_irq_kernel = evt2irq(0x15E0), /* HDMI is connected via External HDMI TX * which is feed by SII9024 DVO */ .hdmi_irq = -1, .hdmi_i2c_adapter_id = -1, .hdmi_output_id = -1, .main_output_id = STi5206_OUTPUT_IDX_VDP0_MAIN, .dvo_output_id = STi5206_OUTPUT_IDX_DVO0, .blitter_id = STi5206_BLITTER_IDX_VDP0_MAIN, .blitter_id_kernel = STi5206_BLITTER_IDX_KERNEL,
/* * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't * enough to allocate the frame buffer memory. */ init_consistent_dma_size(12 << 20); } /* SCIFA0 */ static struct plat_sci_port scif0_platform_data = { .mapbase = 0xe6c40000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE, .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIFA, .irqs = { evt2irq(0x0c00), evt2irq(0x0c00), evt2irq(0x0c00), evt2irq(0x0c00) }, }; static struct platform_device scif0_device = { .name = "sh-sci", .id = 0, .dev = { .platform_data = &scif0_platform_data, }, }; /* SCIFA1 */ static struct plat_sci_port scif1_platform_data = { .mapbase = 0xe6c50000, .flags = UPF_BOOT_AUTOCONF,
.name = "physmap-flash", .dev = { .platform_data = &nor_flash_data, }, .num_resources = ARRAY_SIZE(nor_flash_resources), .resource = nor_flash_resources, }; /* SMSC */ static struct resource smc911x_resources[] = { { .start = 0x14000000, .end = 0x16000000 - 1, .flags = IORESOURCE_MEM, }, { .start = evt2irq(0x02c0) /* IRQ6A */, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, }, }; static struct smsc911x_platform_config smsc911x_info = { .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS, .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, }; static struct platform_device smc911x_device = { .name = "smsc911x", .id = -1, .num_resources = ARRAY_SIZE(smc911x_resources), .resource = smc911x_resources,
#define GBECONT_RMII0 BIT(16) static void sh7757_eth_set_mdio_gate(void *addr) { if (((unsigned long)addr & 0x00000fff) < 0x0800) writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); else writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); } static struct resource sh_eth0_resources[] = { { .start = 0xfef00000, .end = 0xfef001ff, .flags = IORESOURCE_MEM, }, { .start = evt2irq(0xc80), .end = evt2irq(0xc80), .flags = IORESOURCE_IRQ, }, }; static struct sh_eth_plat_data sh7757_eth0_pdata = { .phy = 1, .edmac_endian = EDMAC_LITTLE_ENDIAN, .set_mdio_gate = sh7757_eth_set_mdio_gate, }; static struct platform_device sh7757_eth0_device = { .name = "sh7757-ether", .resource = sh_eth0_resources, .id = 0,