static int exynos_tmu_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
exynos_tmu_initialize(pdev);
exynos_tmu_control(pdev, true);
return 0;
}
static int exynos_tmu_resume(struct platform_device *pdev)
{
int i;
bool on = false;
if (th_zone->mode == THERMAL_DEVICE_ENABLED)
on = true;
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
exynos_tmu_initialize(pdev, i);
exynos_tmu_control(pdev, i, on);
}
return 0;
}
static int __devinit exynos_tmu_probe(struct platform_device *pdev)
{
struct exynos_tmu_data *data;
struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
int ret, i;
if (!pdata)
pdata = exynos_get_driver_data(pdev);
if (!pdata) {
dev_err(&pdev->dev, "No platform init data supplied.\n");
return -ENODEV;
}
data = kzalloc(sizeof(struct exynos_tmu_data), GFP_KERNEL);
if (!data) {
dev_err(&pdev->dev, "Failed to allocate driver structure\n");
return -ENOMEM;
}
INIT_WORK(&data->irq_work, exynos_tmu_work);
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
data->irq[i] = platform_get_irq(pdev, i);
if (data->irq[i] < 0) {
ret = data->irq[i];
dev_err(&pdev->dev, "Failed to get platform irq\n");
goto err_free;
}
data->mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i);
if (!data->mem[i]) {
ret = -ENOENT;
dev_err(&pdev->dev, "Failed to get platform resource\n");
goto err_free;
}
data->mem[i] = request_mem_region(data->mem[i]->start,
resource_size(data->mem[i]), pdev->name);
if (!data->mem[i]) {
ret = -ENODEV;
dev_err(&pdev->dev, "Failed to request memory region\n");
goto err_free;
}
data->base[i] = ioremap(data->mem[i]->start, resource_size(data->mem[i]));
if (!data->base[i]) {
ret = -ENODEV;
dev_err(&pdev->dev, "Failed to ioremap memory\n");
goto err_mem_region;
}
ret = request_irq(data->irq[i], exynos_tmu_irq,
IRQF_TRIGGER_RISING, "exynos-tmu", data);
if (ret) {
dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq[i]);
goto err_io_remap;
}
}
data->clk = clk_get(NULL, "tmu_apbif");
if (IS_ERR(data->clk)) {
ret = PTR_ERR(data->clk);
dev_err(&pdev->dev, "Failed to get clock\n");
goto err_irq;
}
if (pdata->type == SOC_ARCH_EXYNOS5 ||
pdata->type == SOC_ARCH_EXYNOS4)
data->soc = pdata->type;
else {
ret = -EINVAL;
dev_err(&pdev->dev, "Platform not supported\n");
goto err_clk;
}
data->pdata = pdata;
platform_set_drvdata(pdev, data);
mutex_init(&data->lock);
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
ret = exynos_tmu_initialize(pdev, i);
if (ret) {
dev_err(&pdev->dev, "Failed to initialize TMU[%d]\n", i);
goto err_clk;
}
exynos_tmu_control(pdev, i, true);
}
/*Register the sensor with thermal management interface*/
(&exynos_sensor_conf)->private_data = data;
exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
pdata->trigger_level1_en + pdata->trigger_level2_en +
pdata->trigger_level3_en;
for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++) {
exynos_sensor_conf.trip_data.trip_val[i] =
pdata->threshold + pdata->trigger_levels[i];
exynos_sensor_conf.trip_data.boost_trip_val[i] =
pdata->threshold + pdata->boost_trigger_levels[i];
}
exynos_sensor_conf.cooling_data.freq_clip_count =
pdata->freq_tab_count;
exynos_sensor_conf.cooling_data.boost_mode = 0;
for (i = 0; i < pdata->freq_tab_count; i++) {
exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
pdata->freq_tab[i].freq_clip_max;
exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
pdata->freq_tab[i].temp_level;
exynos_sensor_conf.cooling_data.freq_data[i].mask_val = cpu_all_mask;
exynos_sensor_conf.cooling_data.size[i] =
pdata->size[i];
exynos_sensor_conf.cooling_data.boost_temps[i] =
pdata->boost_temps[i];
}
register_pm_notifier(&exynos_pm_nb);
ret = exynos_register_thermal(&exynos_sensor_conf);
if (ret) {
dev_err(&pdev->dev, "Failed to register thermal interface\n");
goto err_clk;
}
th_zone->exynos4_dev = pdev;
ret = sysfs_create_group(&pdev->dev.kobj, &exynos_thermal_sensor_attr_group);
if (ret)
dev_err(&pdev->dev, "cannot create thermal sensor attributes\n");
return 0;
err_clk:
platform_set_drvdata(pdev, NULL);
clk_put(data->clk);
err_irq:
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
if (data->irq[i])
free_irq(data->irq[i], data);
}
err_io_remap:
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
if (data->base[i])
iounmap(data->base[i]);
}
err_mem_region:
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
if (data->mem[i])
release_mem_region(data->mem[i]->start, resource_size(data->mem[i]));
}
err_free:
kfree(data);
return ret;
}
static void exynos_tmu_control(struct platform_device *pdev, int id, bool on)
{
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata = data->pdata;
unsigned int con = 0, interrupt_en = 0, interrupt_rise2_en = 0;
#ifdef CONFIG_SOC_EXYNOS5260
unsigned char gain;
if (id == 3)
gain = 0x6;
else if (id == 4)
gain = 0x9;
else
gain = pdata->gain;
#endif
mutex_lock(&data->lock);
clk_enable(data->clk);
#ifdef CONFIG_SOC_EXYNOS5260
con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
gain << EXYNOS_TMU_GAIN_SHIFT;
#else
con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
#endif
con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
if (on) {
con |= (EXYNOS_TMU_CORE_ON | EXYNOS_THERM_TRIP_EN);
interrupt_en =
pdata->trigger_level3_en << FALL_LEVEL3_SHIFT |
pdata->trigger_level2_en << FALL_LEVEL2_SHIFT |
pdata->trigger_level1_en << FALL_LEVEL1_SHIFT |
pdata->trigger_level0_en << FALL_LEVEL0_SHIFT |
pdata->trigger_level3_en << RISE_LEVEL3_SHIFT |
pdata->trigger_level2_en << RISE_LEVEL2_SHIFT |
pdata->trigger_level1_en << RISE_LEVEL1_SHIFT |
pdata->trigger_level0_en;
interrupt_rise2_en = 0x00000100;
} else {
con |= EXYNOS_TMU_CORE_OFF;
interrupt_en = 0; /* Disable all interrupts */
interrupt_rise2_en = 0;
}
con |= EXYNOS_THERM_TRIP_EN;
#ifdef CONFIG_SOC_EXYNOS5260
writel(0xffffffff, data->base[id] + EXYNOS5_THD_TEMP_RISE);
#endif
writel(interrupt_en, data->base[id] + EXYNOS_TMU_REG_INTEN);
#ifdef CONFIG_SOC_EXYNOS5260
writel(interrupt_rise2_en, data->base[id] + EXYNOS_TMU_REG_RISE2_INTEN);
#endif
writel(con, data->base[id] + EXYNOS_TMU_REG_CONTROL);
#ifdef CONFIG_SOC_EXYNOS5260
writel(0, data->base[id] + EXYNOS5_TMU_REG_CONTROL1);
#endif
#ifdef CONFIG_SOC_EXYNOS5260
writel(0x11110000, data->base[id] + EXYNOS_TMU_REG_INTCLEAR);
#endif
clk_disable(data->clk);
mutex_unlock(&data->lock);
#ifdef CONFIG_SOC_EXYNOS5260
exynos_tmu_initialize(pdev, id);
#endif
}
static int exynos_tmu_probe(struct platform_device *pdev)
{
struct exynos_tmu_data *data;
struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
int ret, i;
if (!pdata)
pdata = exynos_get_driver_data(pdev);
if (!pdata) {
dev_err(&pdev->dev, "No platform init data supplied.\n");
return -ENODEV;
}
data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
GFP_KERNEL);
if (!data) {
dev_err(&pdev->dev, "Failed to allocate driver structure\n");
return -ENOMEM;
}
data->irq = platform_get_irq(pdev, 0);
if (data->irq < 0) {
dev_err(&pdev->dev, "Failed to get platform irq\n");
return data->irq;
}
INIT_WORK(&data->irq_work, exynos_tmu_work);
data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!data->mem) {
dev_err(&pdev->dev, "Failed to get platform resource\n");
return -ENOENT;
}
data->base = devm_ioremap_resource(&pdev->dev, data->mem);
if (IS_ERR(data->base))
return PTR_ERR(data->base);
ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
IRQF_TRIGGER_RISING, "exynos-tmu", data);
if (ret) {
dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
return ret;
}
data->clk = clk_get(NULL, "tmu_apbif");
if (IS_ERR(data->clk)) {
dev_err(&pdev->dev, "Failed to get clock\n");
return PTR_ERR(data->clk);
}
if (pdata->type == SOC_ARCH_EXYNOS ||
pdata->type == SOC_ARCH_EXYNOS4210)
data->soc = pdata->type;
else {
ret = -EINVAL;
dev_err(&pdev->dev, "Platform not supported\n");
goto err_clk;
}
data->pdata = pdata;
platform_set_drvdata(pdev, data);
mutex_init(&data->lock);
ret = exynos_tmu_initialize(pdev);
if (ret) {
dev_err(&pdev->dev, "Failed to initialize TMU\n");
goto err_clk;
}
exynos_tmu_control(pdev, true);
/* Register the sensor with thermal management interface */
(&exynos_sensor_conf)->private_data = data;
exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
pdata->trigger_level1_en + pdata->trigger_level2_en +
pdata->trigger_level3_en;
for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
exynos_sensor_conf.trip_data.trip_val[i] =
pdata->threshold + pdata->trigger_levels[i];
exynos_sensor_conf.trip_data.trigger_falling = pdata->threshold_falling;
exynos_sensor_conf.cooling_data.freq_clip_count =
pdata->freq_tab_count;
for (i = 0; i < pdata->freq_tab_count; i++) {
exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
pdata->freq_tab[i].freq_clip_max;
exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
pdata->freq_tab[i].temp_level;
}
ret = exynos_register_thermal(&exynos_sensor_conf);
if (ret) {
dev_err(&pdev->dev, "Failed to register thermal interface\n");
goto err_clk;
}
ret = create_emulation_sysfs(&pdev->dev);
if (ret)
dev_err(&pdev->dev, "Failed to create emulation mode sysfs node\n");
return 0;
err_clk:
platform_set_drvdata(pdev, NULL);
clk_put(data->clk);
return ret;
}
static int __devinit exynos_tmu_probe(struct platform_device *pdev)
{
struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
int ret, i, count = 0;
int trigger_level_en[TRIP_EN_COUNT];
if (!pdata)
pdata = exynos_get_driver_data(pdev);
if (!pdata) {
dev_err(&pdev->dev, "No platform init data supplied.\n");
return -ENODEV;
}
tmudata = kzalloc(sizeof(struct exynos_tmu_data), GFP_KERNEL);
if (!tmudata) {
dev_err(&pdev->dev, "Failed to allocate driver structure\n");
return -ENOMEM;
}
INIT_WORK(&tmudata->irq_work, exynos_tmu_work);
#ifndef CONFIG_ARM_TRUSTZONE
/* ioremap for drex base address */
exynos4_base_drex0 = ioremap(EXYNOS4_PA_DMC0_4X12, SZ_64K);
exynos4_base_drex1 = ioremap(EXYNOS4_PA_DMC1_4X12, SZ_64K);
if(!exynos4_base_drex0 || !exynos4_base_drex1) {
ret = -ENOMEM;
goto err_drex_ioremap;
}
#endif
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
tmudata->irq[i] = platform_get_irq(pdev, i);
if (tmudata->irq[i] < 0) {
ret = tmudata->irq[i];
dev_err(&pdev->dev, "Failed to get platform irq\n");
goto err_get_resource;
}
tmudata->mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i);
if (!tmudata->mem[i]) {
ret = -ENOENT;
dev_err(&pdev->dev, "Failed to get platform resource\n");
goto err_get_resource;
}
tmudata->mem[i] = request_mem_region(tmudata->mem[i]->start,
resource_size(tmudata->mem[i]), pdev->name);
if (!tmudata->mem[i]) {
ret = -ENODEV;
dev_err(&pdev->dev, "Failed to request memory region\n");
goto err_mem_region;
}
tmudata->base[i] = ioremap(tmudata->mem[i]->start, resource_size(tmudata->mem[i]));
if (!tmudata->base[i]) {
ret = -ENODEV;
dev_err(&pdev->dev, "Failed to ioremap memory\n");
goto err_io_remap;
}
ret = request_irq(tmudata->irq[i], exynos_tmu_irq,
IRQF_TRIGGER_RISING, "exynos-tmu", tmudata);
if (ret) {
dev_err(&pdev->dev, "Failed to request irq: %d\n", tmudata->irq[i]);
goto err_irq;
}
}
tmudata->clk = clk_get(NULL, "tmu");
if (IS_ERR(tmudata->clk)) {
ret = PTR_ERR(tmudata->clk);
dev_err(&pdev->dev, "Failed to get clock\n");
goto err_clk;
}
if (pdata->type == SOC_ARCH_EXYNOS5 ||
pdata->type == SOC_ARCH_EXYNOS4)
tmudata->soc = pdata->type;
else {
ret = -EINVAL;
dev_err(&pdev->dev, "Platform not supported\n");
goto err_soc_type;
}
tmudata->pdata = pdata;
platform_set_drvdata(pdev, tmudata);
mutex_init(&tmudata->lock);
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
ret = exynos_tmu_initialize(pdev, i);
if (ret) {
dev_err(&pdev->dev, "Failed to initialize TMU[%d]\n", i);
goto err_tmu;
}
exynos_tmu_control(pdev, i, true);
}
/*Register the sensor with thermal management interface*/
(&exynos_sensor_conf)->private_data = tmudata;
exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
pdata->trigger_level1_en + pdata->trigger_level2_en +
pdata->trigger_level3_en;
trigger_level_en[0] = pdata->trigger_level0_en;
trigger_level_en[1] = pdata->trigger_level1_en;
trigger_level_en[2] = pdata->trigger_level2_en;
trigger_level_en[3] = pdata->trigger_level3_en;
for (i = 0; i < TRIP_EN_COUNT; i++) {
if (trigger_level_en[i]) {
exynos_sensor_conf.trip_data.trip_val[count] =
pdata->threshold + pdata->trigger_levels[i];
count++;
}
}
exynos_sensor_conf.cooling_data.freq_clip_count =
pdata->freq_tab_count;
for (i = 0; i <= THERMAL_TRIP_CRITICAL; i++)
exynos_sensor_conf.cooling_data.size[i] = pdata->size[i];
for (i = 0; i < pdata->freq_tab_count; i++) {
exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
pdata->freq_tab[i].freq_clip_max;
exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
pdata->freq_tab[i].temp_level;
exynos_sensor_conf.cooling_data.freq_data[i].mask_val = cpu_all_mask;
}
register_pm_notifier(&exynos_pm_nb);
ret = exynos_register_thermal(&exynos_sensor_conf);
if (ret) {
dev_err(&pdev->dev, "Failed to register thermal interface\n");
goto err_register;
}
th_zone->exynos4_dev = pdev;
/* For low temperature compensation when boot time */
exynos_tmu_call_notifier(1, 0);
#ifdef CONFIG_EXYNOS4_EXPORT_TEMP
tmu_curr_temperature = 35; // seems reasonable :-|
#endif
return 0;
err_register:
unregister_pm_notifier(&exynos_pm_nb);
err_tmu:
platform_set_drvdata(pdev, NULL);
err_soc_type:
clk_put(tmudata->clk);
err_clk:
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
if (tmudata->irq[i])
free_irq(tmudata->irq[i], tmudata);
}
err_irq:
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
if (tmudata->base[i])
iounmap(tmudata->base[i]);
}
err_io_remap:
for (i = 0; i < EXYNOS_TMU_COUNT; i++) {
if (tmudata->mem[i])
release_mem_region(tmudata->mem[i]->start, resource_size(tmudata->mem[i]));
}
err_mem_region:
err_get_resource:
#ifndef CONFIG_ARM_TRUSTZONE
iounmap(exynos4_base_drex0);
iounmap(exynos4_base_drex1);
err_drex_ioremap:
kfree(tmudata);
#endif
return ret;
}