int board_usb_init(int index, enum usb_init_type init)
{
int node;
const char *mode;
bool matched = false;
const void *blob = gd->fdt_blob;
/* find the usb_otg node */
node = fdt_node_offset_by_compatible(blob, -1,
"rockchip,rk3288-usb");
while (node > 0) {
mode = fdt_getprop(blob, node, "dr_mode", NULL);
if (mode && strcmp(mode, "otg") == 0) {
matched = true;
break;
}
node = fdt_node_offset_by_compatible(blob, node,
"rockchip,rk3288-usb");
}
if (!matched) {
debug("Not found usb_otg device\n");
return -ENODEV;
}
rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
return dwc2_udc_probe(&rk3036_otg_data);
}
void ipq_fdt_fixup_mtdparts(void *blob, struct node_info *ni)
{
struct mtd_device *dev;
char *parts;
int noff;
parts = getenv("mtdparts");
if (!parts)
return;
if (mtdparts_init() != 0)
return;
for (; ni->compat; ni++) {
noff = fdt_node_offset_by_compatible(blob, -1, ni->compat);
while (noff != -FDT_ERR_NOTFOUND) {
dev = device_find(ni->type, ni->idx);
if (dev) {
if (fdt_node_set_part_info(blob, noff, dev)) {
return; /* return on error */
}
}
/* Jump to next flash node */
noff = fdt_node_offset_by_compatible(blob, noff,
ni->compat);
}
}
}
/*
* Fixup all PCIe nodes by setting the device_type property
* to "pci-endpoint" instead is "pci" for endpoint ports.
* This property will get checked later by the Linux driver
* to properly configure the PCIe port in Linux (again).
*/
void fdt_pcie_setup(void *blob)
{
const char *compat = "ibm,plb-pciex";
const char *prop = "device_type";
const char *prop_val = "pci-endpoint";
const u32 *port;
int no;
int rc;
/* Search first PCIe node */
no = fdt_node_offset_by_compatible(blob, -1, compat);
while (no != -FDT_ERR_NOTFOUND) {
port = fdt_getprop(blob, no, "port", NULL);
if (port == NULL) {
printf("WARNING: could not find port property\n");
} else {
if (is_end_point(*port)) {
rc = fdt_setprop(blob, no, prop, prop_val,
strlen(prop_val) + 1);
if (rc < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop, compat, fdt_strerror(rc));
}
}
/* Jump to next PCIe node */
no = fdt_node_offset_by_compatible(blob, no, compat);
}
}
int board_late_init(void)
{
struct gpio_desc gpio = {};
int node;
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
if (node < 0)
return -1;
gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
GPIOD_IS_OUT);
if (dm_gpio_is_valid(&gpio)) {
dm_gpio_set_value(&gpio, 0);
mdelay(10);
dm_gpio_set_value(&gpio, 1);
}
/* read button 1*/
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
if (node < 0)
return -1;
gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
&gpio, GPIOD_IS_IN);
if (dm_gpio_is_valid(&gpio)) {
if (dm_gpio_get_value(&gpio))
puts("usr button is at HIGH LEVEL\n");
else
puts("usr button is at LOW LEVEL\n");
}
return 0;
}
int board_usb_init(int index, enum usb_init_type init)
{
int node, phy_node;
const char *mode;
bool matched = false;
const void *blob = gd->fdt_blob;
u32 grf_phy_offset;
/* find the usb_otg node */
node = fdt_node_offset_by_compatible(blob, -1,
"rockchip,rk3288-usb");
while (node > 0) {
mode = fdt_getprop(blob, node, "dr_mode", NULL);
if (mode && strcmp(mode, "otg") == 0) {
matched = true;
break;
}
node = fdt_node_offset_by_compatible(blob, node,
"rockchip,rk3288-usb");
}
if (!matched) {
debug("Not found usb_otg device\n");
return -ENODEV;
}
rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
node = fdtdec_lookup_phandle(blob, node, "phys");
if (node <= 0) {
debug("Not found usb phy device\n");
return -ENODEV;
}
phy_node = fdt_parent_offset(blob, node);
if (phy_node <= 0) {
debug("Not found usb phy device\n");
return -ENODEV;
}
rk3288_otg_data.phy_of_node = phy_node;
grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
/* find the grf node */
node = fdt_node_offset_by_compatible(blob, -1,
"rockchip,rk3288-grf");
if (node <= 0) {
debug("Not found grf device\n");
return -ENODEV;
}
rk3288_otg_data.regs_phy = grf_phy_offset +
fdtdec_get_addr(blob, node, "reg");
return dwc2_udc_probe(&rk3288_otg_data);
}
static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl)
{
int i, srio_off;
/* search for srio node, if doesn't exist just return - nothing todo */
srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
if (srio_off < 0)
return ;
for (i = 0; i < srio_liodn_tbl_sz; i++) {
int off, portid = tbl[i].portid;
off = fdt_node_offset_by_prop_value(blob, srio_off,
"cell-index", &portid, 4);
if (off >= 0) {
off = fdt_setprop(blob, off, "fsl,liodn",
&tbl[i].id[0],
sizeof(u32) * tbl[i].num_ids);
if (off > 0)
printf("WARNING unable to set fsl,liodn for "
"fsl,srio port %d: %s\n",
portid, fdt_strerror(off));
} else {
debug("WARNING: couldn't set fsl,liodn for srio: %s.\n",
fdt_strerror(off));
}
}
}
void reset_misc(void)
{
struct gpio_desc gpio = {};
int node;
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
"samsung,emmc-reset");
if (node < 0)
return;
gpio_request_by_name_nodev(gd->fdt_blob, node, "reset-gpio", 0, &gpio,
GPIOD_IS_OUT);
if (dm_gpio_is_valid(&gpio)) {
/*
* Reset eMMC
*
* FIXME: Need to optimize delay time. Minimum 1usec pulse is
* required by 'JEDEC Standard No.84-A441' (eMMC)
* document but real delay time is expected to greater
* than 1usec.
*/
dm_gpio_set_value(&gpio, 0);
mdelay(10);
dm_gpio_set_value(&gpio, 1);
}
}
static int owl_mac_parse_fdtdec(struct owl_mac_info *info)
{
int node,ret;
//const char *mac_compat = OWL_MAC_COMPAT;
node = fdt_node_offset_by_compatible(gd->fdt_blob,0,OWL_MAC_COMPAT);
if(node <= 0){
debug("Can't get owl-ethernet node\n");
return -1;
}
ret = fdtdec_get_is_enabled(gd->fdt_blob,node);
if(!ret){
debug("Disable by dts\n");
return -1;
}
info->phy_addr = fdtdec_get_int(gd->fdt_blob, node, "phy_addr", -1);
printf("owl_mac_parse_fdtdec,phy_addr %d\n",info->phy_addr);
owl_fdtdec_decode_gpio(gd->fdt_blob, node, "phy-power-gpios",&info->phy_power_gpio);
owl_fdtdec_decode_gpio(gd->fdt_blob, node, "phy-reset-gpios",&info->phy_reset_gpio);
printf("owl_mac_parse_fdtdec,power-gpio %d\n",info->phy_power_gpio.gpio,info->phy_power_gpio.flags);
printf("owl_mac_parse_fdtdec,reset-gpio %d\n",info->phy_reset_gpio.gpio,info->phy_reset_gpio.flags);
return 0;
}
/* Update portal containter to match LAW setup of portal in phy map */
void fdt_portal(void *blob, const char *compat, const char *container,
u64 addr, u32 size)
{
int off;
off = fdt_node_offset_by_compatible(blob, -1, compat);
if (off < 0)
return ;
off = fdt_parent_offset(blob, off);
/* if non-zero assume we have a container */
if (off > 0) {
char buf[60];
const char *p, *name;
u32 *range;
int len;
/* fixup ranges */
range = fdt_getprop_w(blob, off, "ranges", &len);
if (range == NULL) {
printf("ERROR: container for %s has no ranges", compat);
return ;
}
range[0] = 0;
if (len == 16) {
range[1] = addr >> 32;
range[2] = addr & 0xffffffff;
range[3] = size;
} else {
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
#ifdef CONFIG_ETH_DESIGNWARE
const char *phy_mode;
int node;
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
if (node < 0)
return -1;
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
switch (phy_get_interface_by_name(phy_mode)) {
case PHY_INTERFACE_MODE_RMII:
STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
break;
case PHY_INTERFACE_MODE_MII:
STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
break;
default:
printf("PHY interface %s not supported !\n", phy_mode);
}
#endif
#if defined(CONFIG_CMD_BMP)
bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
#endif /* CONFIG_CMD_BMP */
return 0;
}
static void *fdt_wrapper_find_node_by_compatible(const void *prev,
const char *val)
{
int offset = fdt_node_offset_by_compatible(fdt, devp_offset_find(prev),
val);
return offset_devp(offset);
}
int fdt_decode_usb(const void *blob, int node, unsigned osc_frequency_mhz,
struct fdt_usb *config)
{
int clk_node = 0, rate;
/* Find the parameters for our oscillator frequency */
do {
clk_node = fdt_node_offset_by_compatible(blob, clk_node,
"nvidia,tegra250-usbparams");
if (clk_node < 0)
return -FDT_ERR_MISSING;
rate = get_int(blob, clk_node, "osc-frequency", 0);
} while (rate != osc_frequency_mhz);
config->reg = (struct usb_ctlr *)get_addr(blob, node, "reg");
config->host_mode = get_int(blob, node, "host-mode", 0);
config->utmi = lookup_phandle(blob, node, "utmi") >= 0;
config->enabled = get_is_enabled(blob, node, 1);
config->periph_id = get_int(blob, node, "periph-id", -1);
if (config->periph_id == -1)
return -FDT_ERR_MISSING;
#if defined(CONFIG_TEGRA3)
decode_gpio(blob, node, "vbus-gpio", &config->vbus_gpio);
decode_gpio(blob, node, "vbus_pullup-gpio", &config->vbus_pullup_gpio);
#endif
return get_int_array(blob, clk_node, "params", config->params,
PARAM_COUNT);
}
/*******************************************************************************
* Helper to read the `disable_auth` property in config DTB. This function
* expects the following properties to be present in the config DTB.
* name : disable_auth size : 1 cell
*
* Arguments:
* void *dtb - pointer to the TB_FW_CONFIG in memory
* int node - The node offset to appropriate node in the
* DTB.
* uint64_t *disable_auth - The value of `disable_auth` property on
* successful read. Must be 0 or 1.
*
* Returns 0 on success and -1 on error.
******************************************************************************/
int arm_dyn_get_disable_auth(void *dtb, int node, uint32_t *disable_auth)
{
int err;
assert(dtb != NULL);
assert(disable_auth != NULL);
/* Check if the pointer to DT is correct */
assert(fdt_check_header(dtb) == 0);
/* Assert the node offset point to "arm,tb_fw" compatible property */
assert(node == fdt_node_offset_by_compatible(dtb, -1, "arm,tb_fw"));
/* Locate the disable_auth cell and read the value */
err = fdtw_read_cells(dtb, node, "disable_auth", 1, disable_auth);
if (err < 0) {
WARN("Read cell failed for `disable_auth`\n");
return -1;
}
/* Check if the value is boolean */
if ((*disable_auth != 0U) && (*disable_auth != 1U)) {
WARN("Invalid value for `disable_auth` cell %d\n", *disable_auth);
return -1;
}
VERBOSE("Dyn cfg: `disable_auth` cell found with value = %d\n",
*disable_auth);
return 0;
}
void ft_srio_setup(void *blob)
{
int srio1_used = 0, srio2_used = 0;
int srio_off;
/* search for srio node, if doesn't exist just return - nothing todo */
srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
if (srio_off < 0)
return ;
#ifdef CONFIG_SRIO1
if (is_serdes_configured(SRIO1))
srio1_used = 1;
#endif
#ifdef CONFIG_SRIO2
if (is_serdes_configured(SRIO2))
srio2_used = 1;
#endif
/* mark port1 disabled */
if (!srio1_used)
ft_disable_srio_port(blob, srio_off, 1);
/* mark port2 disabled */
if (!srio2_used)
ft_disable_srio_port(blob, srio_off, 2);
/* if both ports not used, disable controller, rmu and rman */
if (!srio1_used && !srio2_used) {
fdt_setprop_string(blob, srio_off, "status", "disabled");
ft_disable_rman(blob);
ft_disable_rmu(blob);
}
}
static int led_7seg_init(unsigned int segments)
{
int node;
int ret;
int i;
struct gpio_desc desc[8];
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
"atl,of-led-7seg");
if (node < 0)
return -ENODEV;
ret = gpio_request_list_by_name_nodev(offset_to_ofnode(node),
"segment-gpios", desc,
ARRAY_SIZE(desc), GPIOD_IS_OUT);
if (ret < 0)
return ret;
for (i = 0; i < ARRAY_SIZE(desc); i++) {
ret = dm_gpio_set_value(&desc[i], !(segments & BIT(i)));
if (ret)
return ret;
}
return 0;
}
static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,
int ep_liodn_start)
{
int off, pci_idx = 0, pci_cnt = 0, i, rc;
const uint32_t *base_liodn;
uint32_t liodn_offs[CONFIG_SYS_MAX_PCI_EPS + 1] = { 0 };
/*
* Count the number of pci nodes.
* It's needed later when the interleaved liodn offsets are generated.
*/
off = fdt_node_offset_by_compatible(fdt, -1, compat);
while (off != -FDT_ERR_NOTFOUND) {
pci_cnt++;
off = fdt_node_offset_by_compatible(fdt, off, compat);
}
for (off = fdt_node_offset_by_compatible(fdt, -1, compat);
off != -FDT_ERR_NOTFOUND;
off = fdt_node_offset_by_compatible(fdt, off, compat)) {
base_liodn = fdt_getprop(fdt, off, "fsl,liodn", &rc);
if (!base_liodn) {
char path[64];
if (fdt_get_path(fdt, off, path, sizeof(path)) < 0)
strcpy(path, "(unknown)");
printf("WARNING Could not get liodn of node %s: %s\n",
path, fdt_strerror(rc));
continue;
}
for (i = 0; i < CONFIG_SYS_MAX_PCI_EPS; i++)
liodn_offs[i + 1] = ep_liodn_start +
i * pci_cnt + pci_idx - *base_liodn;
rc = fdt_setprop(fdt, off, "fsl,liodn-offset-list",
liodn_offs, sizeof(liodn_offs));
if (rc) {
char path[64];
if (fdt_get_path(fdt, off, path, sizeof(path)) < 0)
strcpy(path, "(unknown)");
printf("WARNING Unable to set fsl,liodn-offset-list for "
"node %s: %s\n", path, fdt_strerror(rc));
continue;
}
pci_idx++;
}
}
void fsl_fdt_disable_usb(void *blob)
{
int off;
/*
* SYSCLK is used as a reference clock for USB. When the USB
* controller is used, SYSCLK must meet the additional requirement
* of 100 MHz.
*/
if (CONFIG_SYS_CLK_FREQ != 100000000) {
off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
while (off != -FDT_ERR_NOTFOUND) {
fdt_status_disabled(blob, off);
off = fdt_node_offset_by_compatible(blob, off,
"snps,dwc3");
}
}
}
void do_fixup_by_compat(void *fdt, const char *compat,
const char *prop, const void *val, int len, int create)
{
int off = -1;
#if defined(DEBUG)
int i;
debug("Updating property '%s' = ", prop);
for (i = 0; i < len; i++)
debug(" %.2x", *(u8*)(val+i));
debug("\n");
#endif
off = fdt_node_offset_by_compatible(fdt, -1, compat);
while (off != -FDT_ERR_NOTFOUND) {
if (create || (fdt_get_property(fdt, off, prop, 0) != NULL))
fdt_setprop(fdt, off, prop, val, len);
off = fdt_node_offset_by_compatible(fdt, off, compat);
}
}
void fdt_del_sdhc(void *blob)
{
int nodeoff = 0;
while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
"fsl,esdhc")) >= 0) {
fdt_del_node(blob, nodeoff);
}
}
int sunxi_simplefb_fdt_match(void *blob, const char *pipeline)
{
int offset, ret;
/* Find a prefilled simpefb node, matching out pipeline config */
offset = fdt_node_offset_by_compatible(blob, -1,
"allwinner,simple-framebuffer");
while (offset >= 0) {
ret = fdt_stringlist_search(blob, offset, "allwinner,pipeline",
pipeline);
if (ret == 0)
break;
offset = fdt_node_offset_by_compatible(blob, offset,
"allwinner,simple-framebuffer");
}
return offset;
}
void fdt_del_spi_slic(void *blob)
{
int nodeoff = 0;
while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
"zarlink,le88266")) >= 0) {
fdt_del_node(blob, nodeoff);
}
}
void fdt_del_spi_flash(void *blob)
{
int nodeoff = 0;
while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
"spansion,s25sl12801")) >= 0) {
fdt_del_node(blob, nodeoff);
}
}
void fdt_del_flexcan(void *blob)
{
int nodeoff = 0;
while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
"fsl,p1010-flexcan")) >= 0) {
fdt_del_node(blob, nodeoff);
}
}
void fdt_del_tdm(void *blob)
{
int nodeoff = 0;
while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
"fsl,starlite-tdm")) >= 0) {
fdt_del_node(blob, nodeoff);
}
}
static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
const char *phy_type, int start_offset)
{
const char *compat_dr = "fsl-usb2-dr";
const char *compat_mph = "fsl-usb2-mph";
const char *prop_mode = "dr_mode";
const char *prop_type = "phy_type";
const char *node_type = NULL;
int node_offset;
int err;
node_offset = fdt_node_offset_by_compatible(blob,
start_offset, compat_mph);
if (node_offset < 0) {
node_offset = fdt_node_offset_by_compatible(blob,
start_offset, compat_dr);
if (node_offset < 0) {
printf("WARNING: could not find compatible"
" node %s or %s: %s.\n", compat_mph,
compat_dr, fdt_strerror(node_offset));
return -1;
} else
node_type = compat_dr;
} else
node_type = compat_mph;
if (mode) {
err = fdt_setprop(blob, node_offset, prop_mode, mode,
strlen(mode) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_mode, node_type, fdt_strerror(err));
}
if (phy_type) {
err = fdt_setprop(blob, node_offset, prop_type, phy_type,
strlen(phy_type) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_type, node_type, fdt_strerror(err));
}
return node_offset;
}
static void setup_axp803_rails(const void *fdt)
{
int node;
bool dc1sw = false;
/* locate the PMIC DT node, bail out if not found */
node = fdt_node_offset_by_compatible(fdt, -1, "x-powers,axp803");
if (node == -FDT_ERR_NOTFOUND) {
WARN("BL31: PMIC: No AXP803 DT node, skipping initial setup.\n");
return;
}
if (fdt_getprop(fdt, node, "x-powers,drive-vbus-en", NULL)) {
axp_clrbits(0x8f, BIT(4));
axp_setbits(0x30, BIT(2));
INFO("PMIC: AXP803: Enabling DRIVEVBUS\n");
}
/* descend into the "regulators" subnode */
node = fdt_first_subnode(fdt, node);
/* iterate over all regulators to find used ones */
for (node = fdt_first_subnode(fdt, node);
node != -FDT_ERR_NOTFOUND;
node = fdt_next_subnode(fdt, node)) {
struct axp_regulator *reg;
const char *name;
int length;
/* We only care if it's always on or referenced. */
if (!should_enable_regulator(fdt, node))
continue;
name = fdt_get_name(fdt, node, &length);
for (reg = regulators; reg->dt_name; reg++) {
if (!strncmp(name, reg->dt_name, length)) {
setup_regulator(fdt, node, reg);
break;
}
}
if (!strncmp(name, "dc1sw", length)) {
/* Delay DC1SW enablement to avoid overheating. */
dc1sw = true;
continue;
}
}
/*
* If DLDO2 is enabled after DC1SW, the PMIC overheats and shuts
* down. So always enable DC1SW as the very last regulator.
*/
if (dc1sw) {
INFO("PMIC: AXP803: Enabling DC1SW\n");
axp_setbits(0x12, BIT(7));
}
}
static inline void ft_disable_rmu(void *blob)
{
int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu");
if (off >= 0) {
off = fdt_setprop_string(blob, off, "status", "disabled");
if (off > 0)
printf("WARNING unable to set status for "
"fsl,srio-rmu %s\n", fdt_strerror(off));
}
}
static int rk818_parse_dt(const void* blob)
{
int node, nd;
struct fdt_gpio_state gpios[2];
u32 bus, addr;
int ret, i;
node = fdt_node_offset_by_compatible(blob,
0, COMPAT_ROCKCHIP_RK818);
if (node < 0) {
printf("can't find dts node for rk818\n");
return -ENODEV;
}
if (!fdt_device_is_available(blob,node)) {
printf("device rk818 is disabled\n");
return -1;
}
ret = fdt_get_i2c_info(blob, node, &bus, &addr);
if (ret < 0) {
printf("pmic rk818 get fdt i2c failed\n");
return ret;
}
ret = rk818_i2c_probe(bus, addr);
if (ret < 0) {
printf("pmic rk818 i2c probe failed\n");
return ret;
}
nd = fdt_get_regulator_node(blob, node);
if (nd < 0)
printf("%s: Cannot find regulators\n", __func__);
else
fdt_regulator_match(blob, nd, rk818_reg_matches,
RK818_NUM_REGULATORS);
for (i = 0; i < RK818_NUM_REGULATORS; i++) {
if (rk818_reg_matches[i].boot_on && (rk818_reg_matches[i].min_uV == rk818_reg_matches[i].max_uV))
ret = rk818_set_regulator_init(&rk818_reg_matches[i], i);
}
fdtdec_decode_gpios(blob, node, "gpios", gpios, 2);
support_dc_chg = fdtdec_get_int(blob, node, "rk818,support_dc_chg",0);
rk818.pmic = pmic_alloc();
rk818.node = node;
rk818.pmic->hw.i2c.addr = addr;
rk818.pmic->bus = bus;
debug("rk818 i2c_bus:%d addr:0x%02x\n", rk818.pmic->bus,
rk818.pmic->hw.i2c.addr);
return 0;
}
static int rk808_parse_dt(const void* blob)
{
int node, parent, nd;
u32 i2c_bus_addr, bus;
int ret;
fdt_addr_t addr;
struct fdt_gpio_state gpios[2];
node = fdt_node_offset_by_compatible(blob,
0, COMPAT_ROCKCHIP_RK808);
if (node < 0) {
printf("can't find dts node for rk808\n");
return -ENODEV;
}
if (!fdt_device_is_available(blob,node)) {
debug("device rk808 is disabled\n");
return -1;
}
addr = fdtdec_get_addr(blob, node, "reg");
fdtdec_decode_gpios(blob, node, "gpios", gpios, 2);
parent = fdt_parent_offset(blob, node);
if (parent < 0) {
debug("%s: Cannot find node parent\n", __func__);
return -1;
}
i2c_bus_addr = fdtdec_get_addr(blob, parent, "reg");
bus = i2c_get_bus_num_fdt(i2c_bus_addr);
ret = rk808_i2c_probe(bus, addr);
if (ret < 0) {
debug("pmic rk808 i2c probe failed\n");
return ret;
}
nd = fdt_get_regulator_node(blob, node);
if (nd < 0)
printf("%s: Cannot find regulators\n", __func__);
else
fdt_regulator_match(blob, nd, rk808_reg_matches,
RK808_NUM_REGULATORS);
rk808.pmic = pmic_alloc();
rk808.node = node;
rk808.pmic->hw.i2c.addr = addr;
rk808.pmic->bus = bus;
rk808.pwr_hold.gpio = rk_gpio_base_to_bank(gpios[1].gpio & RK_GPIO_BANK_MASK) |
(gpios[1].gpio & RK_GPIO_PIN_MASK);
rk808.pwr_hold.flags = !(gpios[1].flags & OF_GPIO_ACTIVE_LOW);
debug("rk808 i2c_bus:%d addr:0x%02x\n", rk808.pmic->bus,
rk808.pmic->hw.i2c.addr);
return 0;
}
static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)
{
const char *status = "disabled";
int off = -1;
if (!hwconfig("esdhc"))
return;
if (esdhc_disables_uart0())
fdt_board_disable_serial(blob, bd, "serial0");
while (1) {
const u32 *idx;
int len;
off = fdt_node_offset_by_compatible(blob, off, "fsl-i2c");
if (off < 0)
break;
idx = fdt_getprop(blob, off, "cell-index", &len);
if (!idx || len != sizeof(*idx))
continue;
if (*idx == 1) {
fdt_setprop(blob, off, "status", status,
strlen(status) + 1);
break;
}
}
if (hwconfig_subarg_cmp("esdhc", "mode", "4-bits")) {
off = fdt_node_offset_by_compatible(blob, -1, "fsl,esdhc");
if (off < 0) {
printf("WARNING: could not find esdhc node\n");
return;
}
fdt_delprop(blob, off, "sdhci,1-bit-only");
}
}
