/* Must be called with fimc.slock spinlock held. */ static void fimc_lite_config_update(struct fimc_lite *fimc) { flite_hw_set_window_offset(fimc, &fimc->inp_frame); flite_hw_set_dma_window(fimc, &fimc->out_frame); flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); clear_bit(ST_FLITE_CONFIG, &fimc->state); }
/* Enable/disable output DMA, set output pixel size and offsets (composition) */ void flite_hw_set_output_dma(struct fimc_lite *dev, struct flite_frame *f, bool enable) { u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); if (!enable) { cfg |= FLITE_REG_CIGCTRL_ODMA_DISABLE; writel(cfg, dev->regs + FLITE_REG_CIGCTRL); return; } cfg &= ~FLITE_REG_CIGCTRL_ODMA_DISABLE; writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_out_order(dev, f); flite_hw_set_dma_window(dev, f); }