/* Deallocate memory for a list of instructions */
void free_instructions(Instruction* inst)
{
Instruction* previous;
while(inst)
{
previous = inst;
inst = inst->next;
free_operations(previous->operations);
free(previous);
}
}
void run_simulation ()
{
int *order;
int i;
int perm_count;
Entry_State entry_first, entry_current;
int error = 0;
init_entry_state (&entry_first);
fprintf (sim.fout, "initial entry state :\n");
dump_entry_state (&entry_first);
if (sim.ops == NULL)
{
generate_operations (&sim.ops, &sim.op_count);
}
fprintf (sim.fout, "initial operation set:\n");
dump_operations (sim.ops, sim.op_count, NULL/* order */);
//DebugBreak ();
perm_count = get_perm_count (sim.op_count);
for (i = 0; i < perm_count; i++)
{
fprintf (sim.fout, "--------------------------------\n");
fprintf (sim.fout, "simulation run %d\n", i + 1);
fprintf (sim.fout, "--------------------------------\n");
order = generate_operation_order (sim.op_count, i);
if (i == 0)
apply_operation_sequence (sim.ops, sim.op_count, order, &entry_first);
else
{
apply_operation_sequence (sim.ops, sim.op_count, order, &entry_current);
error |= compare_entry_state (&entry_first, &entry_current, i + 1);
}
}
switch (error)
{
case 0: fprintf (sim.fout, "all runs left the entry in the same state\n");
break;
case 1: fprintf (sim.fout, "while value presence is consistent across all runs, "
"the exact state does not match\n");
break;
case 3: fprintf (sim.fout, "the runs left entries in an inconsistent state\n");
break;
}
free_operations (&sim.ops);
}
