uint64_t MESIBottomCC::processEviction(Address wbLineAddr, uint32_t lineId, bool lowerLevelWriteback, uint64_t cycle, uint32_t srcId) {
MESIState* state = &array[lineId];
if (lowerLevelWriteback) {
//If this happens, when tcc issued the invalidations, it got a writeback. This means we have to do a PUTX, i.e. we have to transition to M if we are in E
assert(*state == M || *state == E); //Must have exclusive permission!
*state = M; //Silent E->M transition (at eviction); now we'll do a PUTX
}
uint64_t respCycle = cycle;
switch (*state) {
case I:
break; //Nothing to do
case S:
case E:
{
MemReq req = {wbLineAddr, PUTS, selfId, state, cycle, &ccLock, *state, srcId, 0 /*no flags*/};
//std::cout<<"access:("<<std::hex<<addr<<","<<wbLineAddr<<"PUTS)"<<std::endl;
respCycle = parents[getParentId(wbLineAddr)]->access(req);
}
break;
case M:
{
MemReq req = {wbLineAddr, PUTX, selfId, state, cycle, &ccLock, *state, srcId, 0 /*no flags*/};
//std::cout<<"dirty eviction "<<std::hex<<(wbLineAddr)<<","<<srcId<<std::endl;
//std::cout<<parents[getParentId(wbLineAddr)]->getName()<<std::endl;
respCycle = parents[getParentId(wbLineAddr)]->access(req);
}
break;
default: panic("!?");
}
assert_msg(*state == I, "Wrong final state %s on eviction", MESIStateName(*state));
return respCycle;
}
uint64_t exclusive_MESIBottomCC::processEviction(Address wbLineAddr, uint32_t lineId, bool lowerLevelWriteback, uint64_t cycle, uint32_t srcId) {
//we don't do lower level writeback because the cache is exclusive
MESIState* state = &array[lineId];
uint64_t respCycle = cycle;
switch (*state) {
case I:
break; //Nothing to do
case S:
case E:
{
MemReq req = {wbLineAddr, PUTS, selfId, state, cycle, &ccLock, *state, srcId, 0 /*no flags*/};
respCycle = parents[getParentId(wbLineAddr)]->access(req);
}
break;
case M:
{
MemReq req = {wbLineAddr, PUTX, selfId, state, cycle, &ccLock, *state, srcId, 0 /*no flags*/};
respCycle = parents[getParentId(wbLineAddr)]->access(req);
}
break;
default: panic("!?");
}
assert_msg(*state == I, "Wrong final state %s on eviction", MESIStateName(*state));
return respCycle;
}
void EvtHypNonLepton::init() {
if(getNArg()<2 || getNArg()>3) { // alpha phi gamma delta
EvtGenReport(EVTGEN_ERROR,"EvtGen") << " ERROR: EvtHypNonLepton generator expected 2 or 3 arguments but found: " << getNArg() << std::endl;
EvtGenReport(EVTGEN_INFO ,"EvtGen") << " 1. Decay asymmetry parameter - alpha" << std::endl;
EvtGenReport(EVTGEN_INFO ,"EvtGen") << " 2. Parameter phi - in degrees (not radians)" << std::endl;
EvtGenReport(EVTGEN_INFO ,"EvtGen") << " 3. Note on every x-th decay" << std::endl;
::abort();
}
if(getNDaug()!=2) { // Check that there are 2 daughters only
EvtGenReport(EVTGEN_ERROR,"EvtGen") << " ERROR: EvtHypNonLepton generator expected 2 daughters but found: " << getNDaug() << std::endl;
::abort();
}
// Check particles spins
if(EvtSpinType::getSpin2(EvtPDL::getSpinType(getParentId()))!=1) {
EvtGenReport(EVTGEN_ERROR,"EvtGen") << " ERROR: EvtHypNonLepton generator expected dirac parent particle, but found " << EvtSpinType::getSpin2(EvtPDL::getSpinType(getParentId())) << " spin degrees of freedom" << std::endl;
::abort();
}
if(EvtSpinType::getSpin2(EvtPDL::getSpinType(getDaug(0)))!=1) {
EvtGenReport(EVTGEN_ERROR,"EvtGen") << " ERROR: EvtHypNonLepton generator expected the first child to be dirac particle, but found " << EvtSpinType::getSpin2(EvtPDL::getSpinType(getDaug(0))) << " spin degrees of freedom" << std::endl;
::abort();
}
if(EvtSpinType::getSpin2(EvtPDL::getSpinType(getDaug(1)))!=0) {
EvtGenReport(EVTGEN_ERROR,"EvtGen") << " ERROR: EvtHypNonLepton generator expected the second child to be scalar particle, but found " << EvtSpinType::getSpin2(EvtPDL::getSpinType(getDaug(1))) << " spin degrees of freedom" << std::endl;
::abort();
}
// Read all parameters
m_alpha = getArg(0);
m_phi = getArg(1)*EvtConst::pi/180;
if(getNArg()==3) m_noTries = static_cast<long>(getArg(2));
else m_noTries = 0;
// calculate additional parameters
double p,M,m1,m2;
double p_to_s,beta,delta,gamma;
M = EvtPDL::getMass(getParentId());
m1 = EvtPDL::getMass(getDaug(0));
m2 = EvtPDL::getMass(getDaug(1));
if(m1+m2>=M) {
EvtGenReport(EVTGEN_ERROR,"EvtGen") << " ERROR: EvtHypNonLepton found impossible decay: " << M << " --> " << m1 << " + " << m2 << " GeV\n" << std::endl;
::abort();
}
p = sqrt(M*M-(m1+m2)*(m1+m2))*sqrt(M*M-(m1-m2)*(m1-m2))/2./M;
beta = sqrt(1.-m_alpha*m_alpha)*sin(m_phi);
delta = -atan2(beta,m_alpha);
gamma = sqrt(1.-m_alpha*m_alpha-beta*beta);
p_to_s = sqrt((1.-gamma)/(1.+gamma));
m_B_to_A = p_to_s*(m1+sqrt(p*p+m1*m1))/p*EvtComplex(cos(delta),sin(delta));
}
// @TODO: This is a dependency on WorldManager that could be avoided by having an
// Object instance hold a reference to it's parent.
// objects reference their parents - we just do not know who is the final (permissiongiving) container
// as it is it will return either the player or the building owning the item regardless in what container it is
// @TODO: what if the player is in a building ???
const Object* Object::getRootParent() const
{
// If there's no parent id then this is the root object.
if (! getParentId())
{
return this;
}
// Otherwise get the parent for this object and call getRootParent on it.
Object* parent = gWorldManager->getObjectById(getParentId());
assert(parent && "Unable to find root parent in WorldManager");
return parent->getRootParent();
}
void EvtPropSLPole::decay( EvtParticle *p ){
if(! _isProbMaxSet){
EvtId parnum,mesnum,lnum,nunum;
parnum = getParentId();
mesnum = getDaug(0);
lnum = getDaug(1);
nunum = getDaug(2);
double mymaxprob = calcMaxProb(parnum,mesnum,
lnum,nunum,SLPoleffmodel);
setProbMax(mymaxprob);
_isProbMaxSet = true;
}
double minKstMass = EvtPDL::getMinMass(p->getDaug(0)->getId());
double maxKstMass = EvtPDL::getMaxMass(p->getDaug(0)->getId());
EvtIntervalFlatPdf flat(minKstMass, maxKstMass);
EvtPdfGen<EvtPoint1D> gen(flat);
EvtPoint1D point = gen();
double massKst = point.value();
p->getDaug(0)->setMass(massKst);
p->initializePhaseSpace(getNDaug(),getDaugs());
// EvtVector4R p4meson = p->getDaug(0)->getP4();
calcamp->CalcAmp(p,_amp2,SLPoleffmodel);
EvtParticle *mesonPart = p->getDaug(0);
double meson_BWAmp = calBreitWigner(mesonPart, point);
int list[2];
list[0]=0; list[1]=0;
_amp2.vertex(0,0,_amp2.getAmp(list)*meson_BWAmp);
list[0]=0; list[1]=1;
_amp2.vertex(0,1,_amp2.getAmp(list)*meson_BWAmp);
list[0]=1; list[1]=0;
_amp2.vertex(1,0,_amp2.getAmp(list)*meson_BWAmp);
list[0]=1; list[1]=1;
_amp2.vertex(1,1,_amp2.getAmp(list)*meson_BWAmp);
list[0]=2; list[1]=0;
_amp2.vertex(2,0,_amp2.getAmp(list)*meson_BWAmp);
list[0]=2; list[1]=1;
_amp2.vertex(2,1,_amp2.getAmp(list)*meson_BWAmp);
return;
}
uint64_t MESIBottomCC::processNonInclusiveWriteback(Address lineAddr, AccessType type, uint64_t cycle, MESIState* state, uint32_t srcId, uint32_t flags) {
if (!nonInclusiveHack) panic("Non-inclusive %s on line 0x%lx, this cache should be inclusive", AccessTypeName(type), lineAddr);
//info("Non-inclusive wback, forwarding");
MemReq req = {lineAddr, type, selfId, state, cycle, &ccLock, *state, srcId, flags | MemReq::NONINCLWB};
uint64_t respCycle = parents[getParentId(lineAddr)]->access(req);
return respCycle;
}
// @TODO: This is a dependency on WorldManager that could be avoided by having an
// Object instance hold a reference to it's parent.
// objects reference their parents - we just do not know who is the final (permissiongiving) container
// as it is it will return either the player or the building owning the item regardless in what container it is
// @TODO: what if the player is in a building ???
const Object* Object::getRootParent() const
{
// If there's no parent id then this is the root object.
if (! getParentId())
{
return this;
}
// Otherwise get the parent for this object and call getRootParent on it.
Object* parent = gWorldManager->getObjectById(getParentId());
if(!parent)
{
return this;
}
return parent->getRootParent();
}
void SceneComponent::serialize(Serializer& serializer)
{
Component::serialize(serializer);
serializer.save("visible", isVisible());
serializer.save("parent", getParentId());
serializer.save("pos", getPosition());
serializer.save("rot", getRotation());
serializer.save("sca", getScale());
serializer.save("z", getZ());
}
uint64_t flexclusive_MESIBottomCC::processNonInclusiveWriteback(
Address lineAddr, AccessType type, uint64_t cycle, MESIState* state,
uint32_t srcId, uint32_t flags) {
// info("Non-inclusive wback, forwarding");
MemReq req = {lineAddr, type, selfId,
state, cycle, &ccLock,
*state, srcId, flags | MemReq::NONINCLWB};
uint64_t respCycle = parents[getParentId(lineAddr)]->access(req);
return respCycle;
}
//=============================================================================
// Initialisation method
//=============================================================================
void EvtBToDDalitzCPK::init ( )
{
// Check that there are 3 arguments
checkNArg( 3 ) ;
// Check that there are 2 daughters
checkNDaug( 2 ) ;
// Check that the particles of the decay are :
// B+/- -> D0/bar K+/-
// B+/- -> K+/- D0/bar
// B0/bar -> K*0/bar D0/bar
// and nothing else ...
static EvtId BP = EvtPDL::getId( "B+" ) ;
static EvtId BM = EvtPDL::getId( "B-" ) ;
static EvtId B0 = EvtPDL::getId( "B0" ) ;
static EvtId B0B = EvtPDL::getId( "anti-B0" ) ;
static EvtId KP = EvtPDL::getId( "K+" ) ;
static EvtId KM = EvtPDL::getId( "K-" ) ;
static EvtId KS = EvtPDL::getId( "K*0" ) ;
static EvtId KSB = EvtPDL::getId( "anti-K*0" ) ;
static EvtId D0 = EvtPDL::getId( "D0" ) ;
static EvtId D0B = EvtPDL::getId( "anti-D0" ) ;
_flag = 0 ;
EvtId parent = getParentId() ;
EvtId d1 = getDaug( 0 ) ;
EvtId d2 = getDaug( 1 ) ;
if ( ( ( parent == BP ) || ( parent == BM ) ) &&
( ( d1 == D0 ) || ( d1 == D0B ) ) &&
( ( d2 == KP ) || ( d2 == KM ) ) ) {
_flag = 1 ;
// PHSP Decay
}
else if ( ( ( parent == BP ) || ( parent == BM ) ) &&
( ( d1 == KP ) || ( d1 == KM ) ) &&
( ( d2 == D0 ) || ( d2 == D0B ) ) ) {
_flag = 1 ;
// also PHSP decay
}
else if ( ( ( parent == B0 ) || ( parent == B0B ) ) &&
( ( d1 == KS ) || ( d1 == KSB ) ) &&
( ( d2 == D0 ) || ( d2 == D0B ) ) ) {
_flag = 2 ;
// SVS Decay
}
if ( _flag == 0 ) {
EvtGenReport(EVTGEN_ERROR , "EvtGen" ) << "EvtBToDDalitzCPK : Invalid mode."
<< std::endl ;
assert( 0 ) ;
}
}
void EvtD0gammaDalitz::init()
{
// check that there are 0 arguments
checkNArg(0);
// Check that this model is valid for the specified decay.
checkNDaug( 3 );
checkSpinParent ( _SCALAR );
checkSpinDaughter( 0, _SCALAR );
checkSpinDaughter( 1, _SCALAR );
checkSpinDaughter( 2, _SCALAR );
// Get the values of the EvtId objects from the data files.
readPDGValues();
// Get the EvtId of the D0 and its 3 daughters.
getParentId();
EvtId dau[ 3 ];
for ( int index = 0; index < 3; index++ )
{
dau[ index ] = getDaug( index );
}
// Look for K0bar h+ h-. The order will be K[0SL] h+ h-
for ( int index = 0; index < 3; index++ )
{
if ( ( dau[ index ] == _K0B ) || ( dau[ index ] == _KS ) || ( dau[ index ] == _KL ) )
{
_d1 = index;
}
else if ( ( dau[ index ] == _PIP ) || ( dau[ index ] == _KP ) )
{
_d2 = index;
}
else if ( ( dau[ index ] == _PIM ) || ( dau[ index ] == _KM ) )
{
_d3 = index;
}
else
{
reportInvalidAndExit();
}
}
// Check if we're dealing with Ks pi pi or with Ks K K.
_isKsPiPi = false;
if ( dau[ _d2 ] == _PIP || dau[ _d2 ] == _PIM )
{
_isKsPiPi = true;
}
}
void RAttributeEntity::print(QDebug dbg) const {
dbg.nospace() << "RAttributeEntity(";
REntity::print(dbg);
dbg.nospace() << ", alignmentPoint: " << getAlignmentPoint()
<< ", position: " << getPosition()
<< ", text: " << getPlainText()
<< ", tag: " << getTag()
<< ", block reference ID: " << getParentId()
<< ", textHeight: " << getTextHeight()
<< ", textWidth: " << getTextWidth()
<< ", drawingDirection: " << getDrawingDirection()
<< ")";
}
// Fields }}}
// Informational {{{
bool Location::exists(optional<LinkAccessProperties const&> const& optional_link_access_properties) const {
string const& name = *(this->name);
if(name == "." || name == "/") return true;
return
assertSuccess(
"ascertaining location existence",
H5Lexists(
getParentId(),
name.c_str(),
getOptionalPropertiesId(optional_link_access_properties)
)
) == 1;
}
//========================================================================================
//used by the factoryfactory to update hoppercontent when looking at a hopper
//
void FactoryCrate::upDateFactoryVolume(const std::string& amount) {
if(!hasAttribute("factory_count")) {
return;
}
std::string current_amount = getAttribute<std::string>("factory_count");
if(current_amount == amount) {
return;
}
setAttribute("factory_count", amount);
Object* parent = gWorldManager->getObjectById(getParentId());
gContainerManager->sendToRegisteredWatchers(parent, [this] (PlayerObject* const player) {
gMessageLib->sendUpdateCrateContent(this,player);
});
}
/**
* Stream operator for QDebug
*/
void REntity::print(QDebug dbg) const {
dbg.nospace() << "REntity(";
RObject::print(dbg);
dbg.nospace()
<< ", type: " << getType()
<< ", layerId: " << getLayerId()
<< ", blockId: " << getBlockId()
<< ", parentId: " << getParentId()
<< ", childIds: " << getDocument()->queryChildEntities(getId())
<< ", lineweight: " << getLineweight()
<< ", linetypeId: " << getLinetypeId()
<< ", linetypeScale: " << getLinetypeScale()
<< ", color: " << getColor()
<< ", drawOrder: " << getDrawOrder()
<< ", selectionStatus: " << isSelected()
<< ", boundingBoxes: " << getBoundingBoxes()
<< ")";
}
void EvtHypNonLepton::initProbMax() {
double maxProb,m1,m2,M,p;
M=EvtPDL::getMass(getParentId());
m1=EvtPDL::getMass(getDaug(0));
m2=EvtPDL::getMass(getDaug(1));
if(m1+m2>=M) {
EvtGenReport(EVTGEN_ERROR,"EvtGen") << " ERROR: EvtHypNonLepton found impossible decay: " << M << " --> " << m1 << " + " << m2 << " GeV\n" << std::endl;
::abort();
}
p=sqrt(M*M-(m1+m2)*(m1+m2))*sqrt(M*M-(m1-m2)*(m1-m2))/2/M;
maxProb=16*M*(sqrt(p*p+m1*m1)+m1+abs(m_B_to_A)*abs(m_B_to_A)*(sqrt(p*p+m1*m1)-m1));
//maxProb *= G_F*M_pi*M_pi;
setProbMax(maxProb);
EvtGenReport(EVTGEN_INFO,"EvtGen") << " EvtHypNonLepton set up maximum probability to " << maxProb << std::endl;
}
int Person::fatherID() const
{
return getParentId("M");
}
uint64_t MESIBottomCC::processAccess(Address lineAddr, uint32_t lineId, AccessType type, uint64_t cycle, uint32_t srcId, uint32_t flags) {
uint64_t respCycle = cycle;
//uint64_t origin_addr = req.lineAddr;
MESIState* state = &array[lineId];
switch (type) {
// A PUTS/PUTX does nothing w.r.t. higher coherence levels --- it dies here
case PUTS: //Clean writeback, nothing to do (except profiling)
assert(*state != I);
profPUTS.inc();
break;
case PUTX: //Dirty writeback
assert(*state == M || *state == E);
if (*state == E) {
//Silent transition, record that block was written to
*state = M;
}
profPUTX.inc();
break;
case GETS:
if (*state == I) {
uint32_t parentId = getParentId(lineAddr);
MemReq req = {lineAddr, GETS, selfId, state, cycle, &ccLock, *state, srcId, flags};
//std::cout<<"GETS access "<<std::hex<<(lineAddr)<<","<<srcId<<std::endl;
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
profGETSMiss.inc();
assert(*state == S || *state == E);
} else {
profGETSHit.inc();
}
break;
case GETX:
if (*state == I || *state == S) {
//Profile before access, state changes
if (*state == I) profGETXMissIM.inc();
else profGETXMissSM.inc();
uint32_t parentId = getParentId(lineAddr);
MemReq req = {lineAddr, GETX, selfId, state, cycle, &ccLock, *state, srcId, flags};
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
//std::cout<<"GETX access "<<std::hex<<(lineAddr)<<","<<srcId<<std::endl;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
} else {
if (*state == E) {
// Silent transition
// NOTE: When do we silent-transition E->M on an ML hierarchy... on a GETX, or on a PUTX?
/* Actually, on both: on a GETX b/c line's going to be modified anyway, and must do it if it is the L1 (it's OK not
* to transition if L2+, we'll TX on the PUTX or invalidate, but doing it this way minimizes the differences between
* L1 and L2+ controllers); and on a PUTX, because receiving a PUTX while we're in E indicates the child did a silent
* transition and now that it is evictiong, it's our turn to maintain M info.
*/
*state = M;
}
profGETXHit.inc();
}
assert_msg(*state == M, "Wrong final state on GETX, lineId %d numLines %d, finalState %s", lineId, numLines, MESIStateName(*state));
break;
default: panic("!?");
}
assert_msg(respCycle >= cycle, "XXX %ld %ld", respCycle, cycle);
return respCycle;
}
int Person::motherID() const
{
return getParentId("F");
}
uint64_t flexclusive_MESIBottomCC::processAccess(Address lineAddr,
uint32_t lineId,
AccessType type,
uint64_t cycle, uint32_t srcId,
uint32_t flags, CLUState cs) {
uint64_t respCycle = cycle;
if (cs == EX) {
if ((int)lineId == -1) {
//info("The line id is %d", (int) lineId);
assert_msg((type == GETS || type == GETX) , "The type is %d", type);
if (type == GETS)
profGETSMiss.inc();
else
profGETXMissIM.inc();
if (!(flags & MemReq::INNER_COPY)) { // i.e. if line was found in inner
// levels in case of excl llc
MESIState dummyState = I; // does this affect race conditions ?
MemReq req = {lineAddr, type, selfId, &dummyState, cycle,
&ccLock, dummyState, srcId, flags};
uint32_t parentId = getParentId(lineAddr);
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
}
assert_msg(respCycle >= cycle, "XXX %ld %ld", respCycle, cycle);
return respCycle;
}
MESIState* state = &array[lineId];
switch (type) {
// A PUTS/PUTX does nothing w.r.t. higher coherence levels --- it dies
// here
case PUTS: // Clean writeback, nothing to do (except profiling)
// assert(*state == I); //we can't assert this a
// a copy of the data may still be there
// in the cache from somewhere else
if (flags & MemReq::INNER_COPY) {
} // assert(*state == I)}
else
*state = E; // receive the data in exclusive state
// for multithreaded application, may need to
// receive data in shared state also
profPUTS.inc();
profExclWB.inc();
break;
case PUTX: // Dirty writeback
//assert(*state == I);
// Silent transition, record that block was written to
if (flags & MemReq::INNER_COPY) {
//assert(*state == I);
} else
*state = M;
profPUTX.inc();
profExclWB.inc();
break;
case GETS:
if (*state == I && (!(flags & MemReq::INNER_COPY))) {
uint32_t parentId = getParentId(lineAddr);
MESIState dummyState = I; // does this affect race conditions ?
MemReq req = {lineAddr, GETS, selfId, &dummyState, cycle,
&ccLock, dummyState, srcId, flags};
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
profGETSMiss.inc();
} else {
profGETSHit.inc();
}
if (!(flags & MemReq::PREFETCH))
*state = I;
else *state = E;
break;
case GETX:
if ((*state == I || *state == S) && (!(flags & MemReq::INNER_COPY))) {
// Profile before access, state changes
if (*state == I)
profGETXMissIM.inc();
else
profGETXMissSM.inc();
uint32_t parentId = getParentId(lineAddr);
MemReq req = {lineAddr, GETX, selfId, state, cycle,
&ccLock, *state, srcId, flags};
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
} else { // means state is E or M
profGETXHit.inc();
}
if (!(flags & MemReq::PREFETCH))
*state = I; // inv because cache is exclusive
else
*state = E;
break;
default:
panic("!?");
}
} else {
MESIState* state = &array[lineId];
switch (type) {
// A PUTS/PUTX does nothing w.r.t. higher coherence levels --- it dies
// here
case PUTS: // Clean writeback, nothing to do (except profiling)
assert(*state != I);
profPUTS.inc();
break;
case PUTX: // Dirty writeback
assert(*state == M || *state == E);
if (*state == E) {
// Silent transition, record that block was written to
*state = M;
}
profPUTX.inc();
break;
case GETS:
if (*state == I) {
uint32_t parentId = getParentId(lineAddr);
if (!(flags & MemReq::INNER_COPY)) {
MemReq req = {lineAddr, GETS, selfId, state, cycle,
&ccLock, *state, srcId, flags};
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
} else {
// also need to send invx to the parents
*state = S; // don't change respCycle
}
profGETSMiss.inc();
assert(*state == S || *state == E);
} else {
profGETSHit.inc();
}
break;
case GETX:
if (*state == I || *state == S) {
// Profile before access, state changes
if (*state == I)
profGETXMissIM.inc();
else
profGETXMissSM.inc();
if ((flags & MemReq::INNER_COPY)) { // means line was not found in
// the non-inclusive llc
// assert(*state == I); //not true anymore, as we always check for
// inner copy
*state = M; // since it is a GETX, the final state should be M
} else if (!(flags & MemReq::INNER_COPY)) {
uint32_t parentId = getParentId(lineAddr);
MemReq req = {lineAddr, GETX, selfId, state, cycle,
&ccLock, *state, srcId, flags};
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
}
} else {
if (*state == E) {
// Silent transition
// NOTE: When do we silent-transition E->M on an ML hierarchy... on
// a GETX, or on a PUTX?
/* Actually, on both: on a GETX b/c line's going to be modified
* anyway, and must do it if it is the L1 (it's OK not
* to transition if L2+, we'll TX on the PUTX or invalidate, but
* doing it this way minimizes the differences between
* L1 and L2+ controllers); and on a PUTX, because receiving a PUTX
* while we're in E indicates the child did a silent
* transition and now that it is evictiong, it's our turn to
* maintain M info.
*/
*state = M;
}
profGETXHit.inc();
}
assert_msg(
*state == M,
"Wrong final state on GETX, lineId %d numLines %d, finalState %s",
lineId, numLines, MESIStateName(*state));
break;
default:
panic("!?");
}
}
assert_msg(respCycle >= cycle, "XXX %ld %ld", respCycle, cycle);
return respCycle;
}
uint64_t exclusive_MESIBottomCC::processAccess(Address lineAddr, uint32_t lineId, AccessType type, uint64_t cycle, uint32_t srcId, uint32_t flags) {
uint64_t respCycle = cycle;
if ((int) lineId == -1){
assert( type == GETS || type == GETX );
if (type == GETS) profGETSMiss.inc();
else profGETXMissIM.inc();
if (!(flags & MemReq::INNER_COPY)){ //i.e. if line was found in inner levels in case of excl llc
MESIState dummyState = I; // does this affect race conditions ?
MemReq req = {lineAddr, type, selfId, &dummyState, cycle, &ccLock, dummyState , srcId, flags};
uint32_t parentId = getParentId(lineAddr);
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
}
assert_msg(respCycle >= cycle, "XXX %ld %ld", respCycle, cycle);
return respCycle;
}
MESIState* state = &array[lineId];
switch (type) {
// A PUTS/PUTX does nothing w.r.t. higher coherence levels --- it dies here
case PUTS: //Clean writeback, nothing to do (except profiling)
assert(*state == I); //we can't assert this a
//a copy of the data may still be there
//in the cache from somewhere else
if (flags & MemReq::INNER_COPY) { assert(*state == I)}
else *state = E; //receive the data in exclusive state
//for multithreaded application, may need to
//receive data in shared state also
profPUTS.inc();
break;
case PUTX: //Dirty writeback
assert(*state == I);
//Silent transition, record that block was written to
if ( flags & MemReq::INNER_COPY ) { assert(*state == I);}
else
*state = M;
profPUTX.inc();
break;
case GETS:
if (*state == I && (!(flags & MemReq::INNER_COPY))) {
uint32_t parentId = getParentId(lineAddr);
MESIState dummyState = I; // does this affect race conditions ?
MemReq req = {lineAddr, GETS, selfId, &dummyState, cycle, &ccLock, dummyState, srcId, flags};
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
profGETSMiss.inc();
} else {
profGETSHit.inc();
}
if (!(flags & MemReq::PREFETCH))
*state = I;
else
*state = E; //this is prefetched data, brought in E state
break;
case GETX:
if ((*state == I || *state == S) && (!(flags & MemReq::INNER_COPY))) {
//Profile before access, state changes
if (*state == I) profGETXMissIM.inc();
else profGETXMissSM.inc();
uint32_t parentId = getParentId(lineAddr);
MemReq req = {lineAddr, GETX, selfId, state, cycle, &ccLock, *state, srcId, flags};
uint32_t nextLevelLat = parents[parentId]->access(req) - cycle;
uint32_t netLat = parentRTTs[parentId];
profGETNextLevelLat.inc(nextLevelLat);
profGETNetLat.inc(netLat);
respCycle += nextLevelLat + netLat;
}else { //means state is E or M
profGETXHit.inc();
}
if (!(flags & MemReq::PREFETCH))
*state=I; //inv because cache is exclusive
else
panic("We should not do GETX for exclusive LLC, which is a prefetch");
break;
default: panic("!?");
}
assert_msg(respCycle >= cycle, "XXX %ld %ld", respCycle, cycle);
return respCycle;
}
void EvtSSD_DirectCP::decay( EvtParticle *p) {
bool flip = false ;
EvtId daugs[2];
// decide it is B or Bbar:
if ( EvtRandom::Flat(0.,1.) < ( ( 1. - _acp ) / 2. ) ) {
// it is a B
if ( EvtPDL::getStdHep( getParentId() ) < 0 ) flip = true ;
} else {
// it is a Bbar
if ( EvtPDL::getStdHep( getParentId() ) > 0 ) flip = true ;
}
if ( flip ) {
if ( ( isB0Mixed( p ) ) || ( isBsMixed( p ) ) ) {
p->getParent()
->setId( EvtPDL::chargeConj( p->getParent()->getId() ) ) ;
p->setId( EvtPDL::chargeConj( p->getId() ) ) ;
}
else {
p->setId( EvtPDL::chargeConj( p->getId() ) ) ;
}
}
if (!flip) {
daugs[0]=getDaug(0);
daugs[1]=getDaug(1);
}
else {
daugs[0]=EvtPDL::chargeConj(getDaug(0));
daugs[1]=EvtPDL::chargeConj(getDaug(1));
}
EvtParticle *d;
p->initializePhaseSpace(2, daugs);
EvtVector4R p4_parent=p->getP4Restframe();
double m_parent=p4_parent.mass();
EvtSpinType::spintype d2type=EvtPDL::getSpinType(getDaug(1));
EvtVector4R momv;
EvtVector4R moms;
if (d2type==EvtSpinType::SCALAR) {
d2type=EvtPDL::getSpinType(getDaug(0));
d= p->getDaug(0);
momv = d->getP4();
moms = p->getDaug(1)->getP4();
}
else {
d= p->getDaug(1);
momv = d->getP4();
moms = p->getDaug(0)->getP4();
}
if (d2type==EvtSpinType::SCALAR) {
vertex(1.);
}
if (d2type==EvtSpinType::VECTOR) {
double norm=momv.mass()/(momv.d3mag()*p->mass());
vertex(0,norm*p4_parent*(d->epsParent(0)));
vertex(1,norm*p4_parent*(d->epsParent(1)));
vertex(2,norm*p4_parent*(d->epsParent(2)));
}
if (d2type==EvtSpinType::TENSOR) {
double norm=
d->mass()*d->mass()/(m_parent*d->getP4().d3mag()*d->getP4().d3mag());
vertex(0,norm*d->epsTensorParent(0).cont1(p4_parent)*p4_parent);
vertex(1,norm*d->epsTensorParent(1).cont1(p4_parent)*p4_parent);
vertex(2,norm*d->epsTensorParent(2).cont1(p4_parent)*p4_parent);
vertex(3,norm*d->epsTensorParent(3).cont1(p4_parent)*p4_parent);
vertex(4,norm*d->epsTensorParent(4).cont1(p4_parent)*p4_parent);
}
}
void EvtISGW2::initProbMax() {
//added by Lange Jan4,2000
static EvtId EM=EvtPDL::getId("e-");
static EvtId EP=EvtPDL::getId("e+");
static EvtId MUM=EvtPDL::getId("mu-");
static EvtId MUP=EvtPDL::getId("mu+");
static EvtId TAUM=EvtPDL::getId("tau-");
static EvtId TAUP=EvtPDL::getId("tau+");
static EvtId BP=EvtPDL::getId("B+");
static EvtId BM=EvtPDL::getId("B-");
static EvtId B0=EvtPDL::getId("B0");
static EvtId B0B=EvtPDL::getId("anti-B0");
static EvtId BS0=EvtPDL::getId("B_s0");
static EvtId BSB=EvtPDL::getId("anti-B_s0");
static EvtId BCP=EvtPDL::getId("B_c+");
static EvtId BCM=EvtPDL::getId("B_c-");
static EvtId DST0=EvtPDL::getId("D*0");
static EvtId DSTB=EvtPDL::getId("anti-D*0");
static EvtId DSTP=EvtPDL::getId("D*+");
static EvtId DSTM=EvtPDL::getId("D*-");
static EvtId D0=EvtPDL::getId("D0");
static EvtId D0B=EvtPDL::getId("anti-D0");
static EvtId DP=EvtPDL::getId("D+");
static EvtId DM=EvtPDL::getId("D-");
static EvtId D1P1P=EvtPDL::getId("D_1+");
static EvtId D1P1N=EvtPDL::getId("D_1-");
static EvtId D1P10=EvtPDL::getId("D_10");
static EvtId D1P1B=EvtPDL::getId("anti-D_10");
static EvtId D3P2P=EvtPDL::getId("D_2*+");
static EvtId D3P2N=EvtPDL::getId("D_2*-");
static EvtId D3P20=EvtPDL::getId("D_2*0");
static EvtId D3P2B=EvtPDL::getId("anti-D_2*0");
static EvtId D3P1P=EvtPDL::getId("D'_1+");
static EvtId D3P1N=EvtPDL::getId("D'_1-");
static EvtId D3P10=EvtPDL::getId("D'_10");
static EvtId D3P1B=EvtPDL::getId("anti-D'_10");
static EvtId D3P0P=EvtPDL::getId("D_0*+");
static EvtId D3P0N=EvtPDL::getId("D_0*-");
static EvtId D3P00=EvtPDL::getId("D_0*0");
static EvtId D3P0B=EvtPDL::getId("anti-D_0*0");
static EvtId D21S0P=EvtPDL::getId("D(2S)+");
static EvtId D21S0N=EvtPDL::getId("D(2S)-");
static EvtId D21S00=EvtPDL::getId("D(2S)0");
static EvtId D21S0B=EvtPDL::getId("anti-D(2S)0");
static EvtId D23S1P=EvtPDL::getId("D*(2S)+");
static EvtId D23S1N=EvtPDL::getId("D*(2S)-");
static EvtId D23S10=EvtPDL::getId("D*(2S)0");
static EvtId D23S1B=EvtPDL::getId("anti-D*(2S)0");
static EvtId RHO2S0=EvtPDL::getId("rho(2S)0");
static EvtId RHO2SP=EvtPDL::getId("rho(2S)+");
static EvtId RHO2SM=EvtPDL::getId("rho(2S)-");
static EvtId OMEG2S=EvtPDL::getId("omega(2S)");
static EvtId ETA2S=EvtPDL::getId("eta(2S)");
static EvtId PI2S0=EvtPDL::getId("pi(2S)0");
static EvtId PI2SP=EvtPDL::getId("pi(2S)+");
static EvtId PI2SM=EvtPDL::getId("pi(2S)-");
static EvtId PIP=EvtPDL::getId("pi+");
static EvtId PIM=EvtPDL::getId("pi-");
static EvtId PI0=EvtPDL::getId("pi0");
static EvtId RHOP=EvtPDL::getId("rho+");
static EvtId RHOM=EvtPDL::getId("rho-");
static EvtId RHO0=EvtPDL::getId("rho0");
static EvtId A2P=EvtPDL::getId("a_2+");
static EvtId A2M=EvtPDL::getId("a_2-");
static EvtId A20=EvtPDL::getId("a_20");
static EvtId A1P=EvtPDL::getId("a_1+");
static EvtId A1M=EvtPDL::getId("a_1-");
static EvtId A10=EvtPDL::getId("a_10");
static EvtId A0P=EvtPDL::getId("a_0+");
static EvtId A0M=EvtPDL::getId("a_0-");
static EvtId A00=EvtPDL::getId("a_00");
static EvtId B1P=EvtPDL::getId("b_1+");
static EvtId B1M=EvtPDL::getId("b_1-");
static EvtId B10=EvtPDL::getId("b_10");
static EvtId H1=EvtPDL::getId("h_1");
static EvtId H1PR=EvtPDL::getId("h'_1");
static EvtId F1=EvtPDL::getId("f_1");
static EvtId F1PR=EvtPDL::getId("f'_1");
static EvtId F0=EvtPDL::getId("f_0");
static EvtId F0PR=EvtPDL::getId("f'_0");
static EvtId F2=EvtPDL::getId("f_2");
static EvtId F2PR=EvtPDL::getId("f'_2");
static EvtId ETA=EvtPDL::getId("eta");
static EvtId ETAPR=EvtPDL::getId("eta'");
static EvtId OMEG=EvtPDL::getId("omega");
static EvtId KP=EvtPDL::getId("K+");
static EvtId KM=EvtPDL::getId("K-");
static EvtId K0=EvtPDL::getId("K0");
static EvtId KB=EvtPDL::getId("anti-K0");
static EvtId K0S=EvtPDL::getId("K_S0");
static EvtId K0L=EvtPDL::getId("K_L0");
static EvtId KSTP=EvtPDL::getId("K*+");
static EvtId KSTM=EvtPDL::getId("K*-");
static EvtId KST0=EvtPDL::getId("K*0");
static EvtId KSTB=EvtPDL::getId("anti-K*0");
static EvtId K1P=EvtPDL::getId("K_1+");
static EvtId K1M=EvtPDL::getId("K_1-");
static EvtId K10=EvtPDL::getId("K_10");
static EvtId K1B=EvtPDL::getId("anti-K_10");
static EvtId K1STP=EvtPDL::getId("K'_1+");
static EvtId K1STM=EvtPDL::getId("K'_1-");
static EvtId K1ST0=EvtPDL::getId("K'_10");
static EvtId K1STB=EvtPDL::getId("anti-K'_10");
static EvtId K2STP=EvtPDL::getId("K_2*+");
static EvtId K2STM=EvtPDL::getId("K_2*-");
static EvtId K2ST0=EvtPDL::getId("K_2*0");
static EvtId K2STB=EvtPDL::getId("anti-K_2*0");
static EvtId PHI=EvtPDL::getId("phi");
static EvtId DSP=EvtPDL::getId("D_s+");
static EvtId DSM=EvtPDL::getId("D_s-");
static EvtId DSSTP=EvtPDL::getId("D_s*+");
static EvtId DSSTM=EvtPDL::getId("D_s*-");
static EvtId DS1P=EvtPDL::getId("D_s1+");
static EvtId DS1M=EvtPDL::getId("D_s1-");
static EvtId DS0STP=EvtPDL::getId("D_s0*+");
static EvtId DS0STM=EvtPDL::getId("D_s0*-");
static EvtId DPS1P=EvtPDL::getId("D'_s1+");
static EvtId DPS1M=EvtPDL::getId("D'_s1-");
static EvtId DS2STP=EvtPDL::getId("D_s2*+");
static EvtId DS2STM=EvtPDL::getId("D_s2*-");
EvtId parnum,mesnum,lnum;
parnum = getParentId();
mesnum = getDaug(0);
lnum = getDaug(1);
if ( parnum==BP||parnum==BM||parnum==B0||parnum==B0B||parnum==BS0||parnum==BSB ) {
if ( mesnum==DST0||mesnum==DSTP||mesnum==DSTB||mesnum==DSTM||mesnum==DSSTP||mesnum==DSSTM) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(10000.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(7000.0);
return;
}
}
if ( mesnum==D0||mesnum==DP||mesnum==D0B||mesnum==DM||mesnum==DSP||mesnum==DSM) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(4000.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(3500.0);
return;
}
}
if ( mesnum==D1P1P||mesnum==D1P1N||mesnum==D1P10||mesnum==D1P1B||mesnum==DS1P||mesnum==DS1M) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1300.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(480.0);
return;
}
}
if ( mesnum==D3P1P||mesnum==D3P1N||mesnum==D3P10||mesnum==D3P1B||mesnum==DS0STP||mesnum==DS0STM) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(450.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(73.0);//???
return;
}
}
if ( mesnum==D3P0P||mesnum==D3P0N||mesnum==D3P00||mesnum==D3P0B||mesnum==DPS1P||mesnum==DPS1M) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(200.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(90.0);
return;
}
}
if ( mesnum==D3P2P||mesnum==D3P2N||mesnum==D3P20||mesnum==D3P2B||mesnum==DS2STP||mesnum==DS2STM) {
if ( mesnum==DS2STP|| mesnum==DS2STM) {
setProbMax(550.0);
return;
}
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(400.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(220.0);
return;
}
}
if ( mesnum==D21S0P||mesnum==D21S0N||mesnum==D21S00||mesnum==D21S0B) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(16.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(3.0);
return;
}
}
if ( mesnum==D23S1P||mesnum==D23S1N||mesnum==D23S10||mesnum==D23S1B) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(500.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(250.0);
return;
}
}
if ( mesnum==RHOP||mesnum==RHOM||mesnum==RHO0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(6500.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(6000.0);
return;
}
}
if ( mesnum==OMEG) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(6800.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(6000.0);
return;
}
}
if ( mesnum==PIP||mesnum==PIM||mesnum==PI0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1200.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1150.0);
return;
}
}
if ( mesnum==ETA) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1800.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1900.0);
return;
}
}
if ( mesnum==ETAPR) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(3000.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(3000.0);
return;
}
}
if ( mesnum==B1P||mesnum==B1M||mesnum==B10) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(2500.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1700.0);
return;
}
}
if ( mesnum==A0P||mesnum==A0M||mesnum==A00) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(80.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(62.0);
return;
}
}
if ( mesnum==A1P||mesnum==A1M||mesnum==A10) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(4500.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(3500.0);
return;
}
}
if ( mesnum==A2P||mesnum==A2M||mesnum==A20) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1200.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1000.0);
return;
}
}
if ( mesnum==H1) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(2600.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(2900.0);
return;
}
}
if ( mesnum==H1PR) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1400.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1500.0);
return;
}
}
if ( mesnum==F2) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1100.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1100.0);
return;
}
}
if ( mesnum==F2PR) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(804.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(600.0);
return;
}
}
if ( mesnum==F1) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(2500.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(2000.0) ;
return;
}
}
if ( mesnum==F1PR) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(2400.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1700.0);
return;
}
}
if ( mesnum==F0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 80.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(63.0);
return;
}
}
if ( mesnum==F0PR) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(120.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(120.0);
return;
}
}
if ( mesnum==RHO2SP||mesnum==RHO2SM||mesnum==RHO2S0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 2400.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(2000.0);
return;
}
}
if ( mesnum==OMEG2S) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1600.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1400.0) ;
return;
}
}
if ( mesnum==PI2SP||mesnum==PI2SM||mesnum==PI2S0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 500.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(300.0);
return;
}
}
if ( mesnum==ETA2S) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(344.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(300.0);
return;
}
}
if ( mesnum==KP||mesnum==KM||
mesnum==K1P||mesnum==K1M||mesnum==K1STP||mesnum==K1STM) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(2000.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(1000.0);
return;
}
}
if ( mesnum==KSTP||mesnum==KSTM ) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(10000.0);
return;
}
if ( lnum==TAUP||lnum==TAUM ) {
setProbMax(7000.0);
return;
}
}
}
if ( parnum==D0||parnum==DP||parnum==DM||parnum==D0B ) {
if ( mesnum==RHOP||mesnum==RHOM||mesnum==RHO0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(110.0);
return;
}
}
if ( mesnum==OMEG) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(75.0);
return;
}
}
if ( mesnum==PIP||mesnum==PIM||mesnum==PI0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(40.0);
return;
}
}
if ( mesnum==ETA) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 65.0);
return;
}
}
if ( mesnum==ETAPR) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 60.0);
return;
}
}
if ( mesnum==KP||mesnum==KM||mesnum==K0||
mesnum==K0S||mesnum==K0L||mesnum==KB) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 70.0);
return;
}
}
if ( mesnum==K1STP||mesnum==K1STM||mesnum==K1ST0||mesnum==K1STB) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 3.3);
return;
}
}
if ( mesnum==K1P||mesnum==K1M||mesnum==K10||mesnum==K1B) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 100.0);
return;
}
}
if ( mesnum==KSTP||mesnum==KSTM||mesnum==KST0||mesnum==KSTB) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 135.0);
return;
}
}
if ( mesnum==K2STP||mesnum==K2STM||mesnum==K2ST0||mesnum==K2STB) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
//Lange - Oct 26,2001 - increasing from 0.75 to
//accomodate
setProbMax( 9.0);
// setProbMax( 0.75);
return;
}
}
if ( mesnum==F0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1.0);
return;
}
}
}
if ( parnum==DSP||parnum==DSM ) {
if ( mesnum==PHI ) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 90.0 );
return;
}
}
if ( mesnum==ETA ) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 75.0 );
return;
}
}
if ( mesnum==ETAPR ) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 80.0) ;
return;
}
}
if ( mesnum==KST0||mesnum==KSTB ) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 100.0) ;
return;
}
}
if ( mesnum==K0 || mesnum==KB || mesnum==K0S || mesnum==K0L ) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax( 45.0 );
return;
}
}
if ( mesnum==F0) {
if ( lnum==EP||lnum==EM||lnum==MUP||lnum==MUM ) {
setProbMax(1.0);
return;
}
}
}
if ( parnum==BCP||parnum==BCM ) {
setProbMax(1000.0 );
return;
}
//This is a real cludge.. (ryd)
setProbMax(0.0);
}
