inline uint64_t get64be(const char*& s) { uint64_t n; get_be(s, n); return n; }
inline uint32_t get32be(const char*& s) { uint32_t n; get_be(s, n); return n; }
inline uint16_t get16be(const char*& s) { uint16_t n; get_be(s, n); return n; }
inline uint8_t get8 (const char*& s) { uint8_t n; get_be(s, n); return n; }
int
sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
{
size_t size;
DI val;
check_desc (sd);
if (!check_regno (regno))
return 0;
size = reg_size (regno);
if (length != size)
return 0;
if (rx_big_endian)
val = get_be (buf, length);
else
val = get_le (buf, length);
switch (regno)
{
case sim_rx_r0_regnum:
put_reg (0, val);
break;
case sim_rx_r1_regnum:
put_reg (1, val);
break;
case sim_rx_r2_regnum:
put_reg (2, val);
break;
case sim_rx_r3_regnum:
put_reg (3, val);
break;
case sim_rx_r4_regnum:
put_reg (4, val);
break;
case sim_rx_r5_regnum:
put_reg (5, val);
break;
case sim_rx_r6_regnum:
put_reg (6, val);
break;
case sim_rx_r7_regnum:
put_reg (7, val);
break;
case sim_rx_r8_regnum:
put_reg (8, val);
break;
case sim_rx_r9_regnum:
put_reg (9, val);
break;
case sim_rx_r10_regnum:
put_reg (10, val);
break;
case sim_rx_r11_regnum:
put_reg (11, val);
break;
case sim_rx_r12_regnum:
put_reg (12, val);
break;
case sim_rx_r13_regnum:
put_reg (13, val);
break;
case sim_rx_r14_regnum:
put_reg (14, val);
break;
case sim_rx_r15_regnum:
put_reg (15, val);
break;
case sim_rx_isp_regnum:
put_reg (isp, val);
break;
case sim_rx_usp_regnum:
put_reg (usp, val);
break;
case sim_rx_intb_regnum:
put_reg (intb, val);
break;
case sim_rx_pc_regnum:
put_reg (pc, val);
break;
case sim_rx_ps_regnum:
put_reg (psw, val);
break;
case sim_rx_bpc_regnum:
put_reg (bpc, val);
break;
case sim_rx_bpsw_regnum:
put_reg (bpsw, val);
break;
case sim_rx_fintv_regnum:
put_reg (fintv, val);
break;
case sim_rx_fpsw_regnum:
put_reg (fpsw, val);
break;
default:
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
regno);
return -1;
}
return size;
}
inline T get_be(const Ch*& s) { T n; get_be(s, n); return n; }
