static void set_bias (struct snd_soc_codec *codec, int mode)
{
/* Set MIC BIAS */
/* VOICECALL, VOICEMEMO, PLAYBACK_HP */
if ((mode & 0xf0) == MM_AUDIO_VOICECALL ||
(mode & 0xf0) == MM_AUDIO_VOICEMEMO )
{
if ((mode & 0x0f) == MM_AUDIO_OUT_RCV || (mode & 0x0f) == MM_AUDIO_OUT_SPK
|| (mode & 0x0f) == MM_AUDIO_OUT_HP )
mic_enable(1);
}
else
{
if(!get_headset_status())
mic_enable(0);
}
/* Set AMP BIAS */
/* SPK, EARJACK, VOICEMEMO */
if ((mode & 0x0f) == MM_AUDIO_OUT_SPK ||
(mode & 0x0f) == MM_AUDIO_OUT_HP ||
(mode & 0x0f) == MM_AUDIO_OUT_SPK_HP ||
(mode & 0xf0) == MM_AUDIO_VOICEMEMO )
{
if (mode != MM_AUDIO_VOICECALL_BT)
amp_enable(1);
}
else
{
amp_enable(0);
}
}
static void send_end_key_event_timer_handler(unsigned long arg)
{
int sendend_state = 0;
int adc_val = 0;
int i = 0;
SEC_HEADSET_DBG(" ");
sendend_state = gpio_get_value(EAR_KEY_GPIO) ^ EAR_KEY_INVERT_ENABLE;
if((get_headset_status() == HEADSET_4POLE_WITH_MIC) && sendend_state)
{
if(send_end_key_timer_token < SEND_END_CHECK_COUNT)
{
send_end_key_timer_token++;
send_end_key_event_timer.expires = SEND_END_CHECK_TIME;
add_timer(&send_end_key_event_timer);
schedule_delayed_work(&check_key_adc_work, 0);
SEC_HEADSET_DBG("SendEnd Timer Restart %d", send_end_key_timer_token);
}
else if(send_end_key_timer_token == SEND_END_CHECK_COUNT)
{
printk("SEND/END is pressed\n");
earkey_stats = 1;
schedule_delayed_work(&release_sysfs_event_work, 0);
send_end_key_timer_token = 0;
}
else
{
printk(KERN_ALERT "[Headset]wrong timer counter %d\n", send_end_key_timer_token);
//gpio_direction_output(EAR_ADC_SEL_GPIO , 1);
}
}
else
{
printk(KERN_ALERT "[Headset]GPIO Error\n %d, %d", get_headset_status(), sendend_state);
check_adc = 0;
count = 0;
for(i = 0 ; i < SEND_END_CHECK_COUNT ; i++)
adc_buffer[i] = 0;
//gpio_direction_output(EAR_ADC_SEL_GPIO , 1);
}
}
int mic_enable(int en)
{
P("MIC EN : %d", en);
if (en)
gpio_set_value(GPIO_MICBIAS_EN, 1);
else if (!get_headset_status())
gpio_set_value(GPIO_MICBIAS_EN, 0);
return 0;
}
int idle_mode_disable(struct snd_soc_codec *codec, int mode)
{
P("Diasble PATH : 0x%x\n", mode);
if(!get_headset_status())
mic_enable(0);
amp_enable(0);
switch(mode) {
case 0:
P("Path : Off");
break;
case MM_AUDIO_PLAYBACK_RCV :
//P("MM_AUDIO_PLAYBACK_RCV Off");
codec->write(codec, 0x0F, 0x04); // RCP/RCN power-down
mdelay(2); // wait more than 1ms
codec->write(codec, 0x00, 0x01); // VCOM power up
codec->write(codec, 0x00, 0x00); // VCOM power down
break;
case MM_AUDIO_PLAYBACK_SPK :
case MM_AUDIO_PLAYBACK_HP :
case MM_AUDIO_PLAYBACK_SPK_HP :
case MM_AUDIO_PLAYBACK_RING_SPK_HP :
//P("MM_AUDIO_PLAYBACK_SPK, HP, SPK_HP Off");
codec->write(codec, 0x10, 0x73); // MUTEN='0'
mdelay(30); // wait more than 30ms
codec->write(codec, 0x10, 0x00); // LOUT2/ROUT2 power-down
codec->write(codec, 0x00, 0x01); // VCOM power up
codec->write(codec, 0x00, 0x00); // VCOM power down
break;
case MM_AUDIO_PLAYBACK_BT :
codec->write(codec, 0x00, 0x01); // VCOM power up
codec->write(codec, 0x00, 0x00); // VCOM power down
break;
default:
printk("[SOUND MODE] invalid IDLE mode!!! \n");
}
return 0;
}
static int ear_switch_change(struct work_struct *ignored)
{
int ear_state = 0;
SEC_HEADSET_DBG("");
if(!ip_dev){
dev_err(ip_dev->dev.parent,"Input Device not allocated\n");
return IRQ_HANDLED;
}
ear_state = gpio_get_value(EAR_KEY_GPIO) ^ EAR_KEY_INVERT_ENABLE;
if( ear_state < 0 ){
dev_err(ip_dev->dev.parent,"Failed to read GPIO value\n");
return IRQ_HANDLED;
}
del_timer(&send_end_key_event_timer);
send_end_key_timer_token = 0;
//gpio_direction_output(EAR_ADC_SEL_GPIO , 0);
if((get_headset_status() == HEADSET_4POLE_WITH_MIC) && send_end_irq_token)// 4 pole headset connected && send irq enable
{
if(ear_state)
{
send_end_key_event_timer.expires = SEND_END_CHECK_TIME; // 10ms ??
add_timer(&send_end_key_event_timer);
SEC_HEADSET_DBG("SEND/END %s.timer start \n", "pressed");
}else{
SEC_HEADSET_DBG(KERN_ERR "SISO:sendend isr work queue\n");
input_report_key(ip_dev,KEYCODE_HEADSETHOOK,0);
input_sync(ip_dev);
printk("SEND/END %s.\n", "released");
earkey_stats = 0;
switch_set_state(&switch_sendend, 0);
//gpio_direction_output(EAR_ADC_SEL_GPIO , 1);
}
}else{
SEC_HEADSET_DBG("SEND/END Button is %s but headset disconnect or irq disable.\n", ear_state?"pressed":"released");
}
return 0;
}
static int s3c_pm_enter(suspend_state_t state)
{
#ifndef USE_DMA_ALLOC
static unsigned long regs_save[16];
#endif /* !USE_DMA_ALLOC */
unsigned int tmp,audiodomain_On;
/* ensure the debug is initialised (if enabled) */
s3c_pm_debug_init();
S3C_PMDBG("%s(%d)\n", __func__, state);
if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
return -EINVAL;
}
/* check if we have anything to wake-up with... bad things seem
* to happen if you suspend with no wakeup (system will often
* require a full power-cycle)
*/
s3c_irqwake_intmask = 0xFFFD; // rtc_alarm
if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
!any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
printk(KERN_ERR "%s: Aborting sleep\n", __func__);
return -EINVAL;
}
/* store the physical address of the register recovery block */
#ifndef USE_DMA_ALLOC
s3c_sleep_save_phys = virt_to_phys(regs_save);
#else
__raw_writel(phy_regs_save, S5P_INFORM2);
#endif /* !USE_DMA_ALLOC */
/* set flag for sleep mode idle2 flag is also reserved */
__raw_writel(SLEEP_MODE, S5P_INFORM1);
S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);
/* save all necessary core registers not covered by the drivers */
s3c_pm_save_gpios();
s3c_pm_save_uarts();
s3c_pm_save_core();
s3c_config_sleep_gpio();
/* set the irq configuration for wake */
s3c_pm_configure_extint();
S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
s3c_irqwake_intmask, s3c_irqwake_eintmask);
/*Set EINT as wake up source*/
#if defined(CONFIG_OPTICAL_GP2A)
if(gp2a_get_proximity_enable())
{
s3c_pm_set_eint(2, 0x4); // Proximity
}
#endif
s3c_pm_set_eint( 6, 0x4); // det_3.5
s3c_pm_set_eint( 7, 0x2); // pmic
s3c_pm_set_eint(11, 0x2); // onedram
s3c_pm_set_eint(20, 0x3); // wifi
s3c_pm_set_eint(21, 0x4); // bt
s3c_pm_set_eint(22, 0x2); // power key
s3c_pm_set_eint(23, 0x2); // microusb
s3c_pm_set_eint(25, 0x4); // volume down
s3c_pm_set_eint(26, 0x4); // volume up
s3c_pm_set_eint(28, 0x4); // T_FLASH_DETECT
s3c_pm_set_eint(29, 0x4); // ok key
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s3c_pm_set_eint(30, 0x4); //sendend
}
else
{
s3c_pm_clear_eint(30);
}
//s3c_pm_arch_prepare_irqs();
/* call cpu specific preparation */
pm_cpu_prep();
/* flush cache back to ram */
flush_cache_all();
s3c_pm_check_store();
__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM
/*clear for next wakeup*/
tmp = __raw_readl(S5P_WAKEUP_STAT);
__raw_writel(tmp, S5P_WAKEUP_STAT);
//s3c_config_sleep_gpio();
// Enable PS_HOLD pin to avoid reset failure */
__raw_writel((0x5 << 12 | 0x1<<9 | 0x1<<8 | 0x1<<0),S5P_PSHOLD_CONTROL);
/* send the cpu to sleep... */
s3c_pm_arch_stop_clocks();
/* s3c_cpu_save will also act as our return point from when
* we resume as it saves its own register state and restores it
* during the resume. */
s3c_cpu_save(regs_save);
/* restore the cpu state using the kernel's cpu init code. */
cpu_init();
/* restore the system state */
s3c_pm_restore_core();
/*Reset the uart registers*/
__raw_writel(0x0, S3C24XX_VA_UART3+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART1+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART0+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTP);
s3c_pm_restore_uarts();
s3c_pm_restore_gpios();
tmp = readl(S5P_NORMAL_CFG);
if(!(tmp & S5PC110_POWER_DOMAIN_AUDIO)) {
tmp = tmp | S5PC110_POWER_DOMAIN_AUDIO;
writel(tmp , S5P_NORMAL_CFG);
audiodomain_On = 1;
} else {
audiodomain_On = 0;
}
/* enable gpio, uart, mmc */
tmp = __raw_readl(S5P_OTHERS);
tmp |= (1<<31) | (1<<30) | (1<<28) | (1<<29);
__raw_writel(tmp, S5P_OTHERS);
tmp = readl(S5P_NORMAL_CFG);
if (audiodomain_On) {
tmp = tmp & ~S5PC110_POWER_DOMAIN_AUDIO;
writel(tmp , S5P_NORMAL_CFG);
}
/*clear for next wakeup*/
tmp = __raw_readl(S5P_WAKEUP_STAT);
//printk("\nS5P_WAKEUP_STAT=%x\n",tmp);
__raw_writel(tmp, S5P_WAKEUP_STAT);
printk("wakeup source is 0x%x \n", tmp);
printk(" EXT_INT_0_PEND %x \n", __raw_readl(S5PV210_EINTPEND(0)));
printk(" EXT_INT_1_PEND %x \n", __raw_readl(S5PV210_EINTPEND(1)));
printk(" EXT_INT_2_PEND %x \n", __raw_readl(S5PV210_EINTPEND(2)));
printk(" EXT_INT_3_PEND %x \n", __raw_readl(S5PV210_EINTPEND(3)));
s3c_pm_clear_eint(21);
// s3c_pm_clear_eint(22); // to be cleared later
/* check what irq (if any) restored the system */
s3c_pm_debug_init();
s3c_pm_arch_show_resume_irqs();
#if defined(CONFIG_MACH_S5PC110_P1)
// Set wakeup stat
s3c_pm_set_wakeup_stat();
#endif // CONFIG_MACH_S5PC110_P1
//printk("Int pending register before =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));
//printk("Int pending register after =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));
//S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
//printk("%s: post sleep, preparing to return\n", __func__);
/* LEDs should now be 1110 */
//s3c_pm_debug_smdkled(1 << 1, 0);
s3c_pm_check_restore();
//mdelay(500);
/* ok, let's return from sleep */
printk(KERN_ERR "\n%s:%d\n", __func__, __LINE__);
S3C_PMDBG("S3C PM Resume (post-restore)\n");
return 0;
}
static int s3c_pm_enter(suspend_state_t state)
{
#ifndef USE_DMA_ALLOC
static unsigned long regs_save[16];
#endif /* !USE_DMA_ALLOC */
unsigned int tmp,audiodomain_On;
/* ensure the debug is initialised (if enabled) */
s3c_pm_debug_init();
S3C_PMDBG("%s(%d)\n", __func__, state);
if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
return -EINVAL;
}
/* check if we have anything to wake-up with... bad things seem
* to happen if you suspend with no wakeup (system will often
* require a full power-cycle)
*/
s3c_irqwake_intmask = 0xFFFD; // rtc_alarm
if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
!any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
printk(KERN_ERR "%s: Aborting sleep\n", __func__);
return -EINVAL;
}
/* store the physical address of the register recovery block */
#ifndef USE_DMA_ALLOC
s3c_sleep_save_phys = virt_to_phys(regs_save);
#else
__raw_writel(phy_regs_save, S5P_INFORM2);
#endif /* !USE_DMA_ALLOC */
/* set flag for sleep mode idle2 flag is also reserved */
__raw_writel(SLEEP_MODE, S5P_INFORM1);
S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);
/* save all necessary core registers not covered by the drivers */
s3c_pm_save_gpios();
s3c_pm_save_uarts();
s3c_pm_save_core();
s3c_config_sleep_gpio();
/* set the irq configuration for wake */
s3c_pm_configure_extint();
S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
s3c_irqwake_intmask, s3c_irqwake_eintmask);
/*Set EINT as wake up source*/
#if defined(CONFIG_OPTICAL_GP2A) || defined(CONFIG_S5PC110_DEMPSEY_BOARD)
if(gp2a_get_proximity_enable())
{
s3c_pm_set_eint(2, 0x4); // Proximity
}
#endif
#if defined(CONFIG_S5PC110_DEMPSEY_BOARD)
s3c_pm_set_eint( 6, 0x4); // det_3.5
s3c_pm_set_eint( 7, 0x2); // pmic
s3c_pm_set_eint(11, 0x2); // onedram
#if defined (CONFIG_CP_CHIPSET_STE)
s3c_pm_set_eint(12, 0x2); //INT_RESOUT
s3c_pm_set_eint(9, 0x2); //INT_CP_PWR_RST
#else
s3c_pm_set_eint(15, 0x4); //PHONE_ACTIVE
#endif
// s3c_pm_set_eint(20, 0x3); // wifi
s3c_pm_set_eint(21, 0x4); // bt
s3c_pm_set_eint(22, 0x2); // power key
s3c_pm_set_eint(23, 0x2); // microusb
// s3c_pm_set_eint(28, 0x4); // T_FLASH_DETECT: NC
// s3c_pm_set_eint(29, 0x4); // GYRO_INT
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s3c_pm_set_eint(30, 0x4); //sendend
}
else
{
s3c_pm_clear_eint(30);
}
#elif defined (CONFIG_S5PC110_HAWK_BOARD)
/*Set EINT 22 as wake up source*/
s3c_pm_set_eint(11, 0x2); // nINT_ONEDRAM_AP
#if defined(CONFIG_HAWK_VER_B1_REAL_ADDED_FEATURE) //NAGSM_Android_HQ_KERNEL_CLEE_20100908 : Setup Hawk Real Board Rev 0.1
s3c_pm_set_eint(31, 0x2); // nPower
s3c_pm_set_eint(24, 0x2); // Home key
#else
s3c_pm_set_eint(22, 0x2); // nPower
#endif
#if defined (CONFIG_CP_CHIPSET_STE)
s3c_pm_set_eint(12, 0x2); //INT_RESOUT
s3c_pm_set_eint(9, 0x2); //INT_CP_PWR_RST
#else
s3c_pm_set_eint(15, 0x4); //PHONE_ACTIVE
#endif
s3c_pm_set_eint(21, 0x4); // BT_HOST_WAKE
s3c_pm_set_eint(7, 0x02); //PMIC
s3c_pm_set_eint(6, 0x4); //det_3.5
s3c_pm_set_eint(28, 0x4); // T_FLASH_DETECT
#elif defined (CONFIG_S5PC110_VIBRANTPLUS_BOARD)
s3c_pm_set_eint( 6, 0x4); // det_3.5
s3c_pm_set_eint( 7, 0x2); // pmic
s3c_pm_set_eint(11, 0x2); // onedram
#if defined (CONFIG_CP_CHIPSET_STE)
s3c_pm_set_eint(12, 0x2); //INT_RESOUT
s3c_pm_set_eint(9, 0x2); //INT_CP_PWR_RST
#else
s3c_pm_set_eint(15, 0x4); //PHONE_ACTIVE
#endif
s3c_pm_set_eint(20, 0x3); // wifi
s3c_pm_set_eint(21, 0x4); // bt
s3c_pm_set_eint(22, 0x2); // power key
s3c_pm_set_eint(23, 0x2); // microusb
if((is_calling_or_playing & IS_VOICE_CALL_2G) || (is_calling_or_playing & IS_VOICE_CALL_3G) || (is_calling_or_playing & IS_DATA_CALL)){
s3c_pm_set_eint(25, 0x4); //volume up
s3c_pm_set_eint(26, 0x4); //volume down
}
s3c_pm_set_eint(28, 0x4); // T_FLASH_DETECT
#else
s3c_pm_set_eint( 6, 0x4); // det_3.5
s3c_pm_set_eint( 7, 0x2); // pmic
s3c_pm_set_eint(11, 0x2); // onedram
#if defined (CONFIG_CP_CHIPSET_STE)
s3c_pm_set_eint(12, 0x2); //INT_RESOUT
s3c_pm_set_eint(9, 0x2); //INT_CP_PWR_RST
#else
s3c_pm_set_eint(15, 0x4); //PHONE_ACTIVE
#endif
s3c_pm_set_eint(20, 0x3); // wifi
s3c_pm_set_eint(21, 0x4); // bt
s3c_pm_set_eint(22, 0x2); // power key
s3c_pm_set_eint(23, 0x2); // microusb
s3c_pm_set_eint(25, 0x4); // volume down
s3c_pm_set_eint(26, 0x4); // volume up
s3c_pm_set_eint(28, 0x4); // T_FLASH_DETECT
/*
s3c_pm_set_eint(29, 0x4); // ok key
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s3c_pm_set_eint(30, 0x4); //sendend
}
else
{
s3c_pm_clear_eint(30);
}
*/
#endif
#if defined CONFIG_T959_VER_B0
s3c_pm_set_eint(29, 0x4);
// [[junghyunseok edit for fuel_int interrupt control of fuel_gauge 20100504
#elif defined CONFIG_KEPLER_VER_B0
#elif defined(CONFIG_KEPLER_VER_B2) || defined(CONFIG_T959_VER_B5) || defined (CONFIG_S5PC110_VIBRANTPLUS_BOARD) || defined(CONFIG_S5PC110_DEMPSEY_BOARD)
s3c_pm_set_eint(27, 0x2);
// ]]junghyunseok edit for fuel_int interrupt control of fuel_gauge 20100504
#else
//gpio key
if(HWREV >= 0xB)
{
s3c_pm_set_eint(27, 0x4);
s3c_pm_set_eint(29, 0x4);
}
#endif
//[hdlnc_bp_ytkwon : 20100326
// #ifdef CONFIG_KEPLER_AUDIO_A1026
#if defined(CONFIG_S5PC110_KEPLER_BOARD)
if(HWREV!=0x08)
{
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s3c_pm_set_eint(30, 0x4); //sendend
s3c_pm_set_eint(18, 0x4); //sendend 2.5
}
else
{
s3c_pm_clear_eint(30);
s3c_pm_clear_eint(18);
}
}
#elif defined(CONFIG_S5PC110_T959_BOARD)
if(HWREV==0x0a ||HWREV==0x0c)
{
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s3c_pm_set_eint(30, 0x4); //sendend
}
else
{
s3c_pm_clear_eint(30);
}
}
else
{
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s3c_pm_set_eint(30, 0x4); //sendend
s3c_pm_set_eint(18, 0x4); //sendend 2.5
}
else
{
s3c_pm_clear_eint(30);
s3c_pm_clear_eint(18);
}
}
#else //sidekick, hawk, vibrantplus
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s3c_pm_set_eint(30, 0x4); //sendend
s3c_pm_set_eint(18, 0x4); //sendend 2.5
}
else
{
s3c_pm_clear_eint(30);
s3c_pm_clear_eint(18);
}
#endif
//]hdlnc_bp_ytkwon : 20100326
#if defined (CONFIG_S5PC110_HAWK_BOARD)
if(gp2a_get_proximity_enable())
{
#if defined(CONFIG_HAWK_VER_B1_REAL_ADDED_FEATURE) //NAGSM_Android_HQ_KERNEL_CLEE_20100928 : Setup Hawk Real Board Rev 0.1 Proximity sensor
s3c_pm_set_eint(10, 0x2);//proximity
#else
s3c_pm_set_eint(2, 0x4);//proximity
#endif
}
s3c_pm_set_eint(20, 0x3);//WiFi
s3c_pm_set_eint(23, 0x2);//microusb
#endif
//s3c_pm_arch_prepare_irqs();
/* call cpu specific preparation */
pm_cpu_prep();
/* flush cache back to ram */
flush_cache_all();
s3c_pm_check_store();
// __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM
if((is_calling_or_playing & IS_VOICE_CALL_2G) || (is_calling_or_playing & IS_VOICE_CALL_3G) || (is_calling_or_playing & IS_DATA_CALL)){
__raw_writel(0xFFDD, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM
}else{
__raw_writel(0xFFFD, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM
}
/*clear for next wakeup*/
tmp = __raw_readl(S5P_WAKEUP_STAT);
__raw_writel(tmp, S5P_WAKEUP_STAT);
//s3c_config_sleep_gpio();
// Enable PS_HOLD pin to avoid reset failure */
__raw_writel((0x5 << 12 | 0x1<<9 | 0x1<<8 | 0x1<<0),S5P_PSHOLD_CONTROL);
/* send the cpu to sleep... */
s3c_pm_arch_stop_clocks();
/* s3c_cpu_save will also act as our return point from when
* we resume as it saves its own register state and restores it
* during the resume. */
s3c_cpu_save(regs_save);
/* restore the cpu state using the kernel's cpu init code. */
cpu_init();
/* restore the system state */
s3c_pm_restore_core();
/*Reset the uart registers*/
__raw_writel(0x0, S3C24XX_VA_UART3+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART1+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART0+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTP);
s3c_pm_restore_uarts();
s3c_pm_restore_gpios();
/* enable gpio, uart, mmc */
tmp = __raw_readl(S5P_OTHERS);
tmp |= (1<<31) | (1<<30) | (1<<28) | (1<<29);
__raw_writel(tmp, S5P_OTHERS);
/*clear for next wakeup*/
tmp = __raw_readl(S5P_WAKEUP_STAT);
//printk("\nS5P_WAKEUP_STAT=%x\n",tmp);
__raw_writel(tmp, S5P_WAKEUP_STAT);
printk("wakeup source is 0x%x \n", tmp);
printk(" EXT_INT_0_PEND %x \n", __raw_readl(S5PV210_EINTPEND(0)));
printk(" EXT_INT_1_PEND %x \n", __raw_readl(S5PV210_EINTPEND(1)));
printk(" EXT_INT_2_PEND %x \n", __raw_readl(S5PV210_EINTPEND(2)));
printk(" EXT_INT_3_PEND %x \n", __raw_readl(S5PV210_EINTPEND(3)));
#if defined(CONFIG_S5PC110_HAWK_BOARD)
// s3c_pm_clear_eint(21);
#else
s3c_pm_clear_eint(21);
#endif
// s3c_pm_clear_eint(22); // to be cleared later
/* check what irq (if any) restored the system */
s3c_pm_debug_init();
s3c_pm_arch_show_resume_irqs();
#if defined(CONFIG_MACH_S5PC110_P1)
// Set wakeup stat
s3c_pm_set_wakeup_stat();
#endif // CONFIG_MACH_S5PC110_P1
//printk("Int pending register before =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));
//printk("Int pending register after =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));
//S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
//printk("%s: post sleep, preparing to return\n", __func__);
/* LEDs should now be 1110 */
//s3c_pm_debug_smdkled(1 << 1, 0);
s3c_pm_check_restore();
//mdelay(500);
/* ok, let's return from sleep */
printk(KERN_ERR "\n%s:%d\n", __func__, __LINE__);
S3C_PMDBG("S3C PM Resume (post-restore)\n");
return 0;
}
int path_change(struct snd_soc_codec *codec, int to_mode, int from_mode)
{
int ret = 1;
/* Set Bias */
set_bias(codec, to_mode);
switch (to_mode) {
case MM_AUDIO_PLAYBACK_SPK :
case MM_AUDIO_PLAYBACK_HP :
switch (from_mode) {
case MM_AUDIO_VOICEMEMO_MAIN :
case MM_AUDIO_VOICEMEMO_SUB :
case MM_AUDIO_VOICEMEMO_EAR :
P("VOICEMEMO->PLAYBACK");
set_codec_gain(codec, to_mode);
if (to_mode == MM_AUDIO_PLAYBACK_SPK)
amp_set_path(AK4671_AMP_PATH_SPK);
else
amp_set_path(AK4671_AMP_PATH_HP);
codec->write(codec, 0x00, 0xC1); // DAC Enable, ADC Disable, MicAMP Disable
break;
default :
ret = -1;
break;
}
break;
case MM_AUDIO_PLAYBACK_RCV :
case MM_AUDIO_PLAYBACK_SPK_HP :
case MM_AUDIO_PLAYBACK_RING_SPK_HP :
case MM_AUDIO_PLAYBACK_BT :
case MM_AUDIO_VOICECALL_RCV :
case MM_AUDIO_VOICECALL_SPK :
case MM_AUDIO_VOICECALL_HP :
case MM_AUDIO_VOICECALL_BT :
ret = -1;
break;
case MM_AUDIO_VOICEMEMO_MAIN :
switch (from_mode) {
case MM_AUDIO_PLAYBACK_SPK :
P("PLAYBACK_SPK->VOICEMEMO_MAIN");
mic_set_path(AK4671_MIC_PATH_MAIN);
set_codec_gain(codec, to_mode);
codec->write(codec, 0x04, 0x14); // => MIC-AMP Lch=IN1+/-
codec->write(codec, 0x00, 0xD5); // D/A power-up
break;
case MM_AUDIO_VOICEMEMO_EAR :
P("VOICEMEMO_EAR->VOICEMEMO_MAIN");
mic_set_path(AK4671_MIC_PATH_MAIN);
set_codec_gain(codec, to_mode);
codec->write(codec, 0x04, 0x14); // => MIC-AMP Lch=IN1+/-
amp_set_path(AK4671_AMP_PATH_SPK);
break;
default :
ret = -1;
break;
}
break;
case MM_AUDIO_VOICEMEMO_SUB :
switch (from_mode) {
case MM_AUDIO_PLAYBACK_SPK :
P("PLAYBACK_SPK->VOICEMEMO_SUB");
mic_set_path(AK4671_MIC_PATH_MAIN);
set_codec_gain(codec, to_mode);
codec->write(codec, 0x04, 0x14); // => MIC-AMP Lch=IN1+/-
codec->write(codec, 0x00, 0xD5); // D/A power-up
break;
case MM_AUDIO_VOICEMEMO_EAR :
P("VOICEMEMO_EAR->VOICEMEMO_MAIN");
mic_set_path(AK4671_MIC_PATH_MAIN);
set_codec_gain(codec, to_mode);
codec->write(codec, 0x04, 0x14); // => MIC-AMP Lch=IN1+/-
amp_set_path(AK4671_AMP_PATH_SPK);
break;
default :
ret = -1;
break;
}
break;
case MM_AUDIO_VOICEMEMO_EAR :
switch (from_mode) {
case MM_AUDIO_PLAYBACK_HP :
case MM_AUDIO_VOICEMEMO_MAIN :
case MM_AUDIO_VOICEMEMO_SUB :
P("VOICEMEMO_MAIN&SUB&PLAYBACK_HP->VOICEMEMO_EAR");
if (from_mode != MM_AUDIO_PLAYBACK_HP)
amp_set_path(AK4671_AMP_PATH_HP);
if (get_headset_status())
{
P("VOICEMEMO_4POLE_EAR");
set_codec_gain(codec, to_mode);
codec->write(codec, 0x04, 0x42); // => MIC-AMP Lch=IN3+/-
codec->write(codec, 0x00, 0xD5); // D/A power-up
}
else
{
P("VOICEMEMO_3POLE_EAR");
mic_set_path(AK4671_MIC_PATH_MAIN);
to_mode = MM_AUDIO_VOICEMEMO_MAIN;
set_codec_gain(codec, to_mode);
codec->write(codec, 0x04, 0x14); // => MIC-AMP Lch=IN1+/-
codec->write(codec, 0x00, 0xD5); // D/A power-up
}
break;
default :
ret = -1;
break;
}
break;
default :
ret = -1;
break;
}
return ret;
}
static int s5pc11x_pm_enter(suspend_state_t state)
{
unsigned long regs_save[16];
unsigned int tmp;
#ifdef CONFIG_HAS_WAKELOCK
//wake_unlock(&pm_wake_lock);
#endif
/* ensure the debug is initialised (if enabled) */
DBG("s5pc11x_pm_enter(%d)\n", state);
if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
printk(KERN_ERR PFX "error: no cpu sleep functions set\n");
return -EINVAL;
}
#ifdef CONFIG_CPU_FREQ
s5pc110_pm_target(BOOT_ARM_CLK);
#endif
/* store the physical address of the register recovery block */
s5pc110_sleep_save_phys = virt_to_phys(regs_save);
DBG("s5pc11x_sleep_save_phys=0x%08lx\n", s5pc110_sleep_save_phys);
s5pc11x_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save));
#ifdef S5PC11X_ALIVEGPIO_STORE
s5pc11x_pm_do_save(gpio_save_alive, ARRAY_SIZE(gpio_save_alive));
#endif
s5pc11x_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
s5pc11x_pm_do_save(core_save, ARRAY_SIZE(core_save));
s5pc11x_pm_do_save(sromc_save, ARRAY_SIZE(sromc_save));
s5pc11x_pm_do_save(uart_save, ARRAY_SIZE(uart_save));
/* ensure INF_REG0 has the resume address */
__raw_writel(virt_to_phys(s5pc110_cpu_resume), S5P_INFORM0);
/* call cpu specific preperation */
pm_cpu_prep();
/* flush cache back to ram */
flush_cache_all();
#if 0 // To preserve 24MHz clock.
/* USB & OSC Clock pad Enable */
tmp = __raw_readl(S5P_SLEEP_CFG);
//tmp |= (S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
__raw_writel(tmp , S5P_SLEEP_CFG);
#endif
__raw_writel(0xffffffff , S5P_EINT_WAKEUP_MASK);
/* Power mode Config setting */
tmp = __raw_readl(S5P_PWR_CFG);
tmp &= S5P_CFG_WFI_CLEAN;
tmp |= S5P_CFG_WFI_SLEEP;
__raw_writel(tmp,S5P_PWR_CFG);
if (!hw_version_check()) {
/* Set wakeup mask regsiter */
__raw_writel(0xFFED, S5P_WAKEUP_MASK);
} else {
if((is_calling_or_playing & IS_VOICE_CALL_2G) || (is_calling_or_playing & IS_VOICE_CALL_3G) || (is_calling_or_playing & IS_DATA_CALL)){
__raw_writel(0xFFDD, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM
}else{
__raw_writel(0xFFFD, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM
}
}
__raw_writel(0xffffffff, S5PC110_VIC0REG(VIC_INT_ENABLE_CLEAR));
__raw_writel(0xffffffff, S5PC110_VIC1REG(VIC_INT_ENABLE_CLEAR));
__raw_writel(0xffffffff, S5PC110_VIC2REG(VIC_INT_ENABLE_CLEAR));
__raw_writel(0xffffffff, S5PC110_VIC3REG(VIC_INT_ENABLE_CLEAR));
__raw_writel(0xffffffff, S5PC110_VIC0REG(VIC_INT_SOFT_CLEAR));
__raw_writel(0xffffffff, S5PC110_VIC1REG(VIC_INT_SOFT_CLEAR));
__raw_writel(0xffffffff, S5PC110_VIC2REG(VIC_INT_SOFT_CLEAR));
__raw_writel(0xffffffff, S5PC110_VIC3REG(VIC_INT_SOFT_CLEAR));
/* SYSC INT Disable */
tmp = __raw_readl(S5P_OTHERS);
tmp |= (S5P_OTHER_SYSC_INTOFF);
__raw_writel(tmp,S5P_OTHERS);
/* Clear WAKEUP_STAT register for next wakeup */
tmp = __raw_readl(S5P_WAKEUP_STAT);
__raw_writel(tmp, S5P_WAKEUP_STAT);
/* Wake up source setting */
//s5pc11x_pm_configure_extint();
// key pad direction control for evt0
//s5pc11x_set_keypad_sleep_gpio();
/*Set EINT 22 as wake up source*/
s5pc11x_pm_set_eint(11, 0x2);
s5pc11x_pm_set_eint(22, 0x2);
s5pc11x_pm_set_eint(15, 0x4);
s5pc11x_pm_set_eint(21, 0x4);
s5pc11x_pm_set_eint(7, 0x02); //PMIC
s5pc11x_pm_set_eint(6, 0x4); //det_3.5
s5pc11x_pm_set_eint(28, 0x4); // T_FLASH_DETECT
//[hdlnc_bp_ytkwon : 20100326
#ifdef CONFIG_KEPLER_AUDIO_A1026
if(HWREV!=0x08)
{
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s5pc11x_pm_set_eint(30, 0x4); //sendend
s5pc11x_pm_set_eint(18, 0x4); //sendend 2.5
}
else
{
s5pc11x_pm_clear_eint(30);
s5pc11x_pm_clear_eint(18);
}
}
#else
if(HWREV==0x0a ||HWREV==0x0c)
{
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s5pc11x_pm_set_eint(30, 0x4); //sendend
}
else
{
s5pc11x_pm_clear_eint(30);
}
}
else
{
if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
{
s5pc11x_pm_set_eint(30, 0x4); //sendend
s5pc11x_pm_set_eint(18, 0x4); //sendend 2.5
}
else
{
s5pc11x_pm_clear_eint(30);
s5pc11x_pm_clear_eint(18);
}
}
#endif
//]hdlnc_bp_ytkwon : 20100326
if(gp2a_get_proximity_enable())
{
s5pc11x_pm_set_eint(2, 0x4);//proximity
}
s5pc11x_pm_set_eint(20, 0x3);//WiFi
s5pc11x_pm_set_eint(23, 0x2);//microusb
#if defined CONFIG_T959_VER_B0
s5pc11x_pm_set_eint(29, 0x4);
// [[junghyunseok edit for fuel_int interrupt control of fuel_gauge 20100504
#elif defined CONFIG_KEPLER_VER_B0
#elif defined(CONFIG_KEPLER_VER_B2) || defined(CONFIG_T959_VER_B5)
s5pc11x_pm_set_eint(27, 0x2);
// ]]junghyunseok edit for fuel_int interrupt control of fuel_gauge 20100504
#else
//gpio key
if(HWREV >= 0xB)
{
s5pc11x_pm_set_eint(27, 0x4);
s5pc11x_pm_set_eint(29, 0x4);
}
#endif
if (!hw_version_check()) {
/*Set keypad as EINT for EVT0 wake up workaround*/
s5pc11x_pm_set_eint(24, 0x2);
s5pc11x_pm_set_eint(25, 0x2);
s5pc11x_pm_set_eint(26, 0x2);
s5pc11x_pm_set_eint(27, 0x2);
/*Column pull down enabled*/
tmp = readl(S5PC11X_GPH2PUD);
tmp &= ~(0xFF);
tmp |= 0x55;
writel(tmp, S5PC11X_GPH2PUD);
}
s3c_config_sleep_gpio();
s3c_gpio_slp_cfgpin(S5PC11X_MP03(3), S3C_GPIO_SLP_OUT0);
s3c_gpio_slp_setpull_updown(S5PC11X_MP03(3), S3C_GPIO_SLP_OUT0);
#if 0
tmp = __raw_readl(S5P_OTHERS);
tmp &= ~(3 << 8);
tmp |= (3 << 8);
__raw_writel(tmp, S5P_OTHERS);
__raw_writel(0,S5P_MIE_CONTROL);
__raw_writel(0,S5P_HDMI_CONTROL);
__raw_writel(0,S5P_USB_PHY_CONTROL);
__raw_writel(0,S5P_DAC_CONTROL);
__raw_writel(0,S5P_MIPI_PHY_CONTROL);
__raw_writel(0,S5P_ADC_CONTROL);
__raw_writel(0,S5P_PSHOLD_CONTROL);
#endif
#if (!(defined CONFIG_ARIES_VER_B0) && !(defined CONFIG_ARIES_VER_B4) && !(defined CONFIG_ARIES_VER_B5))
// Enable PS_HOLD pin to avoid reset failure */
__raw_writel((0x5 << 12 | 0x1<<9 | 0x1<<8 | 0x1<<0),S5P_PSHOLD_CONTROL);
#endif
/* s5pc11x_cpu_save will also act as our return point from when
* we resume as it saves its own register state, so use the return
* code to differentiate return from save and return from sleep */
if (s5pc110_cpu_save(regs_save) == 0) {
flush_cache_all();
if (!hw_version_check()) {
/* This function for Chip bug on EVT0 */
tmp = __raw_readl(S5P_EINT_WAKEUP_MASK + 4); //PWR_MODE
tmp |= (1 << 2);
__raw_writel(tmp , S5P_EINT_WAKEUP_MASK + 4);
// end mod
}
pm_cpu_sleep();
}
/* restore the cpu state */
cpu_init();
s5pc11x_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save));
#ifdef S5PC11X_ALIVEGPIO_STORE
s5pc11x_pm_do_restore_alive(gpio_save_alive, ARRAY_SIZE(gpio_save_alive));
#endif
s5pc11x_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
/* Temporary workaround to protect lockup by UART - 20100316 */
__raw_writel(0x0, S3C24XX_VA_UART3+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART1+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTP);
__raw_writel(0x0, S3C24XX_VA_UART0+S3C2410_UCON);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTM);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTSP);
__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTP);
s5pc11x_pm_do_restore(uart_save, ARRAY_SIZE(uart_save));
s5pc11x_pm_do_restore(core_save, ARRAY_SIZE(core_save));
s5pc11x_pm_do_restore(sromc_save, ARRAY_SIZE(sromc_save));
/*enable gpio, uart, mmc*/
tmp = __raw_readl(S5P_OTHERS);
#if ((defined CONFIG_ARIES_VER_B0) || (defined CONFIG_ARIES_VER_B4) || (defined CONFIG_ARIES_VER_B5))
tmp |= (1<<31) | (1<<28) | (1<<29);
#else
tmp |= (1<<31) | (0x1<<30) | (1<<28) | (1<<29);
#endif
__raw_writel(tmp, S5P_OTHERS);
/* EINT22 Pending clear */
//s5pc11x_pm_clear_eint(22); //<= do action in s3c-keypad.c
// s5pc11x_pm_clear_eint(21);
if (!hw_version_check()) {
// for evt 0 keypad wakeup workaround
s5pc11x_pm_clear_eint(24);
s5pc11x_pm_clear_eint(25);
s5pc11x_pm_clear_eint(26);
s5pc11x_pm_clear_eint(27);
s5pc11x_pm_clear_eint(21);
} else {
/* Clear WAKEUP_STAT register for next wakeup */
tmp = __raw_readl(S5P_WAKEUP_STAT);
__raw_writel(tmp, S5P_WAKEUP_STAT);
printk("wakeup source is 0x%x \n", tmp);
printk(" EXT_INT_0_PEND %x \n", __raw_readl(S5PC11X_EINTPEND(0)));
printk(" EXT_INT_1_PEND %x \n", __raw_readl(S5PC11X_EINTPEND(1)));
printk(" EXT_INT_2_PEND %x \n", __raw_readl(S5PC11X_EINTPEND(2)));
printk(" EXT_INT_3_PEND %x \n", __raw_readl(S5PC11X_EINTPEND(3)));
}
DBG("\npost sleep, preparing to return 2\n");
s5pc11x_pm_check_restore();
#ifdef CONFIG_HAS_WAKELOCK
//wake_lock_timeout(&pm_wake_lock, 5 * HZ);
#endif
/* ok, let's return from sleep */
DBG("S5PC110 PM Resume (post-restore)\n");
return 0;
}
/*
* ftn for video
*/
static int s5p_tv_v_open(struct file *file)
{
int ret = 0,err;
unsigned int status;
ref_count_tv ++ ;
mutex_lock(mutex_for_fo);
if (s5ptv_status.tvout_output_enable) {
mutex_unlock(mutex_for_fo);
goto re_open;
BASEPRINTK("tvout drv. already used !!\n");
ret = -EBUSY;
goto drv_used;
}
#ifdef CONFIG_CPU_S5PC110
s5p_tv_clk_gate( true );
#endif
#ifdef CONFIG_CPU_S5PC110
#if defined(CONFIG_S5PC110_KEPLER_BOARD)//Kepler
err = gpio_request(S5PC11X_GPJ4(4),"TV_EN");
udelay(50);
gpio_direction_output(S5PC11X_GPJ4(4),1);
gpio_set_value(S5PC11X_GPJ4(4),1);
udelay(50);
err = gpio_request(S5PC11X_GPJ2(6),"EAR_SEL");
udelay(50);
gpio_direction_output(S5PC11X_GPJ2(6),0);
gpio_set_value(S5PC11X_GPJ2(6),0);
udelay(50);
#elif (defined CONFIG_S5PC110_T959_BOARD)//T959
status=get_headset_status();
printk("s5p_tv_v_open: get_headset_status:%d\n",status);
if((SEC_HEADSET_3_POLE_DEVICE==status)||(SEC_TVOUT_DEVICE==status))
{
printk("EAR_SEL:Low\n");
err = gpio_request(S5PC11X_GPJ2(6),"EAR_SEL"); //GPIO_EARPATH_SEL
udelay(50);
gpio_direction_output(S5PC11X_GPJ2(6),0);
gpio_set_value(S5PC11X_GPJ2(6),0);
udelay(50);
}
else if(SEC_HEADSET_4_POLE_DEVICE==status)
{
printk("EAR_SEL:High\n");
err = gpio_request(S5PC11X_GPJ2(6),"EAR_SEL"); //GPIO_EARPATH_SEL
udelay(50);
gpio_direction_output(S5PC11X_GPJ2(6),0);
gpio_set_value(S5PC11X_GPJ2(6),1);
udelay(50);
}
#endif
#endif
_s5p_tv_if_init_param();
s5p_tv_v4l2_init_param();
mutex_unlock(mutex_for_fo);
#if 0
mutex_lock(mutex_for_i2c);
/* for ddc(hdcp port) */
if(s5ptv_status.hpd_status) {
if (i2c_add_driver(&hdcp_i2c_driver))
BASEPRINTK("HDCP port add failed\n");
hdcp_i2c_drv_state = true;
} else
hdcp_i2c_drv_state = false;
mutex_unlock(mutex_for_i2c);
#endif
printk("\n\nTV open success\n\n");
re_open:
/* for i2c probing */
udelay(100);
return 0;
drv_used:
mutex_unlock(mutex_for_fo);
return ret;
}
