static _mali_osk_errcode_t enable_mali_clocks(void) { int err; err = clk_enable(mali_clock); MALI_DEBUG_PRINT(3,("enable_mali_clocks mali_clock %p error %d \n", mali_clock, err)); #if 0 #if MALI_DVFS_ENABLED // set clock rate if (get_mali_dvfs_control_status() != 0 || mali_gpu_clk >= mali_runtime_resume.clk) mali_clk_set_rate(mali_gpu_clk, GPU_MHZ); else { mali_regulator_set_voltage(mali_runtime_resume.vol, mali_runtime_resume.vol); mali_clk_set_rate(mali_runtime_resume.clk, GPU_MHZ); set_mali_dvfs_current_step(MALI_DVFS_DEFAULT_STEP); } #if CPUFREQ_LOCK_DURING_440 /* lock/unlock CPU freq by Mali */ if (mali_gpu_clk >= 533) err = cpufreq_lock_by_mali(1200); else if (mali_gpu_clk == 440) err = cpufreq_lock_by_mali(1000); #endif #else mali_regulator_set_voltage(mali_runtime_resume.vol, mali_runtime_resume.vol); mali_clk_set_rate(mali_runtime_resume.clk, GPU_MHZ); #endif #else mali_clk_set_rate(mali_gpu_clk, GPU_MHZ); #endif MALI_SUCCESS; }
static _mali_osk_errcode_t enable_mali_clocks(void) { int err; err = clk_enable(mali_clock); MALI_DEBUG_PRINT(3,("enable_mali_clocks mali_clock %p error %d \n", mali_clock, err)); mali_runtime_resume.vol = mali_dvfs_get_vol(MALI_DVFS_STEPS + 1); #if MALI_PMM_RUNTIME_JOB_CONTROL_ON #if MALI_DVFS_ENABLED // set clock rate if (get_mali_dvfs_control_status() != 0 || mali_gpu_clk >= mali_runtime_resume.clk) mali_clk_set_rate(mali_gpu_clk, GPU_MHZ); else { mali_regulator_set_voltage(mali_runtime_resume.vol, mali_runtime_resume.vol); mali_clk_set_rate(mali_runtime_resume.clk, GPU_MHZ); } if (mali_gpu_clk <= mali_runtime_resume.clk) set_mali_dvfs_current_step(MALI_DVFS_STEPS + 1); /* lock/unlock CPU freq by Mali */ if (mali_gpu_clk >= 533) err = cpufreq_lock_by_mali(1400); else if (mali_gpu_clk == 440) err = cpufreq_lock_by_mali(1200); #else mali_regulator_set_voltage(mali_runtime_resume.vol, mali_runtime_resume.vol); mali_clk_set_rate(mali_runtime_resume.clk, GPU_MHZ); #endif #else mali_clk_set_rate(mali_gpu_clk, GPU_MHZ); #endif MALI_SUCCESS; }
static _mali_osk_errcode_t enable_mali_clocks(void) { int err; err = clk_enable(mali_clock); MALI_DEBUG_PRINT(3,("enable_mali_clocks mali_clock %p error %d \n", mali_clock, err)); // set clock rate if (get_mali_dvfs_control_status() != 0 || mali_gpu_clk >= mali_runtime_resume.clk) mali_clk_set_rate(mali_gpu_clk, GPU_MHZ); else { mali_regulator_set_voltage(mali_runtime_resume.vol, mali_runtime_resume.vol); mali_clk_set_rate(mali_runtime_resume.clk, GPU_MHZ); } if (mali_gpu_clk <= mali_runtime_resume.clk) set_mali_dvfs_current_step(7); MALI_SUCCESS; }