static int power_init(void)
{
unsigned int val;
int ret = -1;
struct pmic *p;
if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) {
pmic_dialog_init();
p = get_pmic();
/* Set VDDA to 1.25V */
val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, &val);
val |= DA9052_SUPPLY_VBCOREGO;
ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val);
/* Set Vcc peripheral to 1.30V */
ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62);
ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62);
}
if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) {
pmic_init();
p = get_pmic();
/* Set VDDGP to 1.25V for 1GHz on SW1 */
pmic_reg_read(p, REG_SW_0, &val);
val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708;
ret = pmic_reg_write(p, REG_SW_0, val);
/* Set VCC as 1.30V on SW2 */
pmic_reg_read(p, REG_SW_1, &val);
val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708;
ret |= pmic_reg_write(p, REG_SW_1, val);
/* Set global reset timer to 4s */
pmic_reg_read(p, REG_POWER_CTL2, &val);
val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708;
ret |= pmic_reg_write(p, REG_POWER_CTL2, val);
/* Set VUSBSEL and VUSBEN for USB PHY supply*/
pmic_reg_read(p, REG_MODE_0, &val);
val |= (VUSBSEL_MC34708 | VUSBEN_MC34708);
ret |= pmic_reg_write(p, REG_MODE_0, val);
/* Set SWBST to 5V in auto mode */
val = SWBST_AUTO;
ret |= pmic_reg_write(p, SWBST_CTRL, val);
}
return ret;
}
void power_init(void)
{
unsigned int val;
struct pmic *p;
pmic_init();
p = get_pmic();
/* Set VDDA to 1.25V */
pmic_reg_read(p, REG_SW_2, &val);
val &= ~SWX_OUT_MASK;
val |= SWX_OUT_1_25;
pmic_reg_write(p, REG_SW_2, val);
/*
* Need increase VCC and VDDA to 1.3V
* according to MX53 IC TO2 datasheet.
*/
if (is_soc_rev(CHIP_REV_2_0) == 0) {
/* Set VCC to 1.3V for TO2 */
pmic_reg_read(p, REG_SW_1, &val);
val &= ~SWX_OUT_MASK;
val |= SWX_OUT_1_30;
pmic_reg_write(p, REG_SW_1, val);
/* Set VDDA to 1.3V for TO2 */
pmic_reg_read(p, REG_SW_2, &val);
val &= ~SWX_OUT_MASK;
val |= SWX_OUT_1_30;
pmic_reg_write(p, REG_SW_2, val);
}
}
static int s5pc210_phy_control(int on)
{
int ret = 0;
u32 val = 0;
struct pmic *p = get_pmic();
if (pmic_probe(p))
return -1;
if (on) {
ret |= pmic_set_output(p, MAX8997_REG_SAFEOUTCTRL,
ENSAFEOUT1, LDO_ON);
ret |= pmic_reg_read(p, MAX8997_REG_LDO3CTRL, &val);
ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, EN_LDO | val);
ret |= pmic_reg_read(p, MAX8997_REG_LDO8CTRL, &val);
ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, EN_LDO | val);
} else {
ret |= pmic_reg_read(p, MAX8997_REG_LDO8CTRL, &val);
ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, DIS_LDO | val);
ret |= pmic_reg_read(p, MAX8997_REG_LDO3CTRL, &val);
ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, DIS_LDO | val);
ret |= pmic_set_output(p, MAX8997_REG_SAFEOUTCTRL,
ENSAFEOUT1, LDO_OFF);
}
if (ret) {
puts("MAX8997 LDO setting error!\n");
return -1;
}
return 0;
}
static int s5pc210_phy_control(int on)
{
int ret = 0;
struct pmic *p = get_pmic();
if (pmic_probe(p))
return -1;
if (on) {
ret |= pmic_set_output(p,
MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
MAX8998_SAFEOUT1, LDO_ON);
ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
MAX8998_LDO3, LDO_ON);
ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
MAX8998_LDO8, LDO_ON);
} else {
ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
MAX8998_LDO8, LDO_OFF);
ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
MAX8998_LDO3, LDO_OFF);
ret |= pmic_set_output(p,
MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
MAX8998_SAFEOUT1, LDO_OFF);
}
if (ret) {
puts("MAX8998 LDO setting error!\n");
return -1;
}
return 0;
}
static int adc_power_control(int on)
{
int ret;
struct pmic *p = get_pmic();
if (pmic_probe(p))
return -1;
ret = pmic_set_output(p,
MAX8998_REG_ONOFF1,
MAX8998_LDO4, !!on);
return ret;
}
int pmic_dialog_init(void)
{
struct pmic *p = get_pmic();
static const char name[] = "DIALOG_PMIC";
p->name = name;
p->number_of_regs = DIALOG_NUM_OF_REGS;
p->interface = PMIC_I2C;
p->hw.i2c.addr = CONFIG_SYS_DIALOG_PMIC_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = I2C_PMIC;
return 0;
}
int board_late_init(void)
{
u32 val;
struct pmic *p;
pmic_init();
p = get_pmic();
/* Enable RTC battery */
pmic_reg_read(p, REG_POWER_CTL0, &val);
pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
#ifdef CONFIG_HW_WATCHDOG
mxc_hw_watchdog_enable();
#endif
return 0;
}
static int mipi_power(void)
{
int ret = 0;
struct pmic *p = get_pmic();
if (pmic_probe(p))
return 0;
/* LDO3 voltage: 1.1v */
ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, 0x6 | EN_LDO);
/* LDO4 voltage: 1.8v */
ret |= pmic_reg_write(p, MAX8997_REG_LDO4CTRL, 0x14 | EN_LDO);
if (ret) {
puts("MAX8997 LDO setting error!\n");
return -1;
}
return 0;
}
static int lcd_power(void)
{
int ret = 0;
struct pmic *p = get_pmic();
if (pmic_probe(p))
return 0;
/* LDO15 voltage: 2.2v */
ret |= pmic_reg_write(p, MAX8997_REG_LDO15CTRL, 0x1c | EN_LDO);
/* LDO13 voltage: 3.0v */
ret |= pmic_reg_write(p, MAX8997_REG_LDO13CTRL, 0x2c | EN_LDO);
if (ret) {
puts("MAX8997 LDO setting error!\n");
return -1;
}
return 0;
}
int board_mmc_init(bd_t *bis)
{
int err = 0;
gpio_direction_input(GPIO_TF_DETECT);
s3c_gpio_set_pull(GPIO_TF_DETECT, GPIO_PULL_NONE);
/*
* Check the T-flash detect pin
*/
if (!gpio_get_value(GPIO_TF_DETECT)) {
pmic_set_output(get_pmic(),
MAX8698_REG_ONOFF1, MAX8698_LDO5, 1);
udelay(20);
s3c_gpio_cfg_bulk(tf_gpio_table, ARRAY_SIZE(tf_gpio_table));
err = s5p_mmc_init(0, 4);
}
return err;
}
static void power_init(void)
{
unsigned int val;
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
struct pmic *p;
pmic_init();
p = get_pmic();
/* Write needed to Power Gate 2 register */
pmic_reg_read(p, REG_POWER_MISC, &val);
val &= ~PWGT2SPIEN;
pmic_reg_write(p, REG_POWER_MISC, val);
/* Externally powered */
pmic_reg_read(p, REG_CHARGE, &val);
val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB;
pmic_reg_write(p, REG_CHARGE, val);
/* power up the system first */
pmic_reg_write(p, REG_POWER_MISC, PWUP);
/* Set core voltage to 1.1V */
pmic_reg_read(p, REG_SW_0, &val);
val = (val & ~SWx_VOLT_MASK) | SWx_1_100V;
pmic_reg_write(p, REG_SW_0, val);
/* Setup VCC (SW2) to 1.25 */
pmic_reg_read(p, REG_SW_1, &val);
val = (val & ~SWx_VOLT_MASK) | SWx_1_250V;
pmic_reg_write(p, REG_SW_1, val);
/* Setup 1V2_DIG1 (SW3) to 1.25 */
pmic_reg_read(p, REG_SW_2, &val);
val = (val & ~SWx_VOLT_MASK) | SWx_1_250V;
pmic_reg_write(p, REG_SW_2, val);
udelay(50);
/* Raise the core frequency to 800MHz */
writel(0x0, &mxc_ccm->cacrr);
/* Set switchers in Auto in NORMAL mode & STANDBY mode */
/* Setup the switcher mode for SW1 & SW2*/
pmic_reg_read(p, REG_SW_4, &val);
val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) |
(SWMODE_MASK << SWMODE2_SHIFT)));
val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) |
(SWMODE_AUTO_AUTO << SWMODE2_SHIFT);
pmic_reg_write(p, REG_SW_4, val);
/* Setup the switcher mode for SW3 & SW4 */
pmic_reg_read(p, REG_SW_5, &val);
val = (val & ~((SWMODE_MASK << SWMODE3_SHIFT) |
(SWMODE_MASK << SWMODE4_SHIFT)));
val |= (SWMODE_AUTO_AUTO << SWMODE3_SHIFT) |
(SWMODE_AUTO_AUTO << SWMODE4_SHIFT);
pmic_reg_write(p, REG_SW_5, val);
/* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.6V */
pmic_reg_read(p, REG_SETTING_0, &val);
val &= ~(VCAM_MASK | VGEN3_MASK | VDIG_MASK);
val |= VDIG_1_65 | VGEN3_1_8 | VCAM_2_6;
pmic_reg_write(p, REG_SETTING_0, val);
/* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
pmic_reg_read(p, REG_SETTING_1, &val);
val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK);
val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775;
pmic_reg_write(p, REG_SETTING_1, val);
/* Configure VGEN3 and VCAM regulators to use external PNP */
val = VGEN3CONFIG | VCAMCONFIG;
pmic_reg_write(p, REG_MODE_1, val);
udelay(200);
gpio_direction_output(46, 0);
/* Reset the ethernet controller over GPIO */
writel(0x1, IOMUXC_BASE_ADDR + 0x0AC);
/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |
VVIDEOEN | VAUDIOEN | VSDEN;
pmic_reg_write(p, REG_MODE_1, val);
udelay(500);
gpio_set_value(46, 1);
}
static void power_init_mx51(void)
{
unsigned int val;
struct pmic *p;
pmic_init();
p = get_pmic();
/* Write needed to Power Gate 2 register */
pmic_reg_read(p, REG_POWER_MISC, &val);
/* enable VCAM with 2.775V to enable read from PMIC */
val = VCAMCONFIG | VCAMEN;
pmic_reg_write(p, REG_MODE_1, val);
/*
* Set switchers in Auto in NORMAL mode & STANDBY mode
* Setup the switcher mode for SW1 & SW2
*/
pmic_reg_read(p, REG_SW_4, &val);
val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) |
(SWMODE_MASK << SWMODE2_SHIFT)));
val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) |
(SWMODE_AUTO_AUTO << SWMODE2_SHIFT);
pmic_reg_write(p, REG_SW_4, val);
/* Setup the switcher mode for SW3 & SW4 */
pmic_reg_read(p, REG_SW_5, &val);
val &= ~((SWMODE_MASK << SWMODE4_SHIFT) |
(SWMODE_MASK << SWMODE3_SHIFT));
val |= (SWMODE_AUTO_AUTO << SWMODE4_SHIFT) |
(SWMODE_AUTO_AUTO << SWMODE3_SHIFT);
pmic_reg_write(p, REG_SW_5, val);
/* Set VGEN3 to 1.8V, VCAM to 3.0V */
pmic_reg_read(p, REG_SETTING_0, &val);
val &= ~(VCAM_MASK | VGEN3_MASK);
val |= VCAM_3_0;
pmic_reg_write(p, REG_SETTING_0, val);
/* Set VVIDEO to 2.775V, VAUDIO to 3V0, VSD to 1.8V */
pmic_reg_read(p, REG_SETTING_1, &val);
val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK);
val |= VVIDEO_2_775 | VAUDIO_3_0 | VSD_1_8;
pmic_reg_write(p, REG_SETTING_1, val);
/* Configure VGEN3 and VCAM regulators to use external PNP */
val = VGEN3CONFIG | VCAMCONFIG;
pmic_reg_write(p, REG_MODE_1, val);
udelay(200);
/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |
VVIDEOEN | VAUDIOEN | VSDEN;
pmic_reg_write(p, REG_MODE_1, val);
pmic_reg_read(p, REG_POWER_CTL2, &val);
val |= WDIRESET;
pmic_reg_write(p, REG_POWER_CTL2, val);
udelay(2500);
}
