void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) { int i; /* enable CSU NS access permission */ for (i = 0; i < 64; i++) { mmio_write_32(IMX_CSU_BASE + i * 4, 0xffffffff); } #if DEBUG_CONSOLE static console_uart_t console; console_uart_register(IMX_BOOT_UART_BASE, IMX_BOOT_UART_CLK_IN_HZ, IMX_CONSOLE_BAUDRATE, &console); #endif /* * tell BL3-1 where the non-secure software image is located * and the entry state information. */ bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); bl31_tz380_setup(); }
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) { static console_uart_t console; int i; /* Enable CSU NS access permission */ for (i = 0; i < 64; i++) { mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); } console_imx_uart_register(IMX_BOOT_UART_BASE, IMX_BOOT_UART_CLK_IN_HZ, IMX_CONSOLE_BAUDRATE, &console); /* This console is only used for boot stage */ console_set_scope(&console.console, CONSOLE_FLAG_BOOT); /* * tell BL3-1 where the non-secure software image is located * and the entry state information. */ bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); bl31_tzc380_setup(); }