static inline void lpc17_fpuconfig(void)
{
uint32_t regval;
/* Clear CONTROL.FPCA so that we do not get the extended context frame
* with the volatile FP registers stacked in the saved context.
*/
regval = getcontrol();
regval &= ~(1 << 2);
setcontrol(regval);
/* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend
* with the lazy FP context save behaviour. Clear FPCCR.ASPEN since we
* are going to keep CONTROL.FPCA off for all contexts.
*/
regval = getreg32(NVIC_FPCCR);
regval &= ~((1 << 31) | (1 << 30));
putreg32(regval, NVIC_FPCCR);
/* Enable full access to CP10 and CP11 */
regval = getreg32(NVIC_CPACR);
regval |= ((3 << (2*10)) | (3 << (2*11)));
putreg32(regval, NVIC_CPACR);
}
/****************************************************************************
* write_registers
****************************************************************************/
static int write_registers(uint32_t regs[], char *buffer, int max, int fd)
{
int n = snprintf(buffer, max, " r0:0x%08x r1:0x%08x r2:0x%08x r3:0x%08x r4:0x%08x r5:0x%08x r6:0x%08x r7:0x%08x\n",
regs[REG_R0], regs[REG_R1],
regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5],
regs[REG_R6], regs[REG_R7]);
if (n != write(fd, buffer, n)) {
return -EIO;
}
n = snprintf(buffer, max, " r8:0x%08x r9:0x%08x r10:0x%08x r11:0x%08x r12:0x%08x sp:0x%08x lr:0x%08x pc:0x%08x\n",
regs[REG_R8], regs[REG_R9],
regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13],
regs[REG_R14], regs[REG_R15]);
if (n != write(fd, buffer, n)) {
return -EIO;
}
#ifdef CONFIG_ARMV7M_USEBASEPRI
n = snprintf(buffer, max, " xpsr:0x%08x basepri:0x%08x control:0x%08x\n",
regs[REG_XPSR], regs[REG_BASEPRI],
getcontrol());
#else
n = snprintf(buffer, max, " xpsr:0x%08x primask:0x%08x control:0x%08x\n",
regs[REG_XPSR], regs[REG_PRIMASK],
getcontrol());
#endif
if (n != write(fd, buffer, n)) {
return -EIO;
}
#ifdef REG_EXC_RETURN
n = snprintf(buffer, max, " exe return:0x%08x\n", regs[REG_EXC_RETURN]);
if (n != write(fd, buffer, n)) {
return -EIO;
}
#endif
return OK;
}
void up_systemswitch(uint32_t sys_addr)
{
typedef void (FAR *__start_t)(void);
__start_t __start;
__start = (__start_t) *(CODE uint32_t*) (sys_addr + 4);
setcontrol(getcontrol() & 0xfffffffc);
setmsp(*(CODE uint32_t*) sys_addr);
__start();
}
int memu(const char* user_name,int* extra_button){
int i = 0;
int restart = 0;
while (1) {
printf(" hello~~ %s,",user_name);
printf(" Welcome to CPythonCharX press s&w to move '*'\n");
printf(" You'd better press win+space to switch english ");
cprint("start the game 开始装逼 ",1-1,1);
cprint("/****************************************/",2-1,1);
cprint("get point records 查看装逼榜",3-1,1);
cprint("exit 退出装逼 ",4-1,1);
cprint(" ______________________________________ ",5-1,0);
cprint(" →5, ~ 你， 渴望力量吗？ ~ ",6-1,0);
cprint(" 极制extra以献给渴望力量的人 ",7-1,0);
printx(ctrl);
getcontrol();
if ((13 == cont && ctrl == 1-1) || '1' == cont ){
gotoxy(4,2);
break;
}
if ((13 == cont && ctrl == 2-1) || '2' == cont ){
// break;
}
if ((13 == cont && ctrl == 3-1) || '3' == cont ){
gotoxy(4,4);
output_point_records();
}
if ((13 == cont && ctrl == 4-1) || '4' == cont ){
gotoxy(0,15);
return -1;
}
if ((13 == cont && ctrl == 6-1) || '5' == cont ){
gotoxy(4,7);
*extra_button = 1;
break;
}
system("cls");
}
i = 0;
while (*(shaonv+i) != '\0'){
printf("%c",*(shaonv+i));
_sleep(extra_speed-25);
i++;
}
system("cls");
}
int up_memfault(int irq, FAR void *context, FAR void *arg)
{
/* Dump some memory management fault info */
(void)up_irq_save();
_alert("PANIC!!! Memory Management Fault:\n");
mfinfo(" IRQ: %d context: %p\n", irq, regs);
_alert(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mfinfo(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mfinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mfinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
mfinfo(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfinfo(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
mfinfo(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfinfo(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
PANIC();
return OK; /* Won't get here */
}
int up_memfault(int irq, FAR void *context)
{
/* Dump some memory management fault info */
(void)irqsave();
lldbg("PANIC!!! Memory Management Fault:\n");
mfdbg(" IRQ: %d context: %p\n", irq, regs);
lldbg(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI],
current_regs[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK],
current_regs[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK]);
# endif
#endif
PANIC(OSERR_UNEXPECTEDISR);
return OK;
}
static void
dumpitall(void)
{
extern ulong l1table;
iprint("intr: icip %lux iclr %lux iccr %lux icmr %lux\n",
intrregs->icip,
intrregs->iclr, intrregs->iccr, intrregs->icmr );
iprint("gpio: lvl %lux dir %lux, re %lux, fe %lux sts %lux alt %lux\n",
gpioregs->level,
gpioregs->direction, gpioregs->rising, gpioregs->falling,
gpioregs->edgestatus, gpioregs->altfunc);
iprint("uart1: %lux %lux %lux \nuart3: %lux %lux %lux\n",
R(&sa1110uart[0])->ctl[0], R(&sa1110uart[0])->status[0], R(&sa1110uart[0])->status[1],
R(&sa1110uart[1])->ctl[0], R(&sa1110uart[1])->status[0], R(&sa1110uart[1])->status[1]);
iprint("tmr: osmr %lux %lux %lux %lux oscr %lux ossr %lux oier %lux\n",
timerregs->osmr[0], timerregs->osmr[1],
timerregs->osmr[2], timerregs->osmr[3],
timerregs->oscr, timerregs->ossr, timerregs->oier);
iprint("dram: mdcnfg %lux mdrefr %lux cas %lux %lux %lux %lux %lux %lux\n",
memconfregs->mdcnfg, memconfregs->mdrefr,
memconfregs->mdcas00, memconfregs->mdcas01,memconfregs->mdcas02,
memconfregs->mdcas20, memconfregs->mdcas21,memconfregs->mdcas22);
iprint("dram: mdcnfg msc %lux %lux %lux mecr %lux\n",
memconfregs->msc0, memconfregs->msc1,memconfregs->msc2,
memconfregs->mecr);
iprint("mmu: CpControl %lux CpTTB %lux CpDAC %lux l1table 0x%lux\n",
getcontrol(), getttb(), getdac(), l1table);
iprint("powerregs: pmcr %lux pssr %lux pcfr %lux ppcr %lux pwer %lux pspr %lux pgsr %lux posr %lux\n",
powerregs->pmcr, powerregs->pssr, powerregs->pcfr, powerregs->ppcr,
powerregs->pwer, powerregs->pspr, powerregs->pgsr, powerregs->posr);
checkpagetab();
checkflash();
checkktext();
iprint("\n\n");
}
int up_hardfault(int irq, FAR void *context)
{
#if defined(CONFIG_DEBUG_HARDFAULT) || !defined(CONFIG_ARMV7M_USEBASEPRI)
uint32_t *regs = (uint32_t*)context;
#endif
/* Get the value of the program counter where the fault occurred */
#ifndef CONFIG_ARMV7M_USEBASEPRI
uint16_t *pc = (uint16_t*)regs[REG_PC] - 1;
/* Check if the pc lies in known FLASH memory.
* REVISIT: What if the PC lies in "unknown" external memory? Best
* use the BASEPRI register if you have external memory.
*/
#ifdef CONFIG_NUTTX_KERNEL
/* In the kernel build, SVCalls are expected in either the base, kernel
* FLASH region or in the user FLASH region.
*/
if (((uintptr_t)pc >= (uintptr_t)&_stext &&
(uintptr_t)pc < (uintptr_t)&_etext) ||
((uintptr_t)pc >= (uintptr_t)USERSPACE->us_textstart &&
(uintptr_t)pc < (uintptr_t)USERSPACE->us_textend))
#else
/* SVCalls are expected only from the base, kernel FLASH region */
if ((uintptr_t)pc >= (uintptr_t)&_stext &&
(uintptr_t)pc < (uintptr_t)&_etext)
#endif
{
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hfdbg(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
*/
if (insn == INSN_SVC0)
{
hfdbg("Forward SVCall\n");
return up_svcall(irq, context);
}
}
#endif
/* Dump some hard fault info */
hfdbg("Hard Fault:\n");
hfdbg(" IRQ: %d regs: %p\n", irq, regs);
hfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
hfdbg(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI],
current_regs[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK],
current_regs[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK]);
# endif
#endif
(void)irqsave();
lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
PANIC();
return OK;
}
