static BaseType_t prvGMACInit( void )
{
uint32_t ncfgr;
gmac_options_t gmac_option;
memset( &gmac_option, '\0', sizeof( gmac_option ) );
gmac_option.uc_copy_all_frame = 0;
gmac_option.uc_no_boardcast = 0;
memcpy( gmac_option.uc_mac_addr, ucMACAddress, sizeof( gmac_option.uc_mac_addr ) );
gs_gmac_dev.p_hw = GMAC;
gmac_dev_init( GMAC, &gs_gmac_dev, &gmac_option );
NVIC_SetPriority( GMAC_IRQn, configMAC_INTERRUPT_PRIORITY );
NVIC_EnableIRQ( GMAC_IRQn );
/* Contact the Ethernet PHY and store it's address in 'ethernet_phy_addr' */
ethernet_phy_init( GMAC, ETHERNET_CONF_PHY_ADDR, sysclk_get_cpu_hz() );
ethernet_phy_auto_negotiate( GMAC, ethernet_phy_addr );
ethernet_phy_set_link( GMAC, ethernet_phy_addr, 1 );
/* The GMAC driver will call a hook prvRxCallback(), which
in turn will wake-up the task by calling vTaskNotifyGiveFromISR() */
gmac_dev_set_rx_callback( &gs_gmac_dev, prvRxCallback );
gmac_set_address( GMAC, 1, (uint8_t*)llmnr_mac_address );
ncfgr = GMAC_NCFGR_SPD | GMAC_NCFGR_FD;
GMAC->GMAC_NCFGR = ( GMAC->GMAC_NCFGR & ~( GMAC_NCFGR_SPD | GMAC_NCFGR_FD ) ) | ncfgr;
return 1;
}
BaseType_t xNetworkInterfaceInitialise( void )
{
gmac_options_t xGMACOptions;
extern uint8_t ucMACAddress[ 6 ];
const TickType_t xPHYDelay_400ms = 400UL;
BaseType_t xReturn = pdFALSE;
/* Ensure PHY is ready. */
vTaskDelay( xPHYDelay_400ms / portTICK_RATE_MS );
/* Enable GMAC clock. */
pmc_enable_periph_clk( ID_GMAC );
/* Fill in GMAC options */
xGMACOptions.uc_copy_all_frame = 0;
xGMACOptions.uc_no_boardcast = 0;
memcpy( xGMACOptions.uc_mac_addr, ucMACAddress, sizeof( ucMACAddress ) );
xGMACStruct.p_hw = GMAC;
/* Init GMAC driver structure. */
gmac_dev_init( GMAC, &xGMACStruct, &xGMACOptions );
/* Init MAC PHY driver. */
if( ethernet_phy_init( GMAC, BOARD_GMAC_PHY_ADDR, sysclk_get_cpu_hz() ) == GMAC_OK )
{
/* Auto Negotiate, work in RMII mode. */
if( ethernet_phy_auto_negotiate( GMAC, BOARD_GMAC_PHY_ADDR ) == GMAC_OK )
{
/* Establish Ethernet link. */
vTaskDelay( xPHYDelay_400ms * 2UL );
if( ethernet_phy_set_link( GMAC, BOARD_GMAC_PHY_ADDR, 1 ) == GMAC_OK )
{
/* Register the callbacks. */
gmac_dev_set_rx_callback( &xGMACStruct, prvGMACRxCallback );
/* The Rx deferred interrupt handler task is created at the
highest possible priority to ensure the interrupt handler can
return directly to it no matter which task was running when the
interrupt occurred. */
xTaskCreate( prvGMACDeferredInterruptHandlerTask,/* The function that implements the task. */
"MACTsk",
configMINIMAL_STACK_SIZE, /* Stack allocated to the task (defined in words, not bytes). */
NULL, /* The task parameter is not used. */
configMAX_PRIORITIES - 1, /* The priority assigned to the task. */
&xMACEventHandlingTask ); /* The handle is stored so the ISR knows which task to notify. */
/* Enable the interrupt and set its priority as configured.
THIS DRIVER REQUIRES configMAC_INTERRUPT_PRIORITY TO BE DEFINED,
PREFERABLY IN FreeRTOSConfig.h. */
NVIC_SetPriority( GMAC_IRQn, configMAC_INTERRUPT_PRIORITY );
NVIC_EnableIRQ( GMAC_IRQn );
xReturn = pdPASS;
}
}
}
return xReturn;
}
BaseType_t xNetworkInterfaceInitialise( void )
{
gmac_options_t xGMACOptions;
extern uint8_t ucMACAddress[ 6 ];
const TickType_t xPHYDelay_400ms = 400UL;
BaseType_t xReturn = pdFALSE;
/* Ensure PHY is ready. */
vTaskDelay( xPHYDelay_400ms / portTICK_RATE_MS );
/* Enable GMAC clock. */
pmc_enable_periph_clk( ID_GMAC );
/* Fill in GMAC options */
xGMACOptions.uc_copy_all_frame = 0;
xGMACOptions.uc_no_boardcast = 0;
memcpy( xGMACOptions.uc_mac_addr, ucMACAddress, sizeof( ucMACAddress ) );
xGMACStruct.p_hw = GMAC;
/* Init GMAC driver structure. */
gmac_dev_init( GMAC, &xGMACStruct, &xGMACOptions );
/* Init MAC PHY driver. */
if( ethernet_phy_init( GMAC, BOARD_GMAC_PHY_ADDR, sysclk_get_cpu_hz() ) == GMAC_OK )
{
/* Auto Negotiate, work in RMII mode. */
if( ethernet_phy_auto_negotiate( GMAC, BOARD_GMAC_PHY_ADDR ) == GMAC_OK )
{
/* Establish Ethernet link. */
vTaskDelay( xPHYDelay_400ms * 2UL );
if( ethernet_phy_set_link( GMAC, BOARD_GMAC_PHY_ADDR, 1 ) == GMAC_OK )
{
/* Create the event semaphore if it has not already been
created. */
if( xGMACRxEventSemaphore == NULL )
{
xGMACRxEventSemaphore = xSemaphoreCreateCounting( ULONG_MAX, 0 );
#if ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS == 1
{
/* If the trace recorder code is included name the semaphore for
viewing in FreeRTOS+Trace. */
vTraceSetQueueName( xGMACRxEventSemaphore, "MAC_RX" );
}
#endif /* ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS == 1 */
}
/* Register the callbacks. */
gmac_dev_set_rx_callback( &xGMACStruct, prvGMACRxCallback );
/* The Rx deferred interrupt handler task is created at the
highest possible priority to ensure the interrupt handler can
return directly to it no matter which task was running when the
interrupt occurred. */
xTaskCreate( prvGMACDeferredInterruptHandlerTask,/* The function that implements the task. */
"MACTsk",
configMINIMAL_STACK_SIZE, /* Stack allocated to the task (defined in words, not bytes). */
NULL, /* The task parameter is not used. */
configMAX_PRIORITIES - 1, /* The priority assigned to the task. */
NULL ); /* The handle is not required, so NULL is passed. */
/* Enable the interrupt and set its priority as configured.
THIS DRIVER REQUIRES configMAC_INTERRUPT_PRIORITY TO BE DEFINED,
PREFERABLY IN FreeRTOSConfig.h. */
NVIC_SetPriority( GMAC_IRQn, configMAC_INTERRUPT_PRIORITY );
NVIC_EnableIRQ( GMAC_IRQn );
xReturn = pdPASS;
}
}
}
return xReturn;
}
