int adc_init(adc_t line) { /* make sure the given line is valid */ if (line >= ADC_NUMOF) { return -1; } /* prepare the device: lock and power on */ prep(line); /* configure the connected pin mux */ if (adc_config[line].pin != GPIO_UNDEF) { gpio_init_port(adc_config[line].pin, GPIO_AF_ANALOG); } /* The ADC requires at least 2 MHz module clock for full accuracy, and less * than 12 MHz */ /* For the calibration it is important that the ADC clock is <= 4 MHz */ uint32_t adiv; if (CLOCK_BUSCLOCK > (ADC_MAX_CLK << 3)) { #if KINETIS_HAVE_ADICLK_BUS_DIV_2 /* Some CPUs, e.g. MK60D10, MKW22D5, provide an additional divide by two * divider for the bus clock as CFG1[ADICLK] = 0b01 */ adiv = ADC_CFG1_ADIV(3) | ADC_CFG1_ADICLK(1); #else /* Newer CPUs seem to have replaced this with various alternate clock * sources instead */ adiv = ADC_CFG1_ADIV(3); #endif } else { unsigned int i = 0; while ((i < 3) && (CLOCK_BUSCLOCK > (ADC_MAX_CLK << i))) { ++i; } adiv = ADC_CFG1_ADIV(i); } /* set configuration register 1: clocking and precision */ /* Set long sample time */ dev(line)->CFG1 = ADC_CFG1_ADLSMP_MASK | adiv; /* select ADxxb channels, longest sample time (20 extra ADC cycles) */ dev(line)->CFG2 = ADC_CFG2_MUXSEL_MASK | ADC_CFG2_ADLSTS(0); /* select software trigger, external ref pins */ dev(line)->SC2 = ADC_SC2_REFSEL(0); /* select hardware average over 32 samples */ dev(line)->SC3 = ADC_SC3_AVGE_MASK | ADC_SC3_AVGS(3); /* set an (arbitrary) input channel, single-ended mode */ dev(line)->SC1[0] = ADC_SC1_ADCH(0); /* perform calibration routine */ int res = kinetis_adc_calibrate(dev(line)); done(line); return res; }
int spi_init_cs(spi_t bus, spi_cs_t cs) { if (bus >= SPI_NUMOF) { return SPI_NODEV; } if (cs == SPI_CS_UNDEF) { return SPI_NOCS; } if (cs & SWCS_MASK) { gpio_init((gpio_t)cs, GPIO_OUT); } else { if ((cs >= SPI_HWCS_NUMOF) || (spi_config[bus].pin_cs[cs] == GPIO_UNDEF)) { return SPI_NOCS; } gpio_init_port(spi_config[bus].pin_cs[cs], spi_config[bus].pcr); } return SPI_OK; }
void spi_init_pins(spi_t bus) { gpio_init_port(spi_config[bus].pin_miso, spi_config[bus].pcr); gpio_init_port(spi_config[bus].pin_mosi, spi_config[bus].pcr); gpio_init_port(spi_config[bus].pin_clk , spi_config[bus].pcr); }