static int __init simpad_init(void) { int ret; spin_lock_init(&cs3_lock); cs3_gpio.label = "simpad_cs3"; cs3_gpio.base = SIMPAD_CS3_GPIO_BASE; cs3_gpio.ngpio = 24; cs3_gpio.set = cs3_gpio_set; cs3_gpio.get = cs3_gpio_get; cs3_gpio.direction_input = cs3_gpio_direction_input; cs3_gpio.direction_output = cs3_gpio_direction_output; ret = gpiochip_add_data(&cs3_gpio, NULL); if (ret) printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device"); pm_power_off = simpad_power_off; sa11x0_ppc_configure_mcp(); sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, ARRAY_SIZE(simpad_flash_resources)); sa11x0_register_mcp(&simpad_mcp_data); ret = platform_add_devices(devices, ARRAY_SIZE(devices)); if(ret) printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device"); return 0; }
static int tps65218_gpio_probe(struct platform_device *pdev) { struct tps65218 *tps65218 = dev_get_drvdata(pdev->dev.parent); struct tps65218_gpio *tps65218_gpio; int ret; tps65218_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65218_gpio), GFP_KERNEL); if (!tps65218_gpio) return -ENOMEM; tps65218_gpio->tps65218 = tps65218; tps65218_gpio->gpio_chip = template_chip; tps65218_gpio->gpio_chip.parent = &pdev->dev; #ifdef CONFIG_OF_GPIO tps65218_gpio->gpio_chip.of_node = pdev->dev.of_node; #endif ret = gpiochip_add_data(&tps65218_gpio->gpio_chip, tps65218_gpio); if (ret < 0) { dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret); return ret; } platform_set_drvdata(pdev, tps65218_gpio); return ret; }
static int dc_gpiochip_add(struct dc_pinmap *pmap, struct device_node *np) { struct gpio_chip *chip = &pmap->chip; int ret; chip->label = DRIVER_NAME; chip->parent = pmap->dev; chip->request = gpiochip_generic_request; chip->free = gpiochip_generic_free; chip->direction_input = dc_gpio_direction_input; chip->direction_output = dc_gpio_direction_output; chip->get = dc_gpio_get; chip->set = dc_gpio_set; chip->base = -1; chip->ngpio = PINS_COUNT; chip->of_node = np; chip->of_gpio_n_cells = 2; spin_lock_init(&pmap->lock); ret = gpiochip_add_data(chip, pmap); if (ret < 0) return ret; ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0, PINS_COUNT); if (ret < 0) { gpiochip_remove(chip); return ret; } return 0; }
static struct sh_pfc_chip * sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *), struct sh_pfc_window *mem) { struct sh_pfc_chip *chip; int ret; chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); if (unlikely(!chip)) return ERR_PTR(-ENOMEM); chip->mem = mem; chip->pfc = pfc; ret = setup(chip); if (ret < 0) return ERR_PTR(ret); ret = gpiochip_add_data(&chip->gpio_chip, chip); if (unlikely(ret < 0)) return ERR_PTR(ret); dev_info(pfc->dev, "%s handling gpio %u -> %u\n", chip->gpio_chip.label, chip->gpio_chip.base, chip->gpio_chip.base + chip->gpio_chip.ngpio - 1); return chip; }
static int add_children(struct i2c_client *client) { static const struct { int offset; char *label; } config_inputs[] = { /* 8 == right after the LEDs */ { 8 + 0, "sw6_1", }, { 8 + 1, "sw6_2", }, { 8 + 2, "sw6_3", }, { 8 + 3, "sw6_4", }, { 8 + 4, "NTSC/nPAL", }, }; struct device *child; int status; int i; /* GPIO-ish stuff */ dm355evm_msp_gpio.parent = &client->dev; status = gpiochip_add_data(&dm355evm_msp_gpio, NULL); if (status < 0) return status; /* LED output */ if (msp_has_leds()) { #define GPIO_LED(l) .name = l, .active_low = true static struct gpio_led evm_leds[] = { { GPIO_LED("dm355evm::ds14"), .default_trigger = "heartbeat", }, { GPIO_LED("dm355evm::ds15"),
static int gpo_twl6040_probe(struct platform_device *pdev) { struct device *twl6040_core_dev = pdev->dev.parent; struct twl6040 *twl6040 = dev_get_drvdata(twl6040_core_dev); int ret; twl6040gpo_chip.base = -1; if (twl6040_get_revid(twl6040) < TWL6041_REV_ES2_0) twl6040gpo_chip.ngpio = 3; /* twl6040 have 3 GPO */ else twl6040gpo_chip.ngpio = 1; /* twl6041 have 1 GPO */ twl6040gpo_chip.parent = &pdev->dev; #ifdef CONFIG_OF_GPIO twl6040gpo_chip.of_node = twl6040_core_dev->of_node; #endif ret = gpiochip_add_data(&twl6040gpo_chip, NULL); if (ret < 0) { dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); twl6040gpo_chip.ngpio = 0; } return ret; }
static int arizona_gpio_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); struct arizona_pdata *pdata = dev_get_platdata(arizona->dev); struct arizona_gpio *arizona_gpio; int ret; arizona_gpio = devm_kzalloc(&pdev->dev, sizeof(*arizona_gpio), GFP_KERNEL); if (!arizona_gpio) return -ENOMEM; arizona_gpio->arizona = arizona; arizona_gpio->gpio_chip = template_chip; arizona_gpio->gpio_chip.parent = &pdev->dev; #ifdef CONFIG_OF_GPIO arizona_gpio->gpio_chip.of_node = arizona->dev->of_node; #endif switch (arizona->type) { case WM5102: case WM5110: case WM8280: case WM8997: case WM8998: case WM1814: arizona_gpio->gpio_chip.ngpio = 5; break; case WM1831: case CS47L24: arizona_gpio->gpio_chip.ngpio = 2; break; default: dev_err(&pdev->dev, "Unknown chip variant %d\n", arizona->type); return -EINVAL; } if (pdata && pdata->gpio_base) arizona_gpio->gpio_chip.base = pdata->gpio_base; else arizona_gpio->gpio_chip.base = -1; ret = gpiochip_add_data(&arizona_gpio->gpio_chip, arizona_gpio); if (ret < 0) { dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); goto err; } platform_set_drvdata(pdev, arizona_gpio); return ret; err: return ret; }
int bcma_gpio_init(struct bcma_drv_cc *cc) { struct bcma_bus *bus = cc->core->bus; struct gpio_chip *chip = &cc->gpio; int err; chip->label = "bcma_gpio"; chip->owner = THIS_MODULE; chip->request = bcma_gpio_request; chip->free = bcma_gpio_free; chip->get = bcma_gpio_get_value; chip->set = bcma_gpio_set_value; chip->direction_input = bcma_gpio_direction_input; chip->direction_output = bcma_gpio_direction_output; chip->owner = THIS_MODULE; chip->parent = bus->dev; #if IS_BUILTIN(CONFIG_OF) chip->of_node = cc->core->dev.of_node; #endif switch (bus->chipinfo.id) { case BCMA_CHIP_ID_BCM4707: case BCMA_CHIP_ID_BCM5357: case BCMA_CHIP_ID_BCM53572: case BCMA_CHIP_ID_BCM53573: case BCMA_CHIP_ID_BCM47094: chip->ngpio = 32; break; default: chip->ngpio = 16; } /* * Register SoC GPIO devices with absolute GPIO pin base. * On MIPS, we don't have Device Tree and we can't use relative (per chip) * GPIO numbers. * On some ARM devices, user space may want to access some system GPIO * pins directly, which is easier to do with a predictable GPIO base. */ if (IS_BUILTIN(CONFIG_BCM47XX) || cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) chip->base = bus->num * BCMA_GPIO_MAX_PINS; else chip->base = -1; err = gpiochip_add_data(chip, cc); if (err) return err; err = bcma_gpio_irq_init(cc); if (err) { gpiochip_remove(chip); return err; } return 0; }
static int adp5588_gpio_add(struct adp5588_kpad *kpad) { struct device *dev = &kpad->client->dev; const struct adp5588_kpad_platform_data *pdata = dev_get_platdata(dev); const struct adp5588_gpio_platform_data *gpio_data = pdata->gpio_data; int i, error; if (!gpio_data) return 0; kpad->gc.ngpio = adp5588_build_gpiomap(kpad, pdata); if (kpad->gc.ngpio == 0) { dev_info(dev, "No unused gpios left to export\n"); return 0; } kpad->export_gpio = true; kpad->gc.direction_input = adp5588_gpio_direction_input; kpad->gc.direction_output = adp5588_gpio_direction_output; kpad->gc.get = adp5588_gpio_get_value; kpad->gc.set = adp5588_gpio_set_value; kpad->gc.can_sleep = 1; kpad->gc.base = gpio_data->gpio_start; kpad->gc.label = kpad->client->name; kpad->gc.owner = THIS_MODULE; kpad->gc.names = gpio_data->names; mutex_init(&kpad->gpio_lock); error = gpiochip_add_data(&kpad->gc, kpad); if (error) { dev_err(dev, "gpiochip_add failed, err: %d\n", error); return error; } for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { kpad->dat_out[i] = adp5588_read(kpad->client, GPIO_DAT_OUT1 + i); kpad->dir[i] = adp5588_read(kpad->client, GPIO_DIR1 + i); } if (gpio_data->setup) { error = gpio_data->setup(kpad->client, kpad->gc.base, kpad->gc.ngpio, gpio_data->context); if (error) dev_warn(dev, "setup failed, %d\n", error); } return 0; }
static int palmas_gpio_probe(struct platform_device *pdev) { struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); struct palmas_platform_data *palmas_pdata; struct palmas_gpio *palmas_gpio; int ret; const struct of_device_id *match; const struct palmas_device_data *dev_data; match = of_match_device(of_palmas_gpio_match, &pdev->dev); if (!match) return -ENODEV; dev_data = match->data; if (!dev_data) dev_data = &palmas_dev_data; palmas_gpio = devm_kzalloc(&pdev->dev, sizeof(*palmas_gpio), GFP_KERNEL); if (!palmas_gpio) return -ENOMEM; palmas_gpio->palmas = palmas; palmas_gpio->gpio_chip.owner = THIS_MODULE; palmas_gpio->gpio_chip.label = dev_name(&pdev->dev); palmas_gpio->gpio_chip.ngpio = dev_data->ngpio; palmas_gpio->gpio_chip.can_sleep = true; palmas_gpio->gpio_chip.direction_input = palmas_gpio_input; palmas_gpio->gpio_chip.direction_output = palmas_gpio_output; palmas_gpio->gpio_chip.to_irq = palmas_gpio_to_irq; palmas_gpio->gpio_chip.set = palmas_gpio_set; palmas_gpio->gpio_chip.get = palmas_gpio_get; palmas_gpio->gpio_chip.parent = &pdev->dev; #ifdef CONFIG_OF_GPIO palmas_gpio->gpio_chip.of_node = pdev->dev.of_node; #endif palmas_pdata = dev_get_platdata(palmas->dev); if (palmas_pdata && palmas_pdata->gpio_base) palmas_gpio->gpio_chip.base = palmas_pdata->gpio_base; else palmas_gpio->gpio_chip.base = -1; ret = gpiochip_add_data(&palmas_gpio->gpio_chip, palmas_gpio); if (ret < 0) { dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); return ret; } platform_set_drvdata(pdev, palmas_gpio); return ret; }
static int octeon_gpio_probe(struct platform_device *pdev) { struct octeon_gpio *gpio; struct gpio_chip *chip; struct resource *res_mem; int err = 0; gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); if (!gpio) return -ENOMEM; chip = &gpio->chip; res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res_mem == NULL) { dev_err(&pdev->dev, "found no memory resource\n"); err = -ENXIO; goto out; } if (!devm_request_mem_region(&pdev->dev, res_mem->start, resource_size(res_mem), res_mem->name)) { dev_err(&pdev->dev, "request_mem_region failed\n"); err = -ENXIO; goto out; } gpio->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem)); pdev->dev.platform_data = chip; chip->label = "octeon-gpio"; chip->parent = &pdev->dev; chip->owner = THIS_MODULE; chip->base = 0; chip->can_sleep = false; chip->ngpio = 20; chip->direction_input = octeon_gpio_dir_in; chip->get = octeon_gpio_get; chip->direction_output = octeon_gpio_dir_out; chip->set = octeon_gpio_set; err = gpiochip_add_data(chip, gpio); if (err) goto out; dev_info(&pdev->dev, "OCTEON GPIO driver probed.\n"); out: return err; }
static int mb86s70_gpio_probe(struct platform_device *pdev) { struct mb86s70_gpio_chip *gchip; struct resource *res; int ret; gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL); if (gchip == NULL) return -ENOMEM; platform_set_drvdata(pdev, gchip); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); gchip->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(gchip->base)) return PTR_ERR(gchip->base); gchip->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(gchip->clk)) return PTR_ERR(gchip->clk); ret = clk_prepare_enable(gchip->clk); if (ret) return ret; spin_lock_init(&gchip->lock); gchip->gc.direction_output = mb86s70_gpio_direction_output; gchip->gc.direction_input = mb86s70_gpio_direction_input; gchip->gc.request = mb86s70_gpio_request; gchip->gc.free = mb86s70_gpio_free; gchip->gc.get = mb86s70_gpio_get; gchip->gc.set = mb86s70_gpio_set; gchip->gc.label = dev_name(&pdev->dev); gchip->gc.ngpio = 32; gchip->gc.owner = THIS_MODULE; gchip->gc.parent = &pdev->dev; gchip->gc.base = -1; ret = gpiochip_add_data(&gchip->gc, gchip); if (ret) { dev_err(&pdev->dev, "couldn't register gpio driver\n"); clk_disable_unprepare(gchip->clk); } return ret; }
static int tps6586x_gpio_probe(struct platform_device *pdev) { struct tps6586x_platform_data *pdata; struct tps6586x_gpio *tps6586x_gpio; int ret; pdata = dev_get_platdata(pdev->dev.parent); tps6586x_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps6586x_gpio), GFP_KERNEL); if (!tps6586x_gpio) return -ENOMEM; tps6586x_gpio->parent = pdev->dev.parent; tps6586x_gpio->gpio_chip.owner = THIS_MODULE; tps6586x_gpio->gpio_chip.label = pdev->name; tps6586x_gpio->gpio_chip.parent = &pdev->dev; tps6586x_gpio->gpio_chip.ngpio = 4; tps6586x_gpio->gpio_chip.can_sleep = true; /* FIXME: add handling of GPIOs as dedicated inputs */ tps6586x_gpio->gpio_chip.direction_output = tps6586x_gpio_output; tps6586x_gpio->gpio_chip.set = tps6586x_gpio_set; tps6586x_gpio->gpio_chip.get = tps6586x_gpio_get; tps6586x_gpio->gpio_chip.to_irq = tps6586x_gpio_to_irq; #ifdef CONFIG_OF_GPIO tps6586x_gpio->gpio_chip.of_node = pdev->dev.parent->of_node; #endif if (pdata && pdata->gpio_base) tps6586x_gpio->gpio_chip.base = pdata->gpio_base; else tps6586x_gpio->gpio_chip.base = -1; ret = gpiochip_add_data(&tps6586x_gpio->gpio_chip, tps6586x_gpio); if (ret < 0) { dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); return ret; } platform_set_drvdata(pdev, tps6586x_gpio); return ret; }
static int meson_gpiolib_register(struct meson_pinctrl *pc) { int ret; pc->chip.label = pc->data->name; pc->chip.parent = pc->dev; pc->chip.request = meson_gpio_request; pc->chip.free = meson_gpio_free; pc->chip.direction_input = meson_gpio_direction_input; pc->chip.direction_output = meson_gpio_direction_output; pc->chip.get = meson_gpio_get; pc->chip.set = meson_gpio_set; pc->chip.base = pc->data->pin_base; pc->chip.ngpio = pc->data->num_pins; pc->chip.can_sleep = false; pc->chip.of_node = pc->of_node; pc->chip.of_gpio_n_cells = 2; ret = gpiochip_add_data(&pc->chip, pc); if (ret) { dev_err(pc->dev, "can't add gpio chip %s\n", pc->data->name); goto fail; } ret = gpiochip_add_pin_range(&pc->chip, dev_name(pc->dev), 0, pc->data->pin_base, pc->chip.ngpio); if (ret) { dev_err(pc->dev, "can't add pin range\n"); goto fail; } return 0; fail: gpiochip_remove(&pc->chip); return ret; }
static int lp873x_gpio_probe(struct platform_device *pdev) { struct lp873x_gpio *gpio; int ret; gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); if (!gpio) return -ENOMEM; platform_set_drvdata(pdev, gpio); gpio->lp873 = dev_get_drvdata(pdev->dev.parent); gpio->chip = template_chip; gpio->chip.parent = gpio->lp873->dev; ret = gpiochip_add_data(&gpio->chip, gpio); if (ret < 0) { dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); return ret; } return 0; }
static int scoop_probe(struct platform_device *pdev) { struct scoop_dev *devptr; struct scoop_config *inf; struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); int ret; if (!mem) return -EINVAL; devptr = kzalloc(sizeof(struct scoop_dev), GFP_KERNEL); if (!devptr) return -ENOMEM; spin_lock_init(&devptr->scoop_lock); inf = pdev->dev.platform_data; devptr->base = ioremap(mem->start, resource_size(mem)); if (!devptr->base) { ret = -ENOMEM; goto err_ioremap; } platform_set_drvdata(pdev, devptr); printk("Sharp Scoop Device found at 0x%08x -> 0x%8p\n",(unsigned int)mem->start, devptr->base); iowrite16(0x0140, devptr->base + SCOOP_MCR); reset_scoop(&pdev->dev); iowrite16(0x0000, devptr->base + SCOOP_CPR); iowrite16(inf->io_dir & 0xffff, devptr->base + SCOOP_GPCR); iowrite16(inf->io_out & 0xffff, devptr->base + SCOOP_GPWR); devptr->suspend_clr = inf->suspend_clr; devptr->suspend_set = inf->suspend_set; devptr->gpio.base = -1; if (inf->gpio_base != 0) { devptr->gpio.label = dev_name(&pdev->dev); devptr->gpio.base = inf->gpio_base; devptr->gpio.ngpio = 12; /* PA11 = 0, PA12 = 1, etc. up to PA22 = 11 */ devptr->gpio.set = scoop_gpio_set; devptr->gpio.get = scoop_gpio_get; devptr->gpio.direction_input = scoop_gpio_direction_input; devptr->gpio.direction_output = scoop_gpio_direction_output; ret = gpiochip_add_data(&devptr->gpio, devptr); if (ret) goto err_gpio; } return 0; err_gpio: platform_set_drvdata(pdev, NULL); err_ioremap: iounmap(devptr->base); kfree(devptr); return ret; }
static int pt_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct acpi_device *acpi_dev; acpi_handle handle = ACPI_HANDLE(dev); struct pt_gpio_chip *pt_gpio; struct resource *res_mem; int ret = 0; if (acpi_bus_get_device(handle, &acpi_dev)) { dev_err(dev, "PT GPIO device node not found\n"); return -ENODEV; } pt_gpio = devm_kzalloc(dev, sizeof(struct pt_gpio_chip), GFP_KERNEL); if (!pt_gpio) return -ENOMEM; res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res_mem) { dev_err(&pdev->dev, "Failed to get MMIO resource for PT GPIO.\n"); return -EINVAL; } pt_gpio->reg_base = devm_ioremap_resource(dev, res_mem); if (IS_ERR(pt_gpio->reg_base)) { dev_err(&pdev->dev, "Failed to map MMIO resource for PT GPIO.\n"); return PTR_ERR(pt_gpio->reg_base); } ret = bgpio_init(&pt_gpio->gc, dev, 4, pt_gpio->reg_base + PT_INPUTDATA_REG, pt_gpio->reg_base + PT_OUTPUTDATA_REG, NULL, pt_gpio->reg_base + PT_DIRECTION_REG, NULL, BGPIOF_READ_OUTPUT_REG_SET); if (ret) { dev_err(&pdev->dev, "bgpio_init failed\n"); return ret; } pt_gpio->gc.owner = THIS_MODULE; pt_gpio->gc.request = pt_gpio_request; pt_gpio->gc.free = pt_gpio_free; pt_gpio->gc.ngpio = PT_TOTAL_GPIO; #if defined(CONFIG_OF_GPIO) pt_gpio->gc.of_node = pdev->dev.of_node; #endif ret = gpiochip_add_data(&pt_gpio->gc, pt_gpio); if (ret) { dev_err(&pdev->dev, "Failed to register GPIO lib\n"); return ret; } platform_set_drvdata(pdev, pt_gpio); /* initialize register setting */ writel(0, pt_gpio->reg_base + PT_SYNC_REG); writel(0, pt_gpio->reg_base + PT_CLOCKRATE_REG); dev_dbg(&pdev->dev, "PT GPIO driver loaded\n"); return ret; }
static int davinci_gpio_probe(struct platform_device *pdev) { int i, base; unsigned ngpio, nbank; struct davinci_gpio_controller *chips; struct davinci_gpio_platform_data *pdata; struct davinci_gpio_regs __iomem *regs; struct device *dev = &pdev->dev; struct resource *res; pdata = davinci_gpio_get_pdata(pdev); if (!pdata) { dev_err(dev, "No platform data found\n"); return -EINVAL; } dev->platform_data = pdata; /* * The gpio banks conceptually expose a segmented bitmap, * and "ngpio" is one more than the largest zero-based * bit index that's valid. */ ngpio = pdata->ngpio; if (ngpio == 0) { dev_err(dev, "How many GPIOs?\n"); return -EINVAL; } if (WARN_ON(ARCH_NR_GPIOS < ngpio)) ngpio = ARCH_NR_GPIOS; nbank = DIV_ROUND_UP(ngpio, 32); chips = devm_kzalloc(dev, nbank * sizeof(struct davinci_gpio_controller), GFP_KERNEL); if (!chips) return -ENOMEM; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); gpio_base = devm_ioremap_resource(dev, res); if (IS_ERR(gpio_base)) return PTR_ERR(gpio_base); for (i = 0, base = 0; base < ngpio; i++, base += 32) { chips[i].chip.label = "DaVinci"; chips[i].chip.direction_input = davinci_direction_in; chips[i].chip.get = davinci_gpio_get; chips[i].chip.direction_output = davinci_direction_out; chips[i].chip.set = davinci_gpio_set; chips[i].chip.base = base; chips[i].chip.ngpio = ngpio - base; if (chips[i].chip.ngpio > 32) chips[i].chip.ngpio = 32; #ifdef CONFIG_OF_GPIO chips[i].chip.of_gpio_n_cells = 2; chips[i].chip.of_xlate = davinci_gpio_of_xlate; chips[i].chip.parent = dev; chips[i].chip.of_node = dev->of_node; #endif spin_lock_init(&chips[i].lock); regs = gpio2regs(base); if (!regs) return -ENXIO; chips[i].regs = regs; chips[i].set_data = ®s->set_data; chips[i].clr_data = ®s->clr_data; chips[i].in_data = ®s->in_data; gpiochip_add_data(&chips[i].chip, &chips[i]); } platform_set_drvdata(pdev, chips); davinci_gpio_irq_setup(pdev); return 0; }
static int stx104_probe(struct device *dev, unsigned int id) { struct iio_dev *indio_dev; struct stx104_iio *priv; struct stx104_gpio *stx104gpio; int err; indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); if (!indio_dev) return -ENOMEM; stx104gpio = devm_kzalloc(dev, sizeof(*stx104gpio), GFP_KERNEL); if (!stx104gpio) return -ENOMEM; if (!devm_request_region(dev, base[id], STX104_EXTENT, dev_name(dev))) { dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", base[id], base[id] + STX104_EXTENT); return -EBUSY; } indio_dev->info = &stx104_info; indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->channels = stx104_channels; indio_dev->num_channels = STX104_NUM_CHAN; indio_dev->name = dev_name(dev); priv = iio_priv(indio_dev); priv->base = base[id]; /* initialize DAC output to 0V */ outw(0, base[id] + 4); outw(0, base[id] + 6); err = devm_iio_device_register(dev, indio_dev); if (err) { dev_err(dev, "IIO device registering failed (%d)\n", err); return err; } stx104gpio->chip.label = dev_name(dev); stx104gpio->chip.parent = dev; stx104gpio->chip.owner = THIS_MODULE; stx104gpio->chip.base = -1; stx104gpio->chip.ngpio = 8; stx104gpio->chip.get_direction = stx104_gpio_get_direction; stx104gpio->chip.direction_input = stx104_gpio_direction_input; stx104gpio->chip.direction_output = stx104_gpio_direction_output; stx104gpio->chip.get = stx104_gpio_get; stx104gpio->chip.set = stx104_gpio_set; stx104gpio->base = base[id] + 3; stx104gpio->out_state = 0x0; spin_lock_init(&stx104gpio->lock); dev_set_drvdata(dev, stx104gpio); err = gpiochip_add_data(&stx104gpio->chip, stx104gpio); if (err) { dev_err(dev, "GPIO registering failed (%d)\n", err); return err; } return 0; }
static int oxnas_gpio_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct of_phandle_args pinspec; struct oxnas_gpio_bank *bank; unsigned int id, ngpios; int irq, ret; struct resource *res; if (of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &pinspec)) { dev_err(&pdev->dev, "gpio-ranges property not found\n"); return -EINVAL; } id = pinspec.args[1] / PINS_PER_BANK; ngpios = pinspec.args[2]; if (id >= ARRAY_SIZE(oxnas_gpio_banks)) { dev_err(&pdev->dev, "invalid gpio-ranges base arg\n"); return -EINVAL; } if (ngpios > PINS_PER_BANK) { dev_err(&pdev->dev, "invalid gpio-ranges count arg\n"); return -EINVAL; } bank = &oxnas_gpio_banks[id]; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); bank->reg_base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(bank->reg_base)) return PTR_ERR(bank->reg_base); irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "irq get failed\n"); return irq; } bank->id = id; bank->gpio_chip.parent = &pdev->dev; bank->gpio_chip.of_node = np; bank->gpio_chip.ngpio = ngpios; ret = gpiochip_add_data(&bank->gpio_chip, bank); if (ret < 0) { dev_err(&pdev->dev, "Failed to add GPIO chip %u: %d\n", id, ret); return ret; } ret = gpiochip_irqchip_add(&bank->gpio_chip, &bank->irq_chip, 0, handle_level_irq, IRQ_TYPE_NONE); if (ret < 0) { dev_err(&pdev->dev, "Failed to add IRQ chip %u: %d\n", id, ret); gpiochip_remove(&bank->gpio_chip); return ret; } gpiochip_set_chained_irqchip(&bank->gpio_chip, &bank->irq_chip, irq, oxnas_gpio_irq_handler); return 0; }
static int intel_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id) { void __iomem *base; struct intel_mid_gpio *priv; u32 gpio_base; u32 irq_base; int retval; struct intel_mid_gpio_ddata *ddata = (struct intel_mid_gpio_ddata *)id->driver_data; retval = pcim_enable_device(pdev); if (retval) return retval; retval = pcim_iomap_regions(pdev, 1 << 0 | 1 << 1, pci_name(pdev)); if (retval) { dev_err(&pdev->dev, "I/O memory mapping error\n"); return retval; } base = pcim_iomap_table(pdev)[1]; irq_base = readl(base); gpio_base = readl(sizeof(u32) + base); /* release the IO mapping, since we already get the info from bar1 */ pcim_iounmap_regions(pdev, 1 << 1); priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) { dev_err(&pdev->dev, "can't allocate chip data\n"); return -ENOMEM; } priv->reg_base = pcim_iomap_table(pdev)[0]; priv->chip.label = dev_name(&pdev->dev); priv->chip.parent = &pdev->dev; priv->chip.request = intel_gpio_request; priv->chip.direction_input = intel_gpio_direction_input; priv->chip.direction_output = intel_gpio_direction_output; priv->chip.get = intel_gpio_get; priv->chip.set = intel_gpio_set; priv->chip.base = gpio_base; priv->chip.ngpio = ddata->ngpio; priv->chip.can_sleep = false; priv->pdev = pdev; spin_lock_init(&priv->lock); pci_set_drvdata(pdev, priv); retval = gpiochip_add_data(&priv->chip, priv); if (retval) { dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); return retval; } retval = gpiochip_irqchip_add(&priv->chip, &intel_mid_irqchip, irq_base, handle_simple_irq, IRQ_TYPE_NONE); if (retval) { dev_err(&pdev->dev, "could not connect irqchip to gpiochip\n"); return retval; } intel_mid_irq_init_hw(priv); gpiochip_set_chained_irqchip(&priv->chip, &intel_mid_irqchip, pdev->irq, intel_mid_irq_handler); pm_runtime_put_noidle(&pdev->dev); pm_runtime_allow(&pdev->dev); return 0; }
static int platform_pmic_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; int irq = platform_get_irq(pdev, 0); struct intel_pmic_gpio_platform_data *pdata = dev->platform_data; struct pmic_gpio *pg; int retval; int i; if (irq < 0) { dev_dbg(dev, "no IRQ line\n"); return -EINVAL; } if (!pdata || !pdata->gpio_base || !pdata->irq_base) { dev_dbg(dev, "incorrect or missing platform data\n"); return -EINVAL; } pg = kzalloc(sizeof(*pg), GFP_KERNEL); if (!pg) return -ENOMEM; dev_set_drvdata(dev, pg); pg->irq = irq; /* setting up SRAM mapping for GPIOINT register */ pg->gpiointr = ioremap_nocache(pdata->gpiointr, 8); if (!pg->gpiointr) { pr_err("Can not map GPIOINT\n"); retval = -EINVAL; goto err2; } pg->irq_base = pdata->irq_base; pg->chip.label = "intel_pmic"; pg->chip.direction_input = pmic_gpio_direction_input; pg->chip.direction_output = pmic_gpio_direction_output; pg->chip.get = pmic_gpio_get; pg->chip.set = pmic_gpio_set; pg->chip.to_irq = pmic_gpio_to_irq; pg->chip.base = pdata->gpio_base; pg->chip.ngpio = NUM_GPIO; pg->chip.can_sleep = 1; pg->chip.parent = dev; mutex_init(&pg->buslock); pg->chip.parent = dev; retval = gpiochip_add_data(&pg->chip, pg); if (retval) { pr_err("Can not add pmic gpio chip\n"); goto err; } retval = request_irq(pg->irq, pmic_irq_handler, 0, "pmic", pg); if (retval) { pr_warn("Interrupt request failed\n"); goto fail_request_irq; } for (i = 0; i < 8; i++) { irq_set_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, handle_simple_irq, "demux"); irq_set_chip_data(i + pg->irq_base, pg); } return 0; fail_request_irq: gpiochip_remove(&pg->chip); err: iounmap(pg->gpiointr); err2: kfree(pg); return retval; }
static int mc33880_probe(struct spi_device *spi) { struct mc33880 *mc; struct mc33880_platform_data *pdata; int ret; pdata = dev_get_platdata(&spi->dev); if (!pdata || !pdata->base) { dev_dbg(&spi->dev, "incorrect or missing platform data\n"); return -EINVAL; } /* * bits_per_word cannot be configured in platform data */ spi->bits_per_word = 8; ret = spi_setup(spi); if (ret < 0) return ret; mc = devm_kzalloc(&spi->dev, sizeof(struct mc33880), GFP_KERNEL); if (!mc) return -ENOMEM; mutex_init(&mc->lock); spi_set_drvdata(spi, mc); mc->spi = spi; mc->chip.label = DRIVER_NAME, mc->chip.set = mc33880_set; mc->chip.base = pdata->base; mc->chip.ngpio = PIN_NUMBER; mc->chip.can_sleep = true; mc->chip.parent = &spi->dev; mc->chip.owner = THIS_MODULE; mc->port_config = 0x00; /* write twice, because during initialisation the first setting * is just for testing SPI communication, and the second is the * "real" configuration */ ret = mc33880_write_config(mc); mc->port_config = 0x00; if (!ret) ret = mc33880_write_config(mc); if (ret) { dev_err(&spi->dev, "Failed writing to " DRIVER_NAME ": %d\n", ret); goto exit_destroy; } ret = gpiochip_add_data(&mc->chip, mc); if (ret) goto exit_destroy; return ret; exit_destroy: mutex_destroy(&mc->lock); return ret; }
static int dln2_gpio_probe(struct platform_device *pdev) { struct dln2_gpio *dln2; struct device *dev = &pdev->dev; int pins; int ret; pins = dln2_gpio_get_pin_count(pdev); if (pins < 0) { dev_err(dev, "failed to get pin count: %d\n", pins); return pins; } if (pins > DLN2_GPIO_MAX_PINS) { pins = DLN2_GPIO_MAX_PINS; dev_warn(dev, "clamping pins to %d\n", DLN2_GPIO_MAX_PINS); } dln2 = devm_kzalloc(&pdev->dev, sizeof(*dln2), GFP_KERNEL); if (!dln2) return -ENOMEM; mutex_init(&dln2->irq_lock); dln2->pdev = pdev; dln2->gpio.label = "dln2"; dln2->gpio.parent = dev; dln2->gpio.owner = THIS_MODULE; dln2->gpio.base = -1; dln2->gpio.ngpio = pins; dln2->gpio.can_sleep = true; dln2->gpio.irq_not_threaded = true; dln2->gpio.set = dln2_gpio_set; dln2->gpio.get = dln2_gpio_get; dln2->gpio.request = dln2_gpio_request; dln2->gpio.free = dln2_gpio_free; dln2->gpio.get_direction = dln2_gpio_get_direction; dln2->gpio.direction_input = dln2_gpio_direction_input; dln2->gpio.direction_output = dln2_gpio_direction_output; dln2->gpio.set_debounce = dln2_gpio_set_debounce; platform_set_drvdata(pdev, dln2); ret = gpiochip_add_data(&dln2->gpio, dln2); if (ret < 0) { dev_err(dev, "failed to add gpio chip: %d\n", ret); goto out; } ret = gpiochip_irqchip_add(&dln2->gpio, &dln2_gpio_irqchip, 0, handle_simple_irq, IRQ_TYPE_NONE); if (ret < 0) { dev_err(dev, "failed to add irq chip: %d\n", ret); goto out_gpiochip_remove; } ret = dln2_register_event_cb(pdev, DLN2_GPIO_CONDITION_MET_EV, dln2_gpio_event); if (ret) { dev_err(dev, "failed to register event cb: %d\n", ret); goto out_gpiochip_remove; } return 0; out_gpiochip_remove: gpiochip_remove(&dln2->gpio); out: return ret; }
static int __init bf538_extgpio_setup(void) { return gpiochip_add_data(&bf538_portc_chip, NULL) | gpiochip_add_data(&bf538_portd_chip, NULL) | gpiochip_add_data(&bf538_porte_chip, NULL); }
static int pmic_mpp_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct pinctrl_pin_desc *pindesc; struct pinctrl_desc *pctrldesc; struct pmic_mpp_pad *pad, *pads; struct pmic_mpp_state *state; int ret, npins, i; u32 reg; ret = of_property_read_u32(dev->of_node, "reg", ®); if (ret < 0) { dev_err(dev, "missing base address"); return ret; } npins = platform_irq_count(pdev); if (!npins) return -EINVAL; if (npins < 0) return npins; BUG_ON(npins > ARRAY_SIZE(pmic_mpp_groups)); state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); if (!state) return -ENOMEM; platform_set_drvdata(pdev, state); state->dev = &pdev->dev; state->map = dev_get_regmap(dev->parent, NULL); pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL); if (!pindesc) return -ENOMEM; pads = devm_kcalloc(dev, npins, sizeof(*pads), GFP_KERNEL); if (!pads) return -ENOMEM; pctrldesc = devm_kzalloc(dev, sizeof(*pctrldesc), GFP_KERNEL); if (!pctrldesc) return -ENOMEM; pctrldesc->pctlops = &pmic_mpp_pinctrl_ops; pctrldesc->pmxops = &pmic_mpp_pinmux_ops; pctrldesc->confops = &pmic_mpp_pinconf_ops; pctrldesc->owner = THIS_MODULE; pctrldesc->name = dev_name(dev); pctrldesc->pins = pindesc; pctrldesc->npins = npins; pctrldesc->num_custom_params = ARRAY_SIZE(pmic_mpp_bindings); pctrldesc->custom_params = pmic_mpp_bindings; #ifdef CONFIG_DEBUG_FS pctrldesc->custom_conf_items = pmic_conf_items; #endif for (i = 0; i < npins; i++, pindesc++) { pad = &pads[i]; pindesc->drv_data = pad; pindesc->number = i; pindesc->name = pmic_mpp_groups[i]; pad->irq = platform_get_irq(pdev, i); if (pad->irq < 0) return pad->irq; pad->base = reg + i * PMIC_MPP_ADDRESS_RANGE; ret = pmic_mpp_populate(state, pad); if (ret < 0) return ret; } state->chip = pmic_mpp_gpio_template; state->chip.parent = dev; state->chip.base = -1; state->chip.ngpio = npins; state->chip.label = dev_name(dev); state->chip.of_gpio_n_cells = 2; state->chip.can_sleep = false; state->ctrl = pinctrl_register(pctrldesc, dev, state); if (IS_ERR(state->ctrl)) return PTR_ERR(state->ctrl); ret = gpiochip_add_data(&state->chip, state); if (ret) { dev_err(state->dev, "can't add gpio chip\n"); goto err_chip; } ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0, npins); if (ret) { dev_err(dev, "failed to add pin range\n"); goto err_range; } return 0; err_range: gpiochip_remove(&state->chip); err_chip: pinctrl_unregister(state->ctrl); return ret; }
static int __init usrgpir_gpio_setup(void) { return gpiochip_add_data(&usrgpir_gpio_chip, NULL); }
static int bgpio_pdev_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *r; void __iomem *dat; void __iomem *set; void __iomem *clr; void __iomem *dirout; void __iomem *dirin; unsigned long sz; unsigned long flags = pdev->id_entry->driver_data; int err; struct gpio_chip *gc; struct bgpio_pdata *pdata = dev_get_platdata(dev); r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); if (!r) return -EINVAL; sz = resource_size(r); dat = bgpio_map(pdev, "dat", sz); if (IS_ERR(dat)) return PTR_ERR(dat); set = bgpio_map(pdev, "set", sz); if (IS_ERR(set)) return PTR_ERR(set); clr = bgpio_map(pdev, "clr", sz); if (IS_ERR(clr)) return PTR_ERR(clr); dirout = bgpio_map(pdev, "dirout", sz); if (IS_ERR(dirout)) return PTR_ERR(dirout); dirin = bgpio_map(pdev, "dirin", sz); if (IS_ERR(dirin)) return PTR_ERR(dirin); gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); if (!gc) return -ENOMEM; err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags); if (err) return err; if (pdata) { if (pdata->label) gc->label = pdata->label; gc->base = pdata->base; if (pdata->ngpio > 0) gc->ngpio = pdata->ngpio; } platform_set_drvdata(pdev, gc); return gpiochip_add_data(gc, NULL); }