void lib_eeprom255_bytes_write(uint8_t adr, uint8_t *src, uint8_t n)
{
uint8_t xdata i;
uint16_t xdata flash_dst_pn, xdata_dst_adr, flash_old_pn, xdata_old_adr;
if(*((uint8_t xdata *)(PAGE_0_XDATA + BK_BYTE)) == 0xff)
{
flash_dst_pn = PAGE_0_FLASH_PN;
xdata_dst_adr = PAGE_0_XDATA;
flash_old_pn = PAGE_1_FLASH_PN;
xdata_old_adr = PAGE_1_XDATA;
}
else
{
flash_dst_pn = PAGE_1_FLASH_PN;
xdata_dst_adr = PAGE_1_XDATA;
flash_old_pn = PAGE_0_FLASH_PN;
xdata_old_adr = PAGE_0_XDATA;
}
for(i = 0; i < n; i++)
{
if((*((uint8_t xdata *)(xdata_old_adr + adr + i))) != src[i])
{
break;
}
}
if(i < n)
{
hal_flash_page_erase(flash_dst_pn);
for(i = 0; i < 255; i++)
{
if(i >= adr && i < (adr + n))
{
hal_flash_byte_write(xdata_dst_adr + i, src[i - adr]);
}
else
{
hal_flash_byte_write(xdata_dst_adr + i, *((uint8_t xdata *)(xdata_old_adr + i)));
}
}
hal_flash_byte_write(xdata_dst_adr + BK_BYTE, 0);
hal_flash_page_erase(flash_old_pn);
}
}
void lib_eeprom255_byte_write(uint8_t adr, uint8_t dat)
{
uint8_t xdata i;
uint16_t xdata flash_dst_pn, xdata_dst_adr, flash_old_pn, xdata_old_adr;
if(*((uint8_t xdata *)(PAGE_0_XDATA + BK_BYTE)) == 0xff)
{
flash_dst_pn = PAGE_0_FLASH_PN;
xdata_dst_adr = PAGE_0_XDATA;
flash_old_pn = PAGE_1_FLASH_PN;
xdata_old_adr = PAGE_1_XDATA;
}
else
{
flash_dst_pn = PAGE_1_FLASH_PN;
xdata_dst_adr = PAGE_1_XDATA;
flash_old_pn = PAGE_0_FLASH_PN;
xdata_old_adr = PAGE_0_XDATA;
}
if((*((uint8_t xdata *)(xdata_old_adr + adr))) != dat)
{
hal_flash_page_erase(flash_dst_pn);
PCON &= ~(1 << 4);
for(i = 0; i < 255; i++)
{
if(i == adr)
{
hal_flash_byte_write(xdata_dst_adr + adr, dat);
}
else
{
hal_flash_byte_write(xdata_dst_adr + i, *((uint8_t xdata *)(xdata_old_adr + i)));
}
}
hal_flash_byte_write(xdata_dst_adr + BK_BYTE, 0);
hal_flash_page_erase(flash_old_pn);
}
}
void WriteflashCode() //дÃÜÂë
{
ReadflashInterval();
ReadflashBoatnum();
ReadStartTask();
hal_flash_page_erase(34);
PCON &= ~0x10;//PMW
hal_flash_bytes_write(0xFC30,&codeflag,1);
hal_flash_bytes_write(0xFC00,&timinteval_1,1);
hal_flash_bytes_write(0xFC01,&timinteval_2,1);
hal_flash_bytes_write(0xFC02,boatnum,16);
// hal_flash_bytes_write(0xFC31,&taskstart,1);
}
void WriteStartTask() //д¿ª»ú״̬
{
ReadflashBoatnum();
ReadflashInterval();
ReadflashCode();
hal_flash_page_erase(34);
PCON &= ~0x10;//PMW
// hal_flash_bytes_write(0xFC31,&taskstart,1);
delay(1000);
// hal_flash_bytes_read(0xFC31,&taskstart,1);
hal_flash_bytes_write(0xFC00,&timinteval_1,1);
hal_flash_bytes_write(0xFC01,&timinteval_2,1);
hal_flash_bytes_write(0xFC02,boatnum,16);
hal_flash_bytes_write(0xFC30,&codeflag,1);
}
void WriteflashBoatnum(void) //дÈë´¬Ãû
{
ReadflashInterval();
ReadflashCode();
ReadStartTask();
hal_flash_page_erase(34);
PCON &= ~0x10;//PMW
hal_flash_bytes_write(0xFC02,&(com_buf[2]),16);
delay(1000);
hal_flash_bytes_read (0xFC02,boatnum,16);
hal_flash_bytes_write(0xFC00,&timinteval_1,1); //ÔÙдÈë·¢Éä¼ä¸ô
hal_flash_bytes_write(0xFC01,&timinteval_2,1);
hal_flash_bytes_write(0xFC30,&codeflag,1);
// hal_flash_bytes_write(0xFC31,&taskstart,1);
}
void WriteflashInterval(void) //дÈë¼ä¸ô
{
ReadflashBoatnum(); //ÏȶÁ³ö´¬Ãû£¬ÔÙ²Áдҳ
ReadflashCode();
ReadStartTask();
hal_flash_page_erase(34);
PCON &= ~0x10;//PMW
timinteval_1 = com_buf[4]; //putch(timinteval_1);
timinteval_2 = com_buf[5]; //putch(timinteval_2);
timinteval = timinteval_1;
timinteval = (timinteval << 8);
timinteval = timinteval + timinteval_2;
hal_flash_bytes_write(0xFC00,&timinteval_1,1);
hal_flash_bytes_write(0xFC01,&timinteval_2,1);
hal_flash_bytes_write(0xFC02,boatnum,16); //ÔÙдÈë´¬Ãû
hal_flash_bytes_write(0xFC30,&codeflag,1);
// hal_flash_bytes_write(0xFC31,&taskstart,1);
}
// Verifies that update-start command is valid.
// Will enter RECEIVING_FIRMWARE state if everything checks out.
void startFirmwareUpdate(state_t *state, uint16_t *bytes_total,
uint16_t *bytes_received, uint8_t *firmware_number)
{
uint8_t i, checksum = 0, reset_vector[3];
uint16_t bytes = 0;
// Calculate checksum
for (i = 0; i < UPDATE_START_LENGTH; i++) {
checksum += MSG_PAYLOAD(i);
}
// Checksum fail
if (checksum != 0) {
send_buf[1] = ERROR_CHECKSUM_FAIL;
send(CMD_NACK);
return;
}
// Get firmware size
bytes = MSG_ST_BYTES;
// Check that firmware is within legal size range.
if (bytes > FLASH_FW_MAX_SIZE) {
// Send error report to host.
send_buf[1] = ERROR_ILLEGAL_SIZE;
send(CMD_NACK);
return;
}
*bytes_total = bytes;
// Get firmware's reset vector.
temp_data[0] = MSG_ST_RESET_OPCODE;
temp_data[1] = MSG_ST_RESET_ADDR_H;
temp_data[2] = MSG_ST_RESET_ADDR_L;
// Write reset vector to non-volatile flash
hal_flash_page_erase(FW_NV_DATA_PAGE);
hal_flash_bytes_write(FW_RESET_VECTOR, temp_data, 3);
// Get firmware serial number. Will be written to NV when update complete.
*firmware_number = MSG_ST_NUMBER;
*bytes_received = 0;
// Read out old reset vector.
PCON |= PMW;
hal_flash_bytes_read(0x0000, reset_vector, 3);
PCON &= ~PMW;
// Erase first page, containing reset vector.
hal_flash_page_erase(0);
// Write back the old reset vector.
PCON |= PMW;
hal_flash_bytes_write(0x0000, reset_vector, 3);
PCON &= ~PMW;
// Erase the reset of pages available to firmware.
for (i = 1; i < FLASH_FW_PAGES; i++) {
hal_flash_page_erase(i);
}
send(CMD_ACK);
if (send_success) {
*state = RECEIVING_FIRMWARE;
} else {
*state = LISTENING;
}
return;
}
uint8_t agent_action( uint8_t src, uint8_t dst, uint8_t sta, uint8_t seq,
uint8_t *dat, uint8_t dat_len,
uint8_t *out_dat, uint8_t* out_dat_len)
{
if(dst != my_addr && (dst != UART_ADDR || src != UART_ADDR))
return RES_FWD_DST;
if(sta & STA_ACK_FLAG)
if(sta & STA_UART_FLAG)
return RES_FWD_UART;
else
return RES_NOP;
if(dat[0] == CMD_FWD)
return RES_FWD_UART;
out_dat[0] = dat[0];
switch(dat[0])
{
case CMD_NOP:
*out_dat_len = dat_len;
break;
case CMD_SET_PORT:
PORT_0 |= dat[1] & dat[2] & PORT_0_MASK;
PORT_0 &= dat[1] | ~dat[2] | ~PORT_0_MASK;
PORT_1 |= dat[3] & dat[4] & PORT_1_MASK;
PORT_1 &= dat[3] | ~dat[4] | ~PORT_1_MASK;
case CMD_GET_PORT:
out_dat[1] = PORT_0 & dat[2];
out_dat[2] = PORT_0_MASK & dat[2];
out_dat[3] = PORT_1 & dat[4];
out_dat[4] = PORT_1_MASK & dat[4];
*out_dat_len = 5;
break;
case CMD_SET_DIR:
PORT_0_DIR |= dat[1] & dat[2] & PORT_0_MASK;
PORT_0_DIR &= dat[1] | ~dat[2] | ~PORT_0_MASK;
PORT_1_DIR |= dat[3] & dat[4] & PORT_1_MASK;
PORT_1_DIR &= dat[3] | ~dat[4] | ~PORT_1_MASK;
case CMD_GET_DIR:
out_dat[1] = PORT_0_DIR & dat[2];
out_dat[2] = PORT_0_MASK & dat[2];
out_dat[3] = PORT_1_DIR & dat[4];
out_dat[4] = PORT_1_MASK & dat[4];
*out_dat_len = 5;
break;
case CMD_SET_ADDR:
PCON &= ~PMW;
hal_flash_page_erase(NV_PAGE_ADDR);
hal_flash_byte_write(NV_ADDR_ADDR, dat[1]);
my_addr = hal_flash_byte_read(NV_ADDR_ADDR);
agent_set_my_addr();
case CMD_GET_ADDR:
out_dat[1] = my_addr;
*out_dat_len = 2;
break;
default:
*out_dat_len = 1;
break;
}
return RES_REP_SRC;
}
