int misc_init_r(void)
{
if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
return 0;
}
int misc_init_r(void)
{
if (hwconfig("gpio"))
config_board_mux(MUX_TYPE_GPIO);
return 0;
}
int misc_init_r(void)
{
int conflict_flag;
/* some signals can not enable simultaneous*/
conflict_flag = 0;
if (hwconfig("sdhc"))
conflict_flag++;
if (hwconfig("iic2"))
conflict_flag++;
if (conflict_flag > 1) {
printf("WARNING: pin conflict !\n");
return 0;
}
conflict_flag = 0;
if (hwconfig("rgmii"))
conflict_flag++;
if (hwconfig("can"))
conflict_flag++;
if (hwconfig("sai"))
conflict_flag++;
if (conflict_flag > 1) {
printf("WARNING: pin conflict !\n");
return 0;
}
if (hwconfig("can"))
config_board_mux(MUX_TYPE_CAN);
else if (hwconfig("rgmii"))
config_board_mux(MUX_TYPE_RGMII);
else if (hwconfig("sai"))
config_board_mux(MUX_TYPE_SAI);
if (hwconfig("iic2"))
config_board_mux(MUX_TYPE_IIC2);
else if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
#ifdef CONFIG_FSL_DEVICE_DISABLE
device_disable(devdis_tbl, ARRAY_SIZE(devdis_tbl));
#endif
#ifdef CONFIG_FSL_CAAM
return sec_init();
#endif
return 0;
}
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
const char *modes[] = { "host", "peripheral", "otg" };
const char *phys[] = { "ulpi", "utmi" };
const char *dr_mode_type = NULL;
const char *dr_phy_type = NULL;
int usb_mode_off = -1;
int usb_phy_off = -1;
char str[5];
int i, j;
for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
int mode_idx = -1, phy_idx = -1;
snprintf(str, 5, "%s%d", "usb", i);
if (hwconfig(str)) {
for (j = 0; j < ARRAY_SIZE(modes); j++) {
if (hwconfig_subarg_cmp(str, "dr_mode",
modes[j])) {
mode_idx = j;
break;
}
}
for (j = 0; j < ARRAY_SIZE(phys); j++) {
if (hwconfig_subarg_cmp(str, "phy_type",
phys[j])) {
phy_idx = j;
break;
}
}
if (mode_idx < 0 || phy_idx < 0) {
puts("ERROR: wrong usb mode/phy defined!!\n");
return;
}
dr_mode_type = modes[mode_idx];
dr_phy_type = phys[phy_idx];
if (mode_idx < 0 && phy_idx < 0) {
printf("WARNING: invalid phy or mode\n");
return;
}
}
usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
dr_mode_type, NULL, usb_mode_off);
if (usb_mode_off < 0)
return;
usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
NULL, dr_phy_type, usb_phy_off);
if (usb_phy_off < 0)
return;
}
}
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
const char *modes[] = { "host", "peripheral", "otg" };
const char *phys[] = { "ulpi", "utmi" };
const char *mode = NULL;
const char *phy_type = NULL;
char usb1_defined = 0;
int usb_mode_off = -1;
int usb_phy_off = -1;
char str[5];
int i, j;
for (i = 1; i <= FSL_MAX_NUM_USB_CTRLS; i++) {
int mode_idx = -1, phy_idx = -1;
snprintf(str, 5, "%s%d", "usb", i);
if (hwconfig(str)) {
for (j = 0; j < ARRAY_SIZE(modes); j++) {
if (hwconfig_subarg_cmp(str, "dr_mode",
modes[j])) {
mode_idx = j;
break;
}
}
for (j = 0; j < ARRAY_SIZE(phys); j++) {
if (hwconfig_subarg_cmp(str, "phy_type",
phys[j])) {
phy_idx = j;
break;
}
}
if (mode_idx >= 0) {
usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
modes[mode_idx], NULL, usb_mode_off);
if (usb_mode_off < 0)
return;
}
if (phy_idx >= 0) {
usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
NULL, phys[phy_idx], usb_phy_off);
if (usb_phy_off < 0)
return;
}
if (!strcmp(str, "usb1"))
usb1_defined = 1;
if (mode_idx < 0 && phy_idx < 0)
printf("WARNING: invalid phy or mode\n");
}
}
if (!usb1_defined) {
int usb_off = -1;
mode = getenv("usb_dr_mode");
phy_type = getenv("usb_phy_type");
if (!mode && !phy_type)
return;
fdt_fixup_usb_mode_phy_type(blob, mode, phy_type, usb_off);
}
}
static void fdt_board_fixup_qe_uart(void *blob, bd_t *bd)
{
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
const char *devtype = "serial";
const char *compat = "ucc_uart";
const char *clk = "brg9";
u32 portnum = 0;
int off = -1;
if (!hwconfig("qe_uart"))
return;
if (hwconfig("esdhc") && esdhc_disables_uart0()) {
printf("QE UART: won't enable with esdhc.\n");
return;
}
fdt_board_disable_serial(blob, bd, "serial1");
while (1) {
const u32 *idx;
int len;
off = fdt_node_offset_by_compatible(blob, off, "ucc_geth");
if (off < 0) {
printf("WARNING: unable to fixup device tree for "
"QE UART\n");
return;
}
idx = fdt_getprop(blob, off, "cell-index", &len);
if (!idx || len != sizeof(*idx) || *idx != fdt32_to_cpu(2))
continue;
break;
}
fdt_setprop(blob, off, "device_type", devtype, strlen(devtype) + 1);
fdt_setprop(blob, off, "compatible", compat, strlen(compat) + 1);
fdt_setprop(blob, off, "tx-clock-name", clk, strlen(clk) + 1);
fdt_setprop(blob, off, "rx-clock-name", clk, strlen(clk) + 1);
fdt_setprop(blob, off, "port-number", &portnum, sizeof(portnum));
setbits_8(&bcsr[15], BCSR15_QEUART_EN);
}
int main()
{
const char *ret;
size_t len;
setenv("hwconfig", "key1:subkey1=value1,subkey2=value2;key2:value3;;;;"
"key3;:,:=;key4", 1);
ret = hwconfig_arg("key1", &len);
printf("%zd %.*s\n", len, (int)len, ret);
assert(len == 29);
assert(hwconfig_arg_cmp("key1", "subkey1=value1,subkey2=value2"));
assert(!strncmp(ret, "subkey1=value1,subkey2=value2", len));
ret = hwconfig_subarg("key1", "subkey1", &len);
printf("%zd %.*s\n", len, (int)len, ret);
assert(len == 6);
assert(hwconfig_subarg_cmp("key1", "subkey1", "value1"));
assert(!strncmp(ret, "value1", len));
ret = hwconfig_subarg("key1", "subkey2", &len);
printf("%zd %.*s\n", len, (int)len, ret);
assert(len == 6);
assert(hwconfig_subarg_cmp("key1", "subkey2", "value2"));
assert(!strncmp(ret, "value2", len));
ret = hwconfig_arg("key2", &len);
printf("%zd %.*s\n", len, (int)len, ret);
assert(len == 6);
assert(hwconfig_arg_cmp("key2", "value3"));
assert(!strncmp(ret, "value3", len));
assert(hwconfig("key3"));
assert(hwconfig_arg("key4", &len) == NULL);
assert(hwconfig_arg("bogus", &len) == NULL);
unsetenv("hwconfig");
assert(hwconfig(NULL) == 0);
assert(hwconfig("") == 0);
assert(hwconfig("key3") == 0);
return 0;
}
int misc_init_r(void)
{
if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
if (adjust_vdd(0))
printf("Warning: Adjusting core voltage failed.\n");
return 0;
}
static void fdt_board_fixup_qe_pins(void *blob)
{
unsigned int oldbus;
u8 val8;
int node;
fsl_lbc_t *lbc = LBC_BASE_ADDR;
if (hwconfig("qe")) {
/* For QE and eLBC pins multiplexing,
* there is a PCA9555 device on P1025RDB.
* It control the multiplex pins' functions,
* and setting the PCA9555 can switch the
* function between QE and eLBC.
*/
oldbus = i2c_get_bus_num();
i2c_set_bus_num(0);
if (hwconfig("tdm"))
val8 = PCA_IOPORT_QE_TDM_ENABLE;
else
val8 = PCA_IOPORT_QE_PIN_ENABLE;
i2c_write(PCA_IOPORT_I2C_ADDR, PCA_IOPORT_CFG_CMD,
1, &val8, 1);
i2c_write(PCA_IOPORT_I2C_ADDR, PCA_IOPORT_OUTPUT_CMD,
1, &val8, 1);
i2c_set_bus_num(oldbus);
/* if run QE TDM, Set ABSWP to implement
* conversion of addresses in the eLBC.
*/
if (hwconfig("tdm")) {
set_lbc_or(2, CONFIG_PMC_OR_PRELIM);
set_lbc_br(2, CONFIG_PMC_BR_PRELIM);
setbits_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
}
} else {
node = fdt_path_offset(blob, "/qe");
if (node >= 0)
fdt_del_node(blob, node);
}
return;
}
int board_mmc_init(bd_t *bd)
{
struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
if (!hwconfig("esdhc"))
return 0;
clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
clrsetbits_be32(&im->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD);
return fsl_esdhc_mmc_init(bd);
}
int config_board_mux(void)
{
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
int conflict_flag;
conflict_flag = 0;
if (hwconfig("i2c3")) {
conflict_flag++;
cpld_data->soft_mux_on |= SOFT_MUX_ON_I2C3_IFC;
cpld_data->i2c3_ifc_mux = PIN_I2C3_IFC_MUX_I2C3;
}
if (hwconfig("ifc")) {
conflict_flag++;
/* some signals can not enable simultaneous*/
if (conflict_flag > 1)
goto conflict;
cpld_data->soft_mux_on |= SOFT_MUX_ON_I2C3_IFC;
cpld_data->i2c3_ifc_mux = PIN_I2C3_IFC_MUX_IFC;
}
conflict_flag = 0;
if (hwconfig("usb2")) {
conflict_flag++;
cpld_data->soft_mux_on |= SOFT_MUX_ON_CAN3_USB2;
cpld_data->can3_usb2_mux = PIN_CAN3_USB2_MUX_USB2;
}
if (hwconfig("can3")) {
conflict_flag++;
/* some signals can not enable simultaneous*/
if (conflict_flag > 1)
goto conflict;
cpld_data->soft_mux_on |= SOFT_MUX_ON_CAN3_USB2;
cpld_data->can3_usb2_mux = PIN_CAN3_USB2_MUX_CAN3;
}
conflict_flag = 0;
if (hwconfig("lcd")) {
conflict_flag++;
cpld_data->soft_mux_on |= SOFT_MUX_ON_QE_LCD;
cpld_data->qe_lcd_mux = PIN_QE_LCD_MUX_LCD;
}
if (hwconfig("qe")) {
conflict_flag++;
/* some signals can not enable simultaneous*/
if (conflict_flag > 1)
goto conflict;
cpld_data->soft_mux_on |= SOFT_MUX_ON_QE_LCD;
cpld_data->qe_lcd_mux = PIN_QE_LCD_MUX_QE;
}
return 0;
conflict:
printf("WARNING: pin conflict! MUX setting may failed!\n");
return 0;
}
int esdhc_status_fixup(void *blob, const char *compat)
{
char esdhc1_path[] = "/soc/esdhc@1580000";
bool sdhc2_en = false;
u8 mux_sdhc2;
u8 io = 0;
i2c_set_bus_num(0);
/* IO1[7:3] is the field of board revision info. */
if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1) < 0) {
printf("Error reading i2c boot information!\n");
return 0;
}
/* hwconfig method is used for RevD and later versions. */
if ((io & SW_REV_MASK) <= SW_REV_D) {
#ifdef CONFIG_HWCONFIG
if (hwconfig("esdhc1"))
sdhc2_en = true;
#endif
} else {
/*
* The I2C IO-expander for mux select is used to control
* the muxing of various onboard interfaces.
*
* IO0[3:2] indicates SDHC2 interface demultiplexer
* select lines.
* 00 - SDIO wifi
* 01 - GPIO (to Arduino)
* 10 - eMMC Memory
* 11 - SPI
*/
if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) {
printf("Error reading i2c boot information!\n");
return 0;
}
mux_sdhc2 = (io & 0x0c) >> 2;
/* Enable SDHC2 only when use SDIO wifi and eMMC */
if (mux_sdhc2 == 2 || mux_sdhc2 == 0)
sdhc2_en = true;
}
if (sdhc2_en)
do_fixup_by_path(blob, esdhc1_path, "status", "okay",
sizeof("okay"), 1);
else
do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
sizeof("disabled"), 1);
return 0;
}
int board_mmc_init(bd_t *bd)
{
struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
if (!hwconfig("esdhc"))
return 0;
/* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */
bcsr[0xc] |= 0x4c;
/* Set proper bits in SICR to allow SD signals through */
clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
clrsetbits_be32(&im->sysconf.sicrh, SICRH_GPIO2_E | SICRH_SPI,
SICRH_GPIO2_E_SD | SICRH_SPI_SD);
return fsl_esdhc_mmc_init(bd);
}
int board_mmc_init(bd_t *bd)
{
struct ccsr_gur *gur = (struct ccsr_gur *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
u8 bcsr6 = BCSR6_SD_CARD_1BIT;
if (!hwconfig("esdhc"))
return 0;
printf("Enabling eSDHC...\n"
" For eSDHC to function, I2C2 ");
if (esdhc_disables_uart0()) {
printf("and UART0 should be disabled.\n");
printf(" Redirecting stderr, stdout and stdin to UART1...\n");
console_assign(stderr, "eserial1");
console_assign(stdout, "eserial1");
console_assign(stdin, "eserial1");
printf("Switched to UART1 (initial log has been printed to "
"UART0).\n");
clrsetbits_be32(&gur->plppar1, PLPPAR1_UART0_BIT_MASK,
PLPPAR1_ESDHC_4BITS_VAL);
clrsetbits_be32(&gur->plpdir1, PLPDIR1_UART0_BIT_MASK,
PLPDIR1_ESDHC_4BITS_VAL);
bcsr6 |= BCSR6_SD_CARD_4BITS;
} else {
printf("should be disabled.\n");
}
/* Assign I2C2 signals to eSDHC. */
clrsetbits_be32(&gur->plppar1, PLPPAR1_I2C_BIT_MASK,
PLPPAR1_ESDHC_VAL);
clrsetbits_be32(&gur->plpdir1, PLPDIR1_I2C_BIT_MASK,
PLPDIR1_ESDHC_VAL);
/* Mux I2C2 (and optionally UART0) signals to eSDHC. */
setbits_8(&bcsr[6], bcsr6);
return fsl_esdhc_mmc_init(bd);
}
static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)
{
const char *status = "disabled";
int off = -1;
if (!hwconfig("esdhc"))
return;
if (esdhc_disables_uart0())
fdt_board_disable_serial(blob, bd, "serial0");
while (1) {
const u32 *idx;
int len;
off = fdt_node_offset_by_compatible(blob, off, "fsl-i2c");
if (off < 0)
break;
idx = fdt_getprop(blob, off, "cell-index", &len);
if (!idx || len != sizeof(*idx))
continue;
if (*idx == 1) {
fdt_setprop(blob, off, "status", status,
strlen(status) + 1);
break;
}
}
if (hwconfig_subarg_cmp("esdhc", "mode", "4-bits")) {
off = fdt_node_offset_by_compatible(blob, -1, "fsl,esdhc");
if (off < 0) {
printf("WARNING: could not find esdhc node\n");
return;
}
fdt_delprop(blob, off, "sdhci,1-bit-only");
}
}
/* setup GPIO pinmux and default configuration per baseboard and env */
void setup_board_gpio(int board, struct ventana_board_info *info)
{
const char *s;
char arg[10];
size_t len;
int i;
int quiet = simple_strtol(getenv("quiet"), NULL, 10);
if (board >= GW_UNKNOWN)
return;
/* RS232_EN# */
if (gpio_cfg[board].rs232_en) {
gpio_direction_output(gpio_cfg[board].rs232_en,
(hwconfig("rs232")) ? 0 : 1);
}
/* MSATA Enable */
if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) {
gpio_direction_output(GP_MSATA_SEL,
(hwconfig("msata")) ? 1 : 0);
}
/* USBOTG Select (PCISKT or FrontPanel) */
if (gpio_cfg[board].usb_sel) {
gpio_direction_output(gpio_cfg[board].usb_sel,
(hwconfig("usb_pcisel")) ? 1 : 0);
}
/*
* Configure DIO pinmux/padctl registers
* see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions
*/
for (i = 0; i < gpio_cfg[board].dio_num; i++) {
struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i];
iomux_v3_cfg_t ctrl = DIO_PAD_CFG;
unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1;
if (!cfg->gpio_padmux[0] && !cfg->gpio_padmux[1])
continue;
sprintf(arg, "dio%d", i);
if (!hwconfig(arg))
continue;
s = hwconfig_subarg(arg, "padctrl", &len);
if (s) {
ctrl = MUX_PAD_CTRL(simple_strtoul(s, NULL, 16)
& 0x1ffff) | MUX_MODE_SION;
}
if (hwconfig_subarg_cmp(arg, "mode", "gpio")) {
if (!quiet) {
printf("DIO%d: GPIO%d_IO%02d (gpio-%d)\n", i,
(cfg->gpio_param/32)+1,
cfg->gpio_param%32,
cfg->gpio_param);
}
imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] |
ctrl);
gpio_requestf(cfg->gpio_param, "dio%d", i);
gpio_direction_input(cfg->gpio_param);
} else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
cfg->pwm_padmux) {
if (!cfg->pwm_param) {
printf("DIO%d: Error: pwm config invalid\n",
i);
continue;
}
if (!quiet)
printf("DIO%d: pwm%d\n", i, cfg->pwm_param);
imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] |
MUX_PAD_CTRL(ctrl));
}
}
if (!quiet) {
if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) {
printf("MSATA: %s\n", (hwconfig("msata") ?
"enabled" : "disabled"));
}
if (gpio_cfg[board].rs232_en) {
printf("RS232: %s\n", (hwconfig("rs232")) ?
"enabled" : "disabled");
}
}
}
int ft_board_setup(void *blob, bd_t *bd)
{
phys_addr_t base;
phys_size_t size;
#if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
const char *soc_usb_compat = "fsl-usb2-dr";
int usb_err, usb1_off, usb2_off;
#endif
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
int err;
#endif
ft_cpu_setup(blob, bd);
base = env_get_bootm_low();
size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
FT_FSL_PCI_SETUP;
#ifdef CONFIG_QE
do_fixup_by_compat(blob, "fsl,qe", "status", "okay",
sizeof("okay"), 0);
#if defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
fdt_board_fixup_qe_pins(blob);
#endif
#endif
#if defined(CONFIG_HAS_FSL_DR_USB)
fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
/* Delete eLBC node as it is muxed with USB2 controller */
if (hwconfig("usb2")) {
const char *soc_elbc_compat = "fsl,p1020-elbc";
int off = fdt_node_offset_by_compatible(blob, -1,
soc_elbc_compat);
if (off < 0) {
printf("WARNING: could not find compatible node %s\n",
soc_elbc_compat);
return off;
}
err = fdt_del_node(blob, off);
if (err < 0) {
printf("WARNING: could not remove %s\n",
soc_elbc_compat);
return err;
}
return 0;
}
#endif
#if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
/* Delete USB2 node as it is muxed with eLBC */
usb1_off = fdt_node_offset_by_compatible(blob, -1,
soc_usb_compat);
if (usb1_off < 0) {
printf("WARNING: could not find compatible node %s\n",
soc_usb_compat);
return usb1_off;
}
usb2_off = fdt_node_offset_by_compatible(blob, usb1_off,
soc_usb_compat);
if (usb2_off < 0) {
printf("WARNING: could not find compatible node %s\n",
soc_usb_compat);
return usb2_off;
}
usb_err = fdt_del_node(blob, usb2_off);
if (usb_err < 0) {
printf("WARNING: could not remove %s\n", soc_usb_compat);
return usb_err;
}
#endif
return 0;
}
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
const char *modes[] = { "host", "peripheral", "otg" };
const char *phys[] = { "ulpi", "utmi" };
const char *mode = NULL;
const char *phy_type = NULL;
const char *dr_mode_type = NULL;
const char *dr_phy_type = NULL;
char usb1_defined = 0;
int usb_mode_off = -1;
int usb_phy_off = -1;
char str[5];
int i, j;
for (i = 1; i <= FSL_MAX_NUM_USB_CTRLS; i++) {
int mode_idx = -1, phy_idx = -1;
snprintf(str, 5, "%s%d", "usb", i);
if (hwconfig(str)) {
for (j = 0; j < ARRAY_SIZE(modes); j++) {
if (hwconfig_subarg_cmp(str, "dr_mode",
modes[j])) {
mode_idx = j;
break;
}
}
for (j = 0; j < ARRAY_SIZE(phys); j++) {
if (hwconfig_subarg_cmp(str, "phy_type",
phys[j])) {
phy_idx = j;
break;
}
}
dr_mode_type = modes[mode_idx];
dr_phy_type = phys[phy_idx];
/* use usb_dr_mode and usb_phy_type if
usb1_defined = 0; these variables are to
be deprecated */
if (!strcmp(str, "usb1"))
usb1_defined = 1;
if (mode_idx < 0 && phy_idx < 0) {
printf("WARNING: invalid phy or mode\n");
return;
}
}
usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
dr_mode_type, NULL, usb_mode_off);
if (usb_mode_off < 0)
return;
usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
NULL, dr_phy_type, usb_phy_off);
if (usb_phy_off < 0)
return;
}
if (!usb1_defined) {
int usb_off = -1;
mode = getenv("usb_dr_mode");
phy_type = getenv("usb_phy_type");
if (mode || phy_type) {
printf("WARNING: usb_dr_mode and usb_phy_type "
"are to be deprecated soon. Use "
"hwconfig to set these values instead!!\n");
fdt_fixup_usb_mode_phy_type(blob, mode,
phy_type, usb_off);
}
}
}
void ft_board_setup(void *blob, bd_t *bd)
{
const char *soc_usb_compat = "fsl-usb2-dr";
int err, usb1_off, usb2_off;
phys_addr_t base;
phys_size_t size;
ft_cpu_setup(blob, bd);
base = getenv_bootm_low();
size = getenv_bootm_size();
#if defined(CONFIG_PCI)
ft_pci_board_setup(blob);
#endif /* #if defined(CONFIG_PCI) */
fdt_fixup_memory(blob, (u64)base, (u64)size);
#if defined(CONFIG_HAS_FSL_DR_USB)
fdt_fixup_dr_usb(blob, bd);
#endif
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
/* Delete eLBC node as it is muxed with USB2 controller */
if (hwconfig("usb2")) {
const char *soc_elbc_compat = "fsl,p1020-elbc";
int off = fdt_node_offset_by_compatible(blob, -1,
soc_elbc_compat);
if (off < 0) {
printf("WARNING: could not find compatible node"
" %s: %s.\n", soc_elbc_compat,
fdt_strerror(off));
return;
}
err = fdt_del_node(blob, off);
if (err < 0) {
printf("WARNING: could not remove %s: %s.\n",
soc_elbc_compat, fdt_strerror(err));
}
return;
}
#endif
/* Delete USB2 node as it is muxed with eLBC */
usb1_off = fdt_node_offset_by_compatible(blob, -1,
soc_usb_compat);
if (usb1_off < 0) {
printf("WARNING: could not find compatible node"
" %s: %s.\n", soc_usb_compat,
fdt_strerror(usb1_off));
return;
}
usb2_off = fdt_node_offset_by_compatible(blob, usb1_off,
soc_usb_compat);
if (usb2_off < 0) {
printf("WARNING: could not find compatible node"
" %s: %s.\n", soc_usb_compat,
fdt_strerror(usb2_off));
return;
}
err = fdt_del_node(blob, usb2_off);
if (err < 0)
printf("WARNING: could not remove %s: %s.\n",
soc_usb_compat, fdt_strerror(err));
}
