uint16_t rf430_i2c_read_register(uint16_t reg_addr){ uint16_t timeout = 0; static uint8_t read_buffer[DATA_LENGTH]; uint8_t tx_addr[DATA_LENGTH] = {0,0}; uint8_t rx_data[DATA_LENGTH] = {0,0}; tx_addr[0] = reg_addr >> 8; // MSB of address tx_addr[1] = reg_addr & 0xFF; //usart_write_buffer_wait(&usart_instance, "Starting to write packet\n\r", sizeof("Starting to write packet\n\r")); struct i2c_master_packet packet = { .address = RF430_I2C_SLAVE_ADDRESS, .data_length = DATA_LENGTH, .data = tx_addr, .ten_bit_address = false, .high_speed = false, .hs_master_code = 0x0, }; while (i2c_master_write_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) { /* Increment timeout counter and check if timed out. */ if (timeout++ == TIMEOUT) { //usart_write_buffer_wait(&usart_instance, "WRITE TIMEOUT\n\r", sizeof("TIMEOUT\n\r")); break; } } //delay_ms(500); packet.data = read_buffer; while (i2c_master_read_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) { /* Increment timeout counter and check if timed out. */ if (timeout++ == TIMEOUT) { //usart_write_buffer_wait(&usart_instance, "READ TIMEOUT\n\r", sizeof("TIMEOUT\n\r")); break; } } rx_data[0] = packet.data[0]; rx_data[1] = packet.data[1]; return (rx_data[1] << 8 | rx_data[0]); } void rf430_i2c_write_register(uint16_t reg_addr, uint16_t val){ uint16_t timeout = 0; uint8_t tx_addr_data[3] = {0}; tx_addr_data[0] = reg_addr >> 8; tx_addr_data[1] = reg_addr & 0xFF; tx_addr_data[3] = val >> 8; tx_addr_data[2] = val & 0xFF; struct i2c_master_packet packet = { .address = RF430_I2C_SLAVE_ADDRESS, .data_length = 4, .data = tx_addr_data, .ten_bit_address = false, .high_speed = false, .hs_master_code = 0x0, }; while (i2c_master_write_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) { /* Increment timeout counter and check if timed out. */ if (timeout++ == TIMEOUT) { //usart_write_buffer_wait(&usart_instance, "WRITE TIMEOUT\n\r", sizeof("TIMEOUT\n\r")); break; } } //usart_write_buffer_wait(&usart_instance, "WRITE SUCCESS\n\r", sizeof("WRITE SUCCESS\n\r")); } void rf430_i2c_write_continous(uint16_t reg_addr, uint8_t* write_data, const uint16_t data_length){ uint16_t timeout = 0; uint8_t tx_addr_data[2 + data_length]; tx_addr_data[0] = reg_addr >> 8; // MSB of address tx_addr_data[1] = reg_addr & 0xFF; for(int i = 2; i<data_length+2; i++){ tx_addr_data[i] = write_data [i-2]; }; struct i2c_master_packet packet = { .address = RF430_I2C_SLAVE_ADDRESS, .data_length = DATA_LENGTH+data_length, .data = tx_addr_data, .ten_bit_address = false, .high_speed = false, .hs_master_code = 0x0, }; while (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &packet) != STATUS_OK) { /* Increment timeout counter and check if timed out. */ if (timeout++ == TIMEOUT) { //usart_write_buffer_wait(&usart_instance, "WRITE TIMEOUT\n\r", sizeof("TIMEOUT\n\r")); break; } } i2c_master_send_stop(&i2c_master_instance); //usart_write_buffer_wait(&usart_instance, "CONTINOUS DATA WRITE SUCCESS\n\r", sizeof("DATA WRITE SUCCESS\n\r")); } void rf430_i2c_config(void){ uint16_t version = 0; //usart_write_buffer_wait(&usart_instance, "Starting config\n\r", sizeof("Starting config\n\r")); while(!(rf430_i2c_read_register(STATUS_REG) & READY)); //usart_write_buffer_wait(&usart_instance, "STATUS: READY\n\r", sizeof("STATUS: READY\n\r")); version = rf430_i2c_read_register(VERSION_REG); char version_buffer[50] = {0}; sprintf(version_buffer, "Firmware version :0x%x \n\r", version); //usart_write_buffer_wait(&usart_instance, version_buffer, sizeof(version_buffer)); if (version == 0x0101 || version == 0x0201) { // the issue exists in these two versions rf430_i2c_write_register(TEST_MODE_REG, TEST_MODE_KEY); rf430_i2c_write_register(CONTROL_REG, 0x0080); if (version == 0x0101) { // Ver C rf430_i2c_write_register(0x2a98, 0x0650); //usart_write_buffer_wait(&usart_instance, "Version C Registred\n\r", sizeof("Version C Registred\n\r")); } else { // Ver D rf430_i2c_write_register(0x2a6e, 0x0650); } rf430_i2c_write_register(0x2814, 0); rf430_i2c_write_register(TEST_MODE_REG, 0); } uint8_t NDEF_Application_Data[] = COSY_DEFAULT_DATA; rf430_i2c_write_continous(0, NDEF_Application_Data, sizeof(NDEF_Application_Data)); //Enable interrupts for End of Read and End of Write rf430_i2c_write_register(INT_ENABLE_REG, EOW_INT_ENABLE + EOR_INT_ENABLE); //Configure INTO pin for active low and enable RF rf430_i2c_write_register(CONTROL_REG, (INT_ENABLE + INTO_DRIVE + RF_ENABLE) ); }
/** * \internal * \brief Test for I2C master transfer. * * First test transfer function with stop. * write to slave, read from slave and then compare the data. * the slave send out the data it received, * so master write and read data should be the same. * * Then test transfer function without stop. * write to slave, then use i2c_master_send_stop to complete writing, * read from slave, compare the data. * finally, use function with stop to complete the transfer. * * \param test Current test case. */ static void run_i2c_master_transfer_test(const struct test_case *test) { uint32_t timeout_cycles = 1000; uint32_t i; bool status = true; uint8_t read_buffer[DATA_LENGTH] = {0}; struct i2c_master_packet packet = { .address = SLAVE_ADDRESS, .data_length = DATA_LENGTH, .data = write_buffer, .ten_bit_address = false, .high_speed = false, .hs_master_code = 0x0, }; /* with stop function: master transfer test */ /* wait the master write to complete */ do { timeout_cycles--; if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) == STATUS_OK) { break; } } while (timeout_cycles > 0); test_assert_true(test, timeout_cycles > 0, "i2c master write failed"); /* wait the master read to complete */ packet.data = read_buffer; timeout_cycles = 1000; do { timeout_cycles--; if (i2c_master_read_packet_wait(&i2c_master_instance, &packet) == STATUS_OK) { break; } } while (timeout_cycles > 0); test_assert_true(test, timeout_cycles > 0, "i2c master read failed"); /* Compare the sent and the received */ for (i = 0; i < DATA_LENGTH; i++) { if (read_buffer[i] != write_buffer[i]) { status = false; break; } } test_assert_true(test, status == true, "i2c master transfer comparsion failed"); /* with stop function master transfer test end */ /* without stop function: master transfer test*/ /* wait the master write to finish */ packet.data = write_buffer; timeout_cycles = 1000; do { timeout_cycles--; if (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &packet) == STATUS_OK) { break; } } while (timeout_cycles > 0); test_assert_true(test, timeout_cycles > 0, "i2c master write without stop failed"); /* use i2c_master_send_stop to complete master writing */ i2c_master_send_stop(&i2c_master_instance); /* wait the master read to finish */ packet.data = read_buffer; timeout_cycles = 1000; do { timeout_cycles--; if (i2c_master_read_packet_wait_no_stop(&i2c_master_instance, &packet) == STATUS_OK) { break; } } while (timeout_cycles > 0); test_assert_true(test, timeout_cycles > 0, "i2c master read without stop failed"); /* Compare the sent and the received */ for (i = 0; i < DATA_LENGTH; i++) { if (read_buffer[i] != write_buffer[i]) { status = false; break; } } test_assert_true(test, status == true, "i2c master transfer without stop comparsion failed"); /* use i2c_master_write_packet_wait to complete the transfer */ packet.data = write_buffer; do { timeout_cycles--; if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) == STATUS_OK) { break; } } while (timeout_cycles > 0); test_assert_true(test, timeout_cycles > 0, "i2c master write with repeated start failed"); /* without stop function: master transfer test end*/ } /** * \internal * \brief Test full speed mode master transfer. * * test function with stop in full speed mode. * \param test Current test case. */ static void run_i2c_full_speed_test(const struct test_case *test) { enum status_code status; struct i2c_master_config config_i2c_master; /* init i2c master in full speed mode*/ i2c_master_get_config_defaults(&config_i2c_master); config_i2c_master.buffer_timeout = 10000; config_i2c_master.baud_rate = I2C_MASTER_BAUD_RATE_400KHZ; i2c_master_disable(&i2c_master_instance); status = i2c_master_init(&i2c_master_instance, SERCOM2, &config_i2c_master); /* Check for successful initialization */ test_assert_true(test, status == STATUS_OK, "I2C master fast-mode initialization failed"); i2c_master_enable(&i2c_master_instance); uint32_t timeout_cycles = 1000; uint32_t i; bool status1 = true; struct i2c_master_packet packet = { .address = SLAVE_ADDRESS, .data_length = DATA_LENGTH, .data = write_buffer, .ten_bit_address = false, .high_speed = false, .hs_master_code = 0x0, }; uint8_t read_buffer[DATA_LENGTH] = {0}; /* wait master write complete */ do { timeout_cycles--; if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) == STATUS_OK) { break; } } while (timeout_cycles > 0); test_assert_true(test, timeout_cycles > 0, "i2c master write failed"); /* wait master read complete */ packet.data = read_buffer; timeout_cycles = 1000; do { timeout_cycles--; if (i2c_master_read_packet_wait(&i2c_master_instance, &packet) == STATUS_OK) { break; } } while (timeout_cycles > 0); test_assert_true(test, timeout_cycles > 0, "i2c master read failed"); /* Compare the sent and the received */ for (i = 0; i < DATA_LENGTH; i++) { if (read_buffer[i] != write_buffer[i]) { status1 = false; break; } } test_assert_true(test, status1 == true, "i2c master transfer comparsion failed"); } /** * \brief Run I2C master unit tests * * Initializes the system and serial output, then sets up the * I2C master unit test suite and runs it. */ int main(void) { system_init(); cdc_uart_init(); /* Define Test Cases */ DEFINE_TEST_CASE(i2c_init_test, NULL, run_i2c_init_test, NULL, "Testing I2C Initialization"); DEFINE_TEST_CASE(i2c_master_transfer_test, NULL, run_i2c_master_transfer_test, NULL, "Testing I2C master data transfer"); DEFINE_TEST_CASE(i2c_full_speed_test, NULL, run_i2c_full_speed_test, NULL, "Testing I2C change speed transfer"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(i2c_tests) = { &i2c_init_test, &i2c_master_transfer_test, &i2c_full_speed_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(i2c_test_suite, i2c_tests, "SAM I2C driver test suite"); /* Run all tests in the suite*/ test_suite_run(&i2c_test_suite); while (true) { /* Intentionally left empty */ } }