static int i6300esb_init(PCIDevice *dev)
{
I6300State *d = DO_UPCAST(I6300State, dev, dev);
uint8_t *pci_conf;
int io_mem;
static CPUReadMemoryFunc * const mem_read[3] = {
i6300esb_mem_readb,
i6300esb_mem_readw,
i6300esb_mem_readl,
};
static CPUWriteMemoryFunc * const mem_write[3] = {
i6300esb_mem_writeb,
i6300esb_mem_writew,
i6300esb_mem_writel,
};
i6300esb_debug("I6300State = %p\n", d);
d->timer = qemu_new_timer_ns(vm_clock, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
pci_conf = d->dev.config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_ESB_9);
pci_config_set_class(pci_conf, PCI_CLASS_SYSTEM_OTHER);
io_mem = cpu_register_io_memory(mem_read, mem_write, d,
DEVICE_NATIVE_ENDIAN);
pci_register_bar_simple(&d->dev, 0, 0x10, 0, io_mem);
/* qemu_register_coalesced_mmio (addr, 0x10); ? */
return 0;
}
static void i6300esb_mem_writew(void *vp, target_phys_addr_t addr, uint32_t val)
{
I6300State *d = vp;
i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
if (addr == 0xc && val == 0x80)
d->unlock_state = 1;
else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
d->unlock_state = 2;
else {
if (d->unlock_state == 2) {
if (addr == 0xc) {
if ((val & 0x100) != 0)
/* This is the "ping" from the userspace watchdog in
* the guest ...
*/
i6300esb_restart_timer(d, 1);
/* Setting bit 9 resets the previous reboot flag.
* There's a bug in the Linux driver where it sets
* bit 12 instead.
*/
if ((val & 0x200) != 0 || (val & 0x1000) != 0) {
d->previous_reboot_flag = 0;
}
}
d->unlock_state = 0;
}
}
}
/* This function is called when the watchdog expires. Note that
* the hardware has two timers, and so expiry happens in two stages.
* If d->stage == 1 then we perform the first stage action (usually,
* sending an interrupt) and then restart the timer again for the
* second stage. If the second stage expires then the watchdog
* really has run out.
*/
static void i6300esb_timer_expired(void *vp)
{
I6300State *d = vp;
i6300esb_debug("stage %d\n", d->stage);
if (d->stage == 1) {
/* What to do at the end of stage 1? */
switch (d->int_type) {
case INT_TYPE_IRQ:
fprintf(stderr, "i6300esb_timer_expired: I would send APIC 1 INT 10 here if I knew how (XXX)\n");
break;
case INT_TYPE_SMI:
fprintf(stderr, "i6300esb_timer_expired: I would send SMI here if I knew how (XXX)\n");
break;
}
/* Start the second stage. */
i6300esb_restart_timer(d, 2);
} else {
/* Second stage expired, reboot for real. */
if (d->reboot_enabled) {
d->previous_reboot_flag = 1;
watchdog_perform_action(); /* This reboots, exits, etc */
i6300esb_reset(&d->dev.qdev);
}
/* In "free running mode" we start stage 1 again. */
if (d->free_run)
i6300esb_restart_timer(d, 1);
}
}
static void i6300esb_config_write(PCIDevice *dev, uint32_t addr,
uint32_t data, int len)
{
I6300State *d = DO_UPCAST(I6300State, dev, dev);
int old;
i6300esb_debug("addr = %x, data = %x, len = %d\n", addr, data, len);
if (addr == ESB_CONFIG_REG && len == 2) {
d->reboot_enabled = (data & ESB_WDT_REBOOT) == 0;
d->clock_scale =
(data & ESB_WDT_FREQ) != 0 ? CLOCK_SCALE_1MHZ : CLOCK_SCALE_1KHZ;
d->int_type = (data & ESB_WDT_INTTYPE);
} else if (addr == ESB_LOCK_REG && len == 1) {
if (!d->locked) {
d->locked = (data & ESB_WDT_LOCK) != 0;
d->free_run = (data & ESB_WDT_FUNC) != 0;
old = d->enabled;
d->enabled = (data & ESB_WDT_ENABLE) != 0;
if (!old && d->enabled) /* Enabled transitioned from 0 -> 1 */
i6300esb_restart_timer(d, 1);
else if (!d->enabled)
i6300esb_disable_timer(d);
}
} else {
pci_default_write_config(dev, addr, data, len);
}
}
/* This function is called when the watchdog has either been enabled
* (hence it starts counting down) or has been keep-alived.
*/
static void i6300esb_restart_timer(I6300State *d, int stage)
{
int64_t timeout;
if (!d->enabled)
return;
d->stage = stage;
if (d->stage <= 1)
timeout = d->timer1_preload;
else
timeout = d->timer2_preload;
if (d->clock_scale == CLOCK_SCALE_1KHZ)
timeout <<= 15;
else
timeout <<= 5;
/* Get the timeout in units of ticks_per_sec. */
timeout = get_ticks_per_sec() * timeout / 33000000;
i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
qemu_mod_timer(d->timer, qemu_get_clock_ns(vm_clock) + timeout);
}
/* This function is called when the watchdog has either been enabled
* (hence it starts counting down) or has been keep-alived.
*/
static void i6300esb_restart_timer(I6300State *d, int stage)
{
int64_t timeout;
if (!d->enabled)
return;
d->stage = stage;
if (d->stage <= 1)
timeout = d->timer1_preload;
else
timeout = d->timer2_preload;
if (d->clock_scale == CLOCK_SCALE_1KHZ)
timeout <<= 15;
else
timeout <<= 5;
/* Get the timeout in units of ticks_per_sec.
*
* ticks_per_sec is typically 10^9 == 0x3B9ACA00 (30 bits), with
* 20 bits of user supplied preload, and 15 bits of scale, the
* multiply here can exceed 64-bits, before we divide by 33MHz, so
* we use a higher-precision intermediate result.
*/
timeout = muldiv64(get_ticks_per_sec(), timeout, 33000000);
i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
timer_mod(d->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout);
}
static void i6300esb_mem_writeb(void *vp, target_phys_addr_t addr, uint32_t val)
{
I6300State *d = vp;
i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
if (addr == 0xc && val == 0x80)
d->unlock_state = 1;
else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
d->unlock_state = 2;
}
static void i6300esb_realize(PCIDevice *dev, Error **errp)
{
I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
i6300esb_debug("I6300State = %p\n", d);
d->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d,
"i6300esb", 0x10);
pci_register_bar(&d->dev, 0, 0, &d->io_mem);
/* qemu_register_coalesced_mmio (addr, 0x10); ? */
}
static int i6300esb_init(PCIDevice *dev)
{
I6300State *d = DO_UPCAST(I6300State, dev, dev);
i6300esb_debug("I6300State = %p\n", d);
d->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d,
"i6300esb", 0x10);
pci_register_bar(&d->dev, 0, 0, &d->io_mem);
/* qemu_register_coalesced_mmio (addr, 0x10); ? */
return 0;
}
static uint32_t i6300esb_mem_readw(void *vp, target_phys_addr_t addr)
{
uint32_t data = 0;
I6300State *d = vp;
i6300esb_debug("addr = %x\n", (int) addr);
if (addr == 0xc) {
/* The previous reboot flag is really bit 9, but there is
* a bug in the Linux driver where it thinks it's bit 12.
* Set both.
*/
data = d->previous_reboot_flag ? 0x1200 : 0;
}
return data;
}
static void i6300esb_mem_writel(void *vp, target_phys_addr_t addr, uint32_t val)
{
I6300State *d = vp;
i6300esb_debug ("addr = %x, val = %x\n", (int) addr, val);
if (addr == 0xc && val == 0x80)
d->unlock_state = 1;
else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
d->unlock_state = 2;
else {
if (d->unlock_state == 2) {
if (addr == 0)
d->timer1_preload = val & 0xfffff;
else if (addr == 4)
d->timer2_preload = val & 0xfffff;
d->unlock_state = 0;
}
}
}
static void i6300esb_reset(DeviceState *dev)
{
PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
I6300State *d = DO_UPCAST(I6300State, dev, pdev);
i6300esb_debug("I6300State = %p\n", d);
i6300esb_disable_timer(d);
/* NB: Don't change d->previous_reboot_flag in this function. */
d->reboot_enabled = 1;
d->clock_scale = CLOCK_SCALE_1KHZ;
d->int_type = INT_TYPE_IRQ;
d->free_run = 0;
d->locked = 0;
d->enabled = 0;
d->timer1_preload = 0xfffff;
d->timer2_preload = 0xfffff;
d->stage = 1;
d->unlock_state = 0;
}
static uint32_t i6300esb_config_read(PCIDevice *dev, uint32_t addr, int len)
{
I6300State *d = DO_UPCAST(I6300State, dev, dev);
uint32_t data;
i6300esb_debug ("addr = %x, len = %d\n", addr, len);
if (addr == ESB_CONFIG_REG && len == 2) {
data =
(d->reboot_enabled ? 0 : ESB_WDT_REBOOT) |
(d->clock_scale == CLOCK_SCALE_1MHZ ? ESB_WDT_FREQ : 0) |
d->int_type;
return data;
} else if (addr == ESB_LOCK_REG && len == 1) {
data =
(d->free_run ? ESB_WDT_FUNC : 0) |
(d->locked ? ESB_WDT_LOCK : 0) |
(d->enabled ? ESB_WDT_ENABLE : 0);
return data;
} else {
return pci_default_read_config(dev, addr, len);
}
}
static uint32_t i6300esb_mem_readl(void *vp, target_phys_addr_t addr)
{
i6300esb_debug("addr = %x\n", (int) addr);
return 0;
}
/* This is called when the guest disables the watchdog. */
static void i6300esb_disable_timer(I6300State *d)
{
i6300esb_debug("timer disabled\n");
qemu_del_timer(d->timer);
}
static uint32_t i6300esb_mem_readl(void *vp, hwaddr addr)
{
i6300esb_debug("addr = %x\n", (int) addr);
return 0;
}
