void iLinkHWInitialize(void){
iLinkPHY_SetLCTRL(0);
/* Configure the Control 0 register, resetting the transmitter and receiver at the same time. */
// ILINKRegisterBase->ctrl0=iLink_CTRL0_TxRst|iLink_CTRL0_RxRst|iLink_CTRL0_RcvSelfID|iLink_CTRL0_BusIDRst|iLink_CTRL0_CycTmrEn|iLink_CTRL0_RetLim(0x0F)|iLink_CTRL0_RSP0|iLink_CTRL0_DELim(3);
ILINKRegisterBase->ctrl0=iLink_CTRL0_TxRst|iLink_CTRL0_RxRst|iLink_CTRL0_RcvSelfID|iLink_CTRL0_BusIDRst|iLink_CTRL0_CycTmrEn|iLink_CTRL0_RetLim(0x0F)|iLink_CTRL0_DELim(3);
while(ILINKRegisterBase->ctrl0&(iLink_CTRL0_RxRst|iLink_CTRL0_TxRst)){};
ILINKRegisterBase->ubufTransmitClear=0; /* Clear UBUF Tx FIFO. */
ILINKRegisterBase->ubufReceiveClear=0; /* Clear UBUF Rx FIFO. */
ILINKRegisterBase->dbufFIFO_lvlR0=DBUF_FIFO_RESET_TX|DBUF_FIFO_RESET_RX; /* Reset DBUF FIFO 0 */
ILINKRegisterBase->dbufFIFO_lvlR1=DBUF_FIFO_RESET_TX|DBUF_FIFO_RESET_RX; /* Reset DBUF FIFO 1 */
iLinkInitPHT();
iLinkEnableIntr();
iLinkWritePhy(5, iLinkReadPhy(5)|REG05_EN_ACCL|REG05_EN_MULTI); /* Enable supported P1394A-2000 enhancements. */
/* Enable DMA channels 13 and 15. */
dmac_enable(IOP_DMAC_FDMA0);
dmac_enable(IOP_DMAC_FDMA2);
GenerationNumber=0;
NodeCapabilities=0;
}
void iLinkPHY_SetLCTRL(int LCTRL_status){
unsigned short int Register04value;
Register04value=iLinkReadPhy(4);
if(LCTRL_status) Register04value|=REG04_LCTRL;
else Register04value&=(~REG04_LCTRL);
iLinkWritePhy(4, Register04value);
}
void iLinkPHY_SetRootBit(int isRoot){
unsigned short int Register01value;
Register01value=iLinkReadPhy(1);
if(isRoot) Register01value|=REG01_RHB;
else Register01value&=(~REG01_RHB);
iLinkWritePhy(1, Register01value);
}
void iLinkPHYBusReset(void){
iLinkWritePhy(5, iLinkReadPhy(5)|REG05_ISBR);
}
void iLinkPHY_SetGapCount(unsigned char GapCount){
iLinkWritePhy(1, (iLinkReadPhy(1)&0xC0)|GapCount);
}
