/*
* LOCKING: must hold mod->lock
*/
static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
{
struct ican3_new_desc desc;
void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
/* switch to the tohost queue, and read the buffer descriptor */
ican3_set_page(mod, QUEUE_TOHOST);
memcpy_fromio(&desc, desc_addr, sizeof(desc));
if (!(desc.control & DESC_VALID)) {
dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__);
return -ENOMEM;
}
/* switch to the data page, copy the data */
ican3_set_page(mod, desc.pointer);
memcpy_fromio(msg, mod->dpm, sizeof(*msg));
/* switch back to the descriptor, toggle the valid bit, write it back */
ican3_set_page(mod, QUEUE_TOHOST);
desc.control ^= DESC_VALID;
memcpy_toio(desc_addr, &desc, sizeof(desc));
/* update the rx number */
mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
return 0;
}
/*
* Send a message through the "old-style" firmware interface
*
* LOCKING: must hold mod->lock
*
* returns 0 on success, -ENOMEM when no free space exists
*/
static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
{
unsigned int mbox, mbox_page;
u8 locl, peer, xord;
/* get the MSYNC registers */
ican3_set_page(mod, QUEUE_OLD_CONTROL);
peer = ioread8(mod->dpm + MSYNC_PEER);
locl = ioread8(mod->dpm + MSYNC_LOCL);
xord = locl ^ peer;
if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
dev_err(mod->dev, "no mbox for writing\n");
return -ENOMEM;
}
/* calculate a free mbox to use */
mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
/* copy the message to the DPM */
mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
ican3_set_page(mod, mbox_page);
memcpy_toio(mod->dpm, msg, sizeof(*msg));
locl ^= mbox;
if (mbox == MSYNC_WB1)
locl |= MSYNC_WBLW;
ican3_set_page(mod, QUEUE_OLD_CONTROL);
iowrite8(locl, mod->dpm + MSYNC_LOCL);
return 0;
}
/*
* LOCKING: must hold mod->lock
*/
static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
{
struct ican3_new_desc desc;
void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
/* switch to the fromhost mid queue, and read the buffer descriptor */
ican3_set_page(mod, QUEUE_FROMHOST_MID);
memcpy_fromio(&desc, desc_addr, sizeof(desc));
if (!(desc.control & DESC_VALID)) {
netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
return -ENOMEM;
}
/* switch to the data page, copy the data */
ican3_set_page(mod, desc.pointer);
memcpy_toio(mod->dpm, msg, sizeof(*msg));
/* switch back to the descriptor, set the valid bit, write it back */
ican3_set_page(mod, QUEUE_FROMHOST_MID);
desc.control ^= DESC_VALID;
memcpy_toio(desc_addr, &desc, sizeof(desc));
/* update the tx number */
mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
return 0;
}
/*
* Receive a message from the ICAN3 "old-style" firmware interface
*
* LOCKING: must hold mod->lock
*
* returns 0 on success, -ENOMEM when no message exists
*/
static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
{
unsigned int mbox, mbox_page;
u8 locl, peer, xord;
/* get the MSYNC registers */
ican3_set_page(mod, QUEUE_OLD_CONTROL);
peer = ioread8(mod->dpm + MSYNC_PEER);
locl = ioread8(mod->dpm + MSYNC_LOCL);
xord = locl ^ peer;
if ((xord & MSYNC_RB_MASK) == 0x00) {
dev_dbg(mod->dev, "no mbox for reading\n");
return -ENOMEM;
}
/* find the first free mbox to read */
if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
else
mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
/* copy the message */
mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
ican3_set_page(mod, mbox_page);
memcpy_fromio(msg, mod->dpm, sizeof(*msg));
/*
* notify the firmware that the read buffer is available
* for it to fill again
*/
locl ^= mbox;
ican3_set_page(mod, QUEUE_OLD_CONTROL);
iowrite8(locl, mod->dpm + MSYNC_LOCL);
return 0;
}
static void ican3_init_fast_host_interface(struct ican3_dev *mod)
{
struct ican3_fast_desc desc;
unsigned long flags;
unsigned int addr;
void __iomem *dst;
int i;
spin_lock_irqsave(&mod->lock, flags);
/* save the start recv page */
mod->fastrx_start = mod->free_page;
mod->fastrx_num = 0;
/* build a single fast tohost queue descriptor */
memset(&desc, 0, sizeof(desc));
desc.control = 0x00;
desc.command = 1;
/* build the tohost queue descriptor ring in memory */
addr = 0;
for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
/* set the wrap bit on the last buffer */
if (i == ICAN3_RX_BUFFERS - 1)
desc.control |= DESC_WRAP;
/* switch to the correct page */
ican3_set_page(mod, mod->free_page);
/* copy the descriptor to the DPM */
dst = mod->dpm + addr;
memcpy_toio(dst, &desc, sizeof(desc));
addr += sizeof(desc);
/* move to the next page if necessary */
if (addr >= DPM_PAGE_SIZE) {
addr = 0;
mod->free_page++;
}
}
/* make sure we page-align the next queue */
if (addr != 0)
mod->free_page++;
/* save the start xmit page */
mod->fasttx_start = mod->free_page;
mod->fasttx_num = 0;
/* build a single fast fromhost queue descriptor */
memset(&desc, 0, sizeof(desc));
desc.control = DESC_VALID;
desc.command = 1;
/* build the fromhost queue descriptor ring in memory */
addr = 0;
for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
/* set the wrap bit on the last buffer */
if (i == ICAN3_TX_BUFFERS - 1)
desc.control |= DESC_WRAP;
/* switch to the correct page */
ican3_set_page(mod, mod->free_page);
/* copy the descriptor to the DPM */
dst = mod->dpm + addr;
memcpy_toio(dst, &desc, sizeof(desc));
addr += sizeof(desc);
/* move to the next page if necessary */
if (addr >= DPM_PAGE_SIZE) {
addr = 0;
mod->free_page++;
}
}
spin_unlock_irqrestore(&mod->lock, flags);
}
static void ican3_init_new_host_interface(struct ican3_dev *mod)
{
struct ican3_new_desc desc;
unsigned long flags;
void __iomem *dst;
int i;
spin_lock_irqsave(&mod->lock, flags);
/* setup the internal datastructures for RX */
mod->rx_num = 0;
mod->rx_int = 0;
/* tohost queue descriptors are in page 5 */
ican3_set_page(mod, QUEUE_TOHOST);
dst = mod->dpm;
/* initialize the tohost (rx) queue descriptors: pages 9-24 */
for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
desc.pointer = mod->free_page;
/* set wrap flag on last buffer */
if (i == ICAN3_NEW_BUFFERS - 1)
desc.control |= DESC_WRAP;
memcpy_toio(dst, &desc, sizeof(desc));
dst += sizeof(desc);
mod->free_page++;
}
/* fromhost (tx) mid queue descriptors are in page 6 */
ican3_set_page(mod, QUEUE_FROMHOST_MID);
dst = mod->dpm;
/* setup the internal datastructures for TX */
mod->tx_num = 0;
/* initialize the fromhost mid queue descriptors: pages 25-40 */
for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
desc.pointer = mod->free_page;
/* set wrap flag on last buffer */
if (i == ICAN3_NEW_BUFFERS - 1)
desc.control |= DESC_WRAP;
memcpy_toio(dst, &desc, sizeof(desc));
dst += sizeof(desc);
mod->free_page++;
}
/* fromhost hi queue descriptors are in page 7 */
ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
dst = mod->dpm;
/* initialize only a single buffer in the fromhost hi queue (unused) */
desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
desc.pointer = mod->free_page;
memcpy_toio(dst, &desc, sizeof(desc));
mod->free_page++;
/* fromhost low queue descriptors are in page 8 */
ican3_set_page(mod, QUEUE_FROMHOST_LOW);
dst = mod->dpm;
/* initialize only a single buffer in the fromhost low queue (unused) */
desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
desc.pointer = mod->free_page;
memcpy_toio(dst, &desc, sizeof(desc));
mod->free_page++;
spin_unlock_irqrestore(&mod->lock, flags);
}
