static uint16_t md_common_read(void *opaque, uint32_t at) { MicroDriveState *s = opaque; IDEState *ifs; uint16_t ret; at -= s->io_base; switch (s->opt & OPT_MODE) { case OPT_MODE_MMAP: if ((at & ~0x3ff) == 0x400) at = 0; break; case OPT_MODE_IOMAP16: at &= 0xf; break; case OPT_MODE_IOMAP1: if ((at & ~0xf) == 0x3f0) at -= 0x3e8; else if ((at & ~0xf) == 0x1f0) at -= 0x1f0; break; case OPT_MODE_IOMAP2: if ((at & ~0xf) == 0x370) at -= 0x368; else if ((at & ~0xf) == 0x170) at -= 0x170; } switch (at) { case 0x0: /* Even RD Data */ case 0x8: return ide_data_readw(&s->bus, 0); /* TODO: 8-bit accesses */ if (s->cycle) ret = s->io >> 8; else { s->io = ide_data_readw(&s->bus, 0); ret = s->io & 0xff; } s->cycle = !s->cycle; return ret; case 0x9: /* Odd RD Data */ return s->io >> 8; case 0xd: /* Error */ return ide_ioport_read(&s->bus, 0x1); case 0xe: /* Alternate Status */ ifs = idebus_active_if(&s->bus); if (ifs->bs) return ifs->status; else return 0; case 0xf: /* Device Address */ ifs = idebus_active_if(&s->bus); return 0xc2 | ((~ifs->select << 2) & 0x3c); default: return ide_ioport_read(&s->bus, at); }
static uint32_t mmio_ide_read (void *opaque, target_phys_addr_t addr) { MMIOState *s = opaque; addr >>= s->shift; if (addr & 7) return ide_ioport_read(&s->bus, addr); else return ide_data_readw(&s->bus, 0); }
static uint64_t mmio_ide_read(void *opaque, hwaddr addr, unsigned size) { MMIOState *s = opaque; addr >>= s->shift; if (addr & 7) return ide_ioport_read(&s->bus, addr); else return ide_data_readw(&s->bus, 0); }
static uint64_t cmd646_data_read(void *opaque, target_phys_addr_t addr, unsigned size) { CMD646BAR *cmd646bar = opaque; if (size == 1) { return ide_ioport_read(cmd646bar->bus, addr); } else if (addr == 0) { if (size == 2) { return ide_data_readw(cmd646bar->bus, addr); } else { return ide_data_readl(cmd646bar->bus, addr); } } return ((uint64_t)1 << (size * 8)) - 1; }