void idtInit()
{
static IDTEntry idt[256];
static IDTPointer idtPtr;
int i;
uint32_t temp;
// get distance between irq0 and irq1
temp = (uint32_t)isr1 - (uint32_t)isr0;
// Set up the IDT pointer for the CPU
idtPtr.limit = sizeof(IDTEntry) * 256 - 1;
idtPtr.base = (uint32_t)&idt;
// Clear them out so we don't get triple faults..
memset(&idt, 0, sizeof(IDTEntry)*256);
// Set up the IDT itself first
for(i=0; i<256; i++) {
encodeIDTEntry(&idt[i], (uint32_t)isr0+(temp*i), 0x08, IDT_INT32_PL0);
}
// Now we Set up service handlers
for(i=0; i<256; i++) {
interruptHandlerRegister(i, unhandledInterrupt);
}
// Finally, we can push changes to the CPU and enable interrupts
idtFlush((uint32_t)&idtPtr);
}
void
IdtOutput (unsigned long addr, unsigned char byte)
{
if (addr != idtaddr + idtlen || idtlen == BUFSIZE) {
idtFlush ();
idtaddr = addr;
}
idtbuf[idtlen++] = byte;
}
void installIDT() {
remapIRQs();
clearInterruptHandlers();
iptr.limit = sizeof(struct idt_entry) * 256 - 1;
iptr.base = (u32)&idt;
memSet8((u8*)&idt, 0, sizeof(struct idt_entry) * 256);
setInterruptGates();
idtFlush();
}
void
IdtEnd (unsigned long ep)
{
unsigned char cksum = 0;
int n;
idtFlush ();
fprintf (idtfp, "S7%c", ADDRSIZE + 1);
cksum += ADDRSIZE + 1;
for (n = (ADDRSIZE - 1) * 8; n >= 0; n -= 8) {
unsigned char ab = ep >> n;
fputc (ab, idtfp);
cksum += ab;
}
fputc (~cksum & 0xff, idtfp);
}
int idtInit() // initialize the IDT
{
idtPtr.limit = sizeof(idtEntryT) * 256 - 1; // the limit is the length of the entryarray - 1
idtPtr.base = (uint32_t)&idtEntries;
memset(&idtEntries, 0, sizeof(idtEntryT) * 256); // be sure the array is empty
// remap the IRQ table
outb(0x20, 0x11); // send ICW1 to both PIC's
outb(0xA0, 0x11);
outb(0x21, 0x20); // send ICW2 to both PIC's
outb(0xA1, 0x28);
outb(0x21, 0x04); // send ICW3 to both PIC's
outb(0xA1, 0x02);
outb(0x21, 0x01); // send ICW4 to both PIC's
outb(0xA1, 0x01);
outb(0x21, 0x0); // enable all interrupts
outb(0xA1, 0x0);
idtSetGate(0,(uint32_t)isr0,0x08,0x8E);
idtSetGate(1,(uint32_t)isr1,0x08,0x8E);
idtSetGate(2,(uint32_t)isr2,0x08,0x8E);
idtSetGate(3,(uint32_t)isr3,0x08,0x8E);
idtSetGate(4,(uint32_t)isr4,0x08,0x8E);
idtSetGate(5,(uint32_t)isr5,0x08,0x8E);
idtSetGate(6,(uint32_t)isr6,0x08,0x8E);
idtSetGate(7,(uint32_t)isr7,0x08,0x8E);
idtSetGate(8,(uint32_t)isr8,0x08,0x8E);
idtSetGate(9,(uint32_t)isr9,0x08,0x8E);
idtSetGate(10,(uint32_t)isr10,0x08,0x8E);
idtSetGate(11,(uint32_t)isr11,0x08,0x8E);
idtSetGate(12,(uint32_t)isr12,0x08,0x8E);
idtSetGate(13,(uint32_t)isr13,0x08,0x8E);
idtSetGate(14,(uint32_t)isr14,0x08,0x8E);
idtSetGate(15,(uint32_t)isr15,0x08,0x8E);
idtSetGate(16,(uint32_t)isr16,0x08,0x8E);
idtSetGate(17,(uint32_t)isr17,0x08,0x8E);
idtSetGate(18,(uint32_t)isr18,0x08,0x8E);
idtSetGate(19,(uint32_t)isr19,0x08,0x8E);
idtSetGate(20,(uint32_t)isr20,0x08,0x8E);
idtSetGate(21,(uint32_t)isr21,0x08,0x8E);
idtSetGate(22,(uint32_t)isr22,0x08,0x8E);
idtSetGate(23,(uint32_t)isr23,0x08,0x8E);
idtSetGate(24,(uint32_t)isr24,0x08,0x8E);
idtSetGate(25,(uint32_t)isr25,0x08,0x8E);
idtSetGate(26,(uint32_t)isr26,0x08,0x8E);
idtSetGate(27,(uint32_t)isr27,0x08,0x8E);
idtSetGate(28,(uint32_t)isr28,0x08,0x8E);
idtSetGate(29,(uint32_t)isr29,0x08,0x8E);
idtSetGate(30,(uint32_t)isr30,0x08,0x8E);
idtSetGate(31,(uint32_t)isr31,0x08,0x8E);
idtSetGate(32,(uint32_t)irq0,0x08,0x8E);
idtSetGate(33,(uint32_t)irq1,0x08,0x8E);
idtSetGate(34,(uint32_t)irq2,0x08,0x8E);
idtSetGate(35,(uint32_t)irq3,0x08,0x8E);
idtSetGate(36,(uint32_t)irq4,0x08,0x8E);
idtSetGate(37,(uint32_t)irq5,0x08,0x8E);
idtSetGate(38,(uint32_t)irq6,0x08,0x8E);
idtSetGate(39,(uint32_t)irq7,0x08,0x8E);
idtSetGate(40,(uint32_t)irq8,0x08,0x8E);
idtSetGate(41,(uint32_t)irq9,0x08,0x8E);
idtSetGate(42,(uint32_t)irq10,0x08,0x8E);
idtSetGate(43,(uint32_t)irq11,0x08,0x8E);
idtSetGate(44,(uint32_t)irq12,0x08,0x8E);
idtSetGate(45,(uint32_t)irq13,0x08,0x8E);
idtSetGate(46,(uint32_t)irq14,0x08,0x8E);
idtSetGate(47,(uint32_t)irq15,0x08,0x8E);
idtFlush((uint32_t)&idtPtr);
memset(&interruptHandlers, 0, sizeof(isrT)*256);
}
