/*! * Board specific initialization. */ static void __init mx6_board_init(void) { int ret = gpio_request_array(mx6_init_gpios, ARRAY_SIZE(mx6_init_gpios)); if (ret) { printk(KERN_ERR "%s gpio_request_array failed(" "%d) for mx6_init_gpios\n", __func__, ret); } IOMUX_SETUP(common_pads); gp_reg_id = dvfscore_data.reg_id; soc_reg_id = dvfscore_data.soc_id; pu_reg_id = dvfscore_data.pu_id; imx6q_add_imx_uart(0, NULL); imx6q_add_imx_uart(1, NULL); imx6q_add_imx_uart(2, &uart2_data); imx6q_add_imx_uart(3, NULL); imx6q_add_imx_snvs_rtc(); /* SPI */ imx6q_add_ecspi(0, &mx6_spi_data); spi_device_init(); imx6q_add_anatop_thermal_imx(1, &mx6_anatop_thermal_data); imx6_init_fec(fec_data); imx6q_add_pm_imx(0, &mx6_pm_data); imx6q_add_sdhci_usdhc_imx(3, &mx6_sd4_data); imx6_init_usb(); platform_device_register(&mx6_vmmc_reg_devices); imx6q_add_otp(); imx6q_add_viim(); imx6q_add_imx2_wdt(0, NULL); imx6q_add_dma(); imx6q_add_dvfs_core(&dvfscore_data); add_device_buttons(); imx6q_add_busfreq(); imx6q_add_flexcan0(&flexcan0_tja1040_pdata); imx6q_add_pcie(&plat_pcie); imx6q_add_perfmon(0); imx6q_add_perfmon(1); imx6q_add_perfmon(2); // regulator_has_full_constraints(); }
void __init edm_cf_imx6_init_can(void) { EDM_SET_PAD(PAD_GPIO_18__GPIO_7_13); /* CAN1_STBY */ EDM_SET_PAD(PAD_KEY_COL2__CAN1_TXCAN); EDM_SET_PAD(PAD_KEY_ROW2__CAN1_RXCAN); EDM_SET_PAD(PAD_GPIO_7__GPIO_1_7); /* CAN2_STBY */ EDM_SET_PAD(PAD_KEY_COL4__CAN2_TXCAN); EDM_SET_PAD(PAD_KEY_ROW4__CAN2_RXCAN); gpio_request(EDM_CF_IMX6_CAN1_STBY, "can1_stby"); gpio_direction_output(EDM_CF_IMX6_CAN1_STBY, 0); gpio_request(EDM_CF_IMX6_CAN2_STBY, "can2_stby"); gpio_direction_output(EDM_CF_IMX6_CAN2_STBY, 0); imx6q_add_flexcan0(&edm_cf_imx6_flexcan0_pdata); imx6q_add_flexcan1(&edm_cf_imx6_flexcan1_pdata); }
/*! * Board specific initialization. */ static void __init mx6_sabrelite_board_init(void) { int i; int ret; struct clk *clko2; struct clk *new_parent; int rate; mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_pads, ARRAY_SIZE(mx6q_sabrelite_pads)); #ifdef CONFIG_FEC_1588 /* Set GPIO_16 input for IEEE-1588 ts_clk and RMII reference clock * For MX6 GPR1 bit21 meaning: * Bit21: 0 - GPIO_16 pad output * 1 - GPIO_16 pad input */ mxc_iomux_set_gpr_register(1, 21, 1, 1); #endif gp_reg_id = sabrelite_dvfscore_data.reg_id; soc_reg_id = sabrelite_dvfscore_data.soc_id; pu_reg_id = sabrelite_dvfscore_data.pu_id; mx6q_sabrelite_init_uart(); imx6q_add_mxc_hdmi_core(&hdmi_core_data); imx6q_add_ipuv3(0, &ipu_data[0]); imx6q_add_ipuv3(1, &ipu_data[1]); for (i = 0; i < ARRAY_SIZE(sabrelite_fb_data); i++) imx6q_add_ipuv3fb(i, &sabrelite_fb_data[i]); imx6q_add_vdoa(); imx6q_add_lcdif(&lcdif_data); imx6q_add_ldb(&ldb_data); imx6q_add_v4l2_output(0); imx6q_add_v4l2_capture(0, &capture_data[0]); imx6q_add_v4l2_capture(1, &capture_data[1]); imx6q_add_mipi_csi2(&mipi_csi2_pdata); imx6q_add_imx_snvs_rtc(); if (1 == caam_enabled) imx6q_add_imx_caam(); imx6q_add_imx_i2c(0, &mx6q_sabrelite_i2c_data); imx6q_add_imx_i2c(1, &mx6q_sabrelite_i2c_data); imx6q_add_imx_i2c(2, &mx6q_sabrelite_i2c_data); i2c_register_board_info(0, mxc_i2c0_board_info, ARRAY_SIZE(mxc_i2c0_board_info)); i2c_register_board_info(1, mxc_i2c1_board_info, ARRAY_SIZE(mxc_i2c1_board_info)); i2c_register_board_info(2, mxc_i2c2_board_info, ARRAY_SIZE(mxc_i2c2_board_info)); /* SPI */ imx6q_add_ecspi(0, &mx6q_sabrelite_spi_data); spi_device_init(); imx6q_add_mxc_hdmi(&hdmi_data); imx6q_add_anatop_thermal_imx(1, &mx6q_sabrelite_anatop_thermal_data); imx6_init_fec(fec_data); imx6q_add_pm_imx(0, &mx6q_sabrelite_pm_data); imx6q_add_sdhci_usdhc_imx(3, &mx6q_sabrelite_sd4_data); imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabrelite_sd3_data); imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); imx6q_sabrelite_init_usb(); if (cpu_is_mx6q()) { #ifdef CONFIG_SATA_AHCI_PLATFORM imx6q_add_ahci(0, &mx6q_sabrelite_sata_data); #else mx6q_sabrelite_sata_init(NULL, (void __iomem *)ioremap(MX6Q_SATA_BASE_ADDR, SZ_4K)); #endif } imx6q_add_vpu(); imx6q_init_audio(); platform_device_register(&sabrelite_vmmc_reg_devices); imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk"); imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk"); imx6q_add_asrc(&imx_asrc_data); /* release USB Hub reset */ gpio_set_value(MX6Q_SABRELITE_USB_HUB_RESET, 1); imx6q_add_mxc_pwm(0); imx6q_add_mxc_pwm(1); imx6q_add_mxc_pwm(2); imx6q_add_mxc_pwm(3); imx6q_add_mxc_pwm_backlight(3, &mx6_sabrelite_pwm_backlight_data); imx6q_add_otp(); imx6q_add_viim(); imx6q_add_imx2_wdt(0, NULL); imx6q_add_dma(); imx6q_add_dvfs_core(&sabrelite_dvfscore_data); sabrelite_add_device_buttons(); imx6q_add_hdmi_soc(); imx6q_add_hdmi_soc_dai(); ret = gpio_request_array(mx6q_sabrelite_flexcan_gpios, ARRAY_SIZE(mx6q_sabrelite_flexcan_gpios)); if (ret) pr_err("failed to request flexcan1-gpios: %d\n", ret); else imx6q_add_flexcan0(&mx6q_sabrelite_flexcan0_pdata); clko2 = clk_get(NULL, "clko2_clk"); if (IS_ERR(clko2)) pr_err("can't get CLKO2 clock.\n"); new_parent = clk_get(NULL, "osc_clk"); if (!IS_ERR(new_parent)) { clk_set_parent(clko2, new_parent); clk_put(new_parent); } rate = clk_round_rate(clko2, 24000000); clk_set_rate(clko2, rate); clk_enable(clko2); imx6q_add_busfreq(); imx6q_add_perfmon(0); imx6q_add_perfmon(1); imx6q_add_perfmon(2); }
/*! * Board specific initialization. */ static void __init mx6_board_init(void) { int i; int ret; iomux_v3_cfg_t *common_pads = NULL; iomux_v3_cfg_t *can0_pads = NULL; iomux_v3_cfg_t *can1_pads = NULL; iomux_v3_cfg_t *mipi_sensor_pads = NULL; iomux_v3_cfg_t *i2c3_pads = NULL; iomux_v3_cfg_t *tuner_pads = NULL; iomux_v3_cfg_t *spinor_pads = NULL; iomux_v3_cfg_t *weimnor_pads = NULL; iomux_v3_cfg_t *extra_pads = NULL; int common_pads_cnt; int can0_pads_cnt; int can1_pads_cnt; int mipi_sensor_pads_cnt; int i2c3_pads_cnt; int tuner_pads_cnt; int spinor_pads_cnt; int weimnor_pads_cnt; int extra_pads_cnt; if (cpu_is_mx6q()) { common_pads = mx6q_sabreauto_pads; can0_pads = mx6q_sabreauto_can0_pads; can1_pads = mx6q_sabreauto_can1_pads; mipi_sensor_pads = mx6q_sabreauto_mipi_sensor_pads; tuner_pads = mx6q_tuner_pads; spinor_pads = mx6q_spinor_pads; weimnor_pads = mx6q_weimnor_pads; common_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_pads); can0_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_can0_pads); can1_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_can1_pads); mipi_sensor_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_mipi_sensor_pads); tuner_pads_cnt = ARRAY_SIZE(mx6q_tuner_pads); spinor_pads_cnt = ARRAY_SIZE(mx6q_spinor_pads); weimnor_pads_cnt = ARRAY_SIZE(mx6q_weimnor_pads); if (board_is_mx6_reva()) { i2c3_pads = mx6q_i2c3_pads_rev_a; i2c3_pads_cnt = ARRAY_SIZE(mx6q_i2c3_pads_rev_a); mxc_iomux_v3_setup_multiple_pads(i2c3_pads, i2c3_pads_cnt); } else { i2c3_pads = mx6q_i2c3_pads_rev_b; i2c3_pads_cnt = ARRAY_SIZE(mx6q_i2c3_pads_rev_b); extra_pads = mx6q_extra_pads_rev_b; extra_pads_cnt = ARRAY_SIZE(mx6q_extra_pads_rev_b); mxc_iomux_v3_setup_multiple_pads(extra_pads, extra_pads_cnt); } } else if (cpu_is_mx6dl()) { common_pads = mx6dl_sabreauto_pads; can0_pads = mx6dl_sabreauto_can0_pads; can1_pads = mx6dl_sabreauto_can1_pads; mipi_sensor_pads = mx6dl_sabreauto_mipi_sensor_pads; tuner_pads = mx6dl_tuner_pads; spinor_pads = mx6dl_spinor_pads; weimnor_pads = mx6dl_weimnor_pads; common_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_pads); can0_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_can0_pads); can1_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_can1_pads); mipi_sensor_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_mipi_sensor_pads); tuner_pads_cnt = ARRAY_SIZE(mx6dl_tuner_pads); spinor_pads_cnt = ARRAY_SIZE(mx6dl_spinor_pads); weimnor_pads_cnt = ARRAY_SIZE(mx6dl_weimnor_pads); if (board_is_mx6_reva()) { i2c3_pads = mx6dl_i2c3_pads_rev_a; i2c3_pads_cnt = ARRAY_SIZE(mx6dl_i2c3_pads_rev_a); mxc_iomux_v3_setup_multiple_pads(i2c3_pads, i2c3_pads_cnt); } else { i2c3_pads = mx6dl_i2c3_pads_rev_b; i2c3_pads_cnt = ARRAY_SIZE(mx6dl_i2c3_pads_rev_b); extra_pads = mx6dl_extra_pads_rev_b; extra_pads_cnt = ARRAY_SIZE(mx6dl_extra_pads_rev_b); mxc_iomux_v3_setup_multiple_pads(extra_pads, extra_pads_cnt); } } BUG_ON(!common_pads); mxc_iomux_v3_setup_multiple_pads(common_pads, common_pads_cnt); /*If at least one NOR memory is selected we don't * configure IC23 PADS for rev B */ if (spinor_en) { BUG_ON(!spinor_pads); mxc_iomux_v3_setup_multiple_pads(spinor_pads, spinor_pads_cnt); } else if (weimnor_en) { BUG_ON(!weimnor_pads); mxc_iomux_v3_setup_multiple_pads(weimnor_pads, weimnor_pads_cnt); } else { if (!board_is_mx6_reva()) { BUG_ON(!i2c3_pads); mxc_iomux_v3_setup_multiple_pads(i2c3_pads, i2c3_pads_cnt); } } if (can0_enable) { BUG_ON(!can0_pads); mxc_iomux_v3_setup_multiple_pads(can0_pads, can0_pads_cnt); } BUG_ON(!can1_pads); mxc_iomux_v3_setup_multiple_pads(can1_pads, can1_pads_cnt); if (tuner_en) { BUG_ON(!tuner_pads); mxc_iomux_v3_setup_multiple_pads(tuner_pads, tuner_pads_cnt); } /* assert i2c-rst */ gpio_request(SABREAUTO_I2C_EXP_RST, "i2c-rst"); gpio_direction_output(SABREAUTO_I2C_EXP_RST, 1); if (!board_is_mx6_reva()) { /* enable either EIM_D18 or i2c3_sda route path */ gpio_request(SABREAUTO_I2C3_STEER, "i2c3-steer"); if (spinor_en) gpio_direction_output(SABREAUTO_I2C3_STEER, 0); else if (weimnor_en) { /*Put DISP0_DAT8 in ALT5 mode to prevent WDOG1 of resetting WEIM NOR*/ gpio_direction_output(SABREAUTO_I2C3_STEER, 0); gpio_request(SABREAUTO_WEIM_NOR_WDOG1, "nor-reset"); gpio_direction_output(SABREAUTO_WEIM_NOR_WDOG1, 1); } else gpio_direction_output(SABREAUTO_I2C3_STEER, 1); /* Set GPIO_16 input for IEEE-1588 ts_clk and * RMII reference clk * For MX6 GPR1 bit21 meaning: * Bit21: 0 - GPIO_16 pad output * 1 - GPIO_16 pad input */ mxc_iomux_set_gpr_register(1, 21, 1, 1); } if (mipi_sensor) { BUG_ON(!mipi_sensor_pads); mxc_iomux_v3_setup_multiple_pads(mipi_sensor_pads, mipi_sensor_pads_cnt); } gp_reg_id = sabreauto_dvfscore_data.reg_id; soc_reg_id = sabreauto_dvfscore_data.soc_id; pu_reg_id = sabreauto_dvfscore_data.pu_id; mx6q_sabreauto_init_uart(); imx6q_add_mipi_csi2(&mipi_csi2_pdata); if (cpu_is_mx6dl()) { mipi_dsi_pdata.ipu_id = 0; mipi_dsi_pdata.disp_id = 1; ldb_data.ipu_id = 0; ldb_data.disp_id = 0; ldb_data.sec_ipu_id = 0; ldb_data.sec_disp_id = 1; hdmi_core_data.disp_id = 1; } imx6q_add_mxc_hdmi_core(&hdmi_core_data); imx6q_add_ipuv3(0, &ipu_data[0]); if (cpu_is_mx6q()) { imx6q_add_ipuv3(1, &ipu_data[1]); for (i = 0; i < ARRAY_SIZE(sabr_fb_data); i++) imx6q_add_ipuv3fb(i, &sabr_fb_data[i]); } else if (cpu_is_mx6dl()) for (i = 0; i < (ARRAY_SIZE(sabr_fb_data) + 1) / 2; i++) imx6q_add_ipuv3fb(i, &sabr_fb_data[i]); imx6q_add_vdoa(); imx6q_add_mipi_dsi(&mipi_dsi_pdata); imx6q_add_lcdif(&lcdif_data); imx6q_add_ldb(&ldb_data); imx6q_add_v4l2_output(0); imx6q_add_v4l2_capture(0, &capture_data[0]); imx6q_add_v4l2_capture(1, &capture_data[1]); imx6q_add_android_device_buttons(); imx6q_add_imx_snvs_rtc(); imx6q_add_imx_caam(); imx6q_add_imx_i2c(1, &mx6q_sabreauto_i2c1_data); i2c_register_board_info(1, mxc_i2c1_board_info, ARRAY_SIZE(mxc_i2c1_board_info)); imx6q_add_imx_i2c(2, &mx6q_sabreauto_i2c2_data); i2c_register_board_info(2, mxc_i2c2_board_info, ARRAY_SIZE(mxc_i2c2_board_info)); ret = gpio_request(SABREAUTO_PMIC_INT, "pFUZE-int"); if (ret) { printk(KERN_ERR"request pFUZE-int error!!\n"); return; } else { gpio_direction_input(SABREAUTO_PMIC_INT); mx6q_sabreauto_init_pfuze100(SABREAUTO_PMIC_INT); } /* SPI */ imx6q_add_ecspi(0, &mx6q_sabreauto_spi_data); #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) spi_device_init(); #else mx6q_setup_weimcs(); platform_device_register(&physmap_flash_device); #endif imx6q_add_mxc_hdmi(&hdmi_data); imx6q_add_anatop_thermal_imx(1, &mx6q_sabreauto_anatop_thermal_data); if (!can0_enable) imx6_init_fec(fec_data); imx6q_add_pm_imx(0, &mx6q_sabreauto_pm_data); imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabreauto_sd3_data); imx6q_add_sdhci_usdhc_imx(0, &mx6q_sabreauto_sd1_data); imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); imx6q_sabreauto_init_usb(); if (cpu_is_mx6q()) imx6q_add_ahci(0, &mx6q_sabreauto_sata_data); imx6q_add_vpu(); imx6q_init_audio(); platform_device_register(&sabreauto_vmmc_reg_devices); mx6_cpu_regulator_init(); imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk"); imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk"); imx6q_add_asrc(&imx_asrc_data); if (!mipi_sensor) mx6q_csi0_io_init(); /* DISP0 Detect */ gpio_request(SABREAUTO_DISP0_DET_INT, "disp0-detect"); gpio_direction_input(SABREAUTO_DISP0_DET_INT); /* DISP0 Reset - Assert for i2c disabled mode */ gpio_request(SABREAUTO_DISP0_RESET, "disp0-reset"); gpio_direction_output(SABREAUTO_DISP0_RESET, 0); /* DISP0 I2C enable */ gpio_request(SABREAUTO_DISP0_I2C_EN, "disp0-i2c"); gpio_direction_output(SABREAUTO_DISP0_I2C_EN, 0); gpio_request(SABREAUTO_DISP0_PWR, "disp0-pwr"); gpio_direction_output(SABREAUTO_DISP0_PWR, 1); gpio_request(SABREAUTO_LDB_BACKLIGHT3, "ldb-backlight3"); gpio_direction_output(SABREAUTO_LDB_BACKLIGHT3, 1); gpio_request(SABREAUTO_LDB_BACKLIGHT4, "ldb-backlight4"); gpio_direction_output(SABREAUTO_LDB_BACKLIGHT4, 1); imx6q_add_otp(); imx6q_add_viim(); imx6q_add_imx2_wdt(0, NULL); imx6q_add_dma(); if (!uart3_en) imx6q_add_gpmi(&mx6q_gpmi_nand_platform_data); imx6q_add_dvfs_core(&sabreauto_dvfscore_data); imx6q_add_mxc_pwm(2); imx6q_add_mxc_pwm(3); imx6q_add_mxc_pwm_backlight(2, &mx6_arm2_pwm_backlight_data3); imx6q_add_mxc_pwm_backlight(3, &mx6_arm2_pwm_backlight_data4); mxc_spdif_data.spdif_core_clk = clk_get_sys("mxc_spdif.0", NULL); clk_put(mxc_spdif_data.spdif_core_clk); imx6q_add_spdif(&mxc_spdif_data); imx6q_add_spdif_dai(); imx6q_add_spdif_audio_device(); if (can0_enable) imx6q_add_flexcan0(&mx6q_sabreauto_flexcan_pdata[0]); imx6q_add_flexcan1(&mx6q_sabreauto_flexcan_pdata[1]); imx6q_add_hdmi_soc(); imx6q_add_hdmi_soc_dai(); imx6q_add_mlb150(&mx6_sabreauto_mlb150_data); /* Tuner audio interface */ imx6q_add_imx_ssi(1, &mx6_sabreauto_ssi1_pdata); mxc_register_device(&si4763_codec_device, NULL); mxc_register_device(&mxc_si4763_audio_device, &si4763_audio_data); imx6q_add_busfreq(); /* Add PCIe RC interface support */ imx6q_add_pcie(&mx6_sabreauto_pcie_data); imx6q_add_perfmon(0); imx6q_add_perfmon(1); imx6q_add_perfmon(2); }
/*! * Board specific initialization. */ static void __init board_init(void) { int i, j; int ret; struct clk *clko2; struct clk *new_parent; int rate; int isn6 ; IOMUX_SETUP(common_pads); isn6 = is_nitrogen6w(); if (isn6) { audio_data.ext_port = 3; sd3_data.wp_gpio = -1 ; IOMUX_SETUP(nitrogen6x_pads); } else { IOMUX_SETUP(sabrelite_pads); } printk(KERN_ERR "------------ Board type %s\n", isn6 ? "Nitrogen6X/W" : "Sabre Lite"); #ifdef CONFIG_FEC_1588 /* Set GPIO_16 input for IEEE-1588 ts_clk and RMII reference clock * For MX6 GPR1 bit21 meaning: * Bit21: 0 - GPIO_16 pad output * 1 - GPIO_16 pad input */ mxc_iomux_set_gpr_register(1, 21, 1, 1); #endif gp_reg_id = dvfscore_data.reg_id; soc_reg_id = dvfscore_data.soc_id; pu_reg_id = dvfscore_data.pu_id; imx6q_add_imx_uart(0, NULL); imx6q_add_imx_uart(1, NULL); if (isn6) imx6q_add_imx_uart(2, &mx6_arm2_uart2_data); #if !(defined(CONFIG_MXC_CAMERA_OV5642) || defined(CONFIG_MXC_CAMERA_OV5642_MODULE)) imx6q_add_imx_uart(3, &mx6_arm2_uart3_data); imx6q_add_imx_uart(4, &mx6_arm2_uart4_data); #endif if (!cpu_is_mx6q()) { ldb_data.ipu_id = 0; ldb_data.sec_ipu_id = 0; } imx6q_add_mxc_hdmi_core(&hdmi_core_data); imx6q_add_ipuv3(0, &ipu_data[0]); if (cpu_is_mx6q()) { imx6q_add_ipuv3(1, &ipu_data[1]); j = ARRAY_SIZE(fb_data); } else { j = (ARRAY_SIZE(fb_data) + 1) / 2; adv7180_data.ipu = 0; } for (i = 0; i < j; i++) imx6q_add_ipuv3fb(i, &fb_data[i]); imx6q_add_vdoa(); imx6q_add_lcdif(&lcdif_data); imx6q_add_ldb(&ldb_data); imx6q_add_v4l2_output(0); imx6q_add_bt656(&bt656_data); for (i = 0; i < ARRAY_SIZE(capture_data); i++) { if (!cpu_is_mx6q()) capture_data[i].ipu = 0; imx6q_add_v4l2_capture(i, &capture_data[i]); } imx6q_add_mipi_csi2(&mipi_csi2_pdata); imx6q_add_imx_snvs_rtc(); if (1 == caam_enabled) imx6q_add_imx_caam(); imx6q_add_imx_i2c(0, &i2c_data); imx6q_add_imx_i2c(1, &i2c_data); imx6q_add_imx_i2c(2, &i2c_data); /* * SABRE Lite does not have an ISL1208 RTC */ i2c_register_board_info(0, mxc_i2c0_board_info, isn6 ? ARRAY_SIZE(mxc_i2c0_board_info) : ARRAY_SIZE(mxc_i2c0_board_info)-1); i2c_register_board_info(1, mxc_i2c1_board_info, ARRAY_SIZE(mxc_i2c1_board_info)); i2c_register_board_info(2, mxc_i2c2_board_info, ARRAY_SIZE(mxc_i2c2_board_info)); /* SPI */ imx6q_add_ecspi(0, &spi_data); spi_device_init(); imx6q_add_mxc_hdmi(&hdmi_data); imx6q_add_anatop_thermal_imx(1, &anatop_thermal_data); imx6_init_fec(fec_data); imx6q_add_pm_imx(0, &pm_data); imx6q_add_sdhci_usdhc_imx(2, &sd3_data); imx6q_add_sdhci_usdhc_imx(3, &sd4_data); imx_add_viv_gpu(&imx6_gpu_data, &imx6_gpu_pdata); init_usb(); if (cpu_is_mx6q()) imx6q_add_ahci(0, &sata_data); imx6q_add_vpu(); imx6_init_audio(); platform_device_register(&vmmc_reg_devices); imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk"); imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk"); imx6q_add_asrc(&imx_asrc_data); /* release USB Hub reset */ gpio_set_value(GP_USB_HUB_RESET, 1); imx6q_add_mxc_pwm(0); imx6q_add_mxc_pwm(1); imx6q_add_mxc_pwm_pdata(2, &pwm3_data); imx6q_add_mxc_pwm(3); imx6q_add_mxc_pwm_backlight(0, &pwm1_backlight_data); imx6q_add_mxc_pwm_backlight(3, &pwm4_backlight_data); imx6q_add_otp(); imx6q_add_viim(); imx6q_add_imx2_wdt(0, NULL); imx6q_add_dma(); imx6q_add_dvfs_core(&dvfscore_data); add_device_buttons(); imx6q_add_hdmi_soc(); imx6q_add_hdmi_soc_dai(); ret = gpio_request_array(flexcan_gpios, ARRAY_SIZE(flexcan_gpios)); if (ret) { pr_err("failed to request flexcan1-gpios: %d\n", ret); } else { int ret = gpio_get_value(GP_CAN1_ERR); if (ret == 0) { imx6q_add_flexcan0(&flexcan0_tja1040_pdata); pr_info("Flexcan NXP tja1040\n"); } else if (ret == 1) { IOMUX_SETUP(mc33902_flexcan_pads); imx6q_add_flexcan0(&flexcan0_mc33902_pdata); pr_info("Flexcan Freescale mc33902\n"); } else { pr_info("Flexcan gpio_get_value CAN1_ERR failed\n"); } } clko2 = clk_get(NULL, "clko2_clk"); if (IS_ERR(clko2)) pr_err("can't get CLKO2 clock.\n"); new_parent = clk_get(NULL, "osc_clk"); if (!IS_ERR(new_parent)) { clk_set_parent(clko2, new_parent); clk_put(new_parent); } rate = clk_round_rate(clko2, 24000000); clk_set_rate(clko2, rate); clk_enable(clko2); imx6q_add_busfreq(); #ifdef CONFIG_WL12XX_PLATFORM_DATA if (isn6) { imx6q_add_sdhci_usdhc_imx(1, &sd2_data); /* WL12xx WLAN Init */ if (wl12xx_set_platform_data(&n6q_wlan_data)) pr_err("error setting wl12xx data\n"); platform_device_register(&n6q_vwl1271_reg_devices); gpio_set_value(N6_WL1271_WL_EN, 1); /* momentarily enable */ gpio_set_value(N6_WL1271_BT_EN, 1); mdelay(2); gpio_set_value(N6_WL1271_WL_EN, 0); gpio_set_value(N6_WL1271_BT_EN, 0); gpio_free(N6_WL1271_WL_EN); gpio_free(N6_WL1271_BT_EN); mdelay(1); } #endif imx6q_add_pcie(&pcie_data); imx6q_add_perfmon(0); imx6q_add_perfmon(1); imx6q_add_perfmon(2); }