コード例 #1
0
void __init tsi108_pci_int_init(struct device_node *node)
{
	DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");

	pci_irq_host = irq_domain_add_legacy_isa(node, &pci_irq_domain_ops, NULL);
	if (pci_irq_host == NULL) {
		printk(KERN_ERR "pci_irq_host: failed to allocate irq domain!\n");
		return;
	}

	init_pci_source();
}
コード例 #2
0
void __init tsi108_pci_int_init(struct device_node *node)
{
	DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");

	pci_irq_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
				      0, &pci_irq_host_ops, 0);
	if (pci_irq_host == NULL) {
		printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n");
		return;
	}

	init_pci_source();
}
コード例 #3
0
ファイル: tsi108_pci.c プロジェクト: FatSunHYS/OSCourseDesign
void __init tsi108_pci_int_init(void)
{
	u_int i;

	DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");

	for (i = 0; i < NUM_PCI_IRQS; i++) {
		irq_desc[i + IRQ_PCI_INTAD_BASE].chip = &tsi108_pci_irq;
		irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL;
	}

	init_pci_source();
}
コード例 #4
0
void __init tsi108_pic_init(u_char *board_init_senses)
{
u_int i;
u32 sense;

	if (!tsi108_csr_base) {
		printk("No tsi108 PIC found !\n");
		return;
	}

	tsi108_pic_reset();

	if (ppc_md.progress) ppc_md.progress("tsi108_pic_init: enter", 0x122);

	/* Initialize timer interrupts */
	for (i = 0; i < TSI108PIC_NUM_TIMERS; i++) {
		/* Disabled, Priority 0 */
		tsi108_pic_inittimer(i, 0, IRQ_TSI108_TIMER0 + i);
		/* No processor */
		tsi108_pic_maptimer(i, 0);
	}

	/* Init board-specific external sources */
	for (i = 0; i < 4; i++) {
		sense = board_init_senses[i];

		if (sense & IRQ_SENSE_MASK)
			irq_desc[TSI108_IRQ(i)].status |= IRQ_LEVEL;

		/* Enabled, Priority 8 */
		tsi108_pic_initirq(i, 8, TSI108_IRQ(i),
			(sense & IRQ_POLARITY_MASK), (sense & IRQ_SENSE_MASK));
		/* Map to CPU #0 */
		tsi108_pic_mapirq(TSI108_IRQ(i), 1<<0, 0);
	}

	/* Init remaining internal sources. */
	for (; i < TSI108PIC_MAX_SOURCES; i++) {
		/* Disabled, Priority 8, by default - Positive Edge */
		tsi108_pic_initirq(i, 8, TSI108_IRQ(i),
				IRQ_POLARITY_POSITIVE, IRQ_SENSE_EDGE);
		/* Map to CPU #0 */
		tsi108_pic_mapirq(TSI108_IRQ(i), (1 << 0), 0);
	}

	/*
	 * Change sensitivity to level for sources that require it.
	 * (NOTE: Actual HW switching will be berformed in the corresponding
	 *  enable/disable routines)
	 */

	irq_desc[IRQ_TSI108_GIGE0].status |= IRQ_LEVEL;
	irq_desc[IRQ_TSI108_GIGE1].status |= IRQ_LEVEL;
	irq_desc[IRQ_TSI108_PCI].status   |= IRQ_LEVEL;

	/* Init descriptors */
	for (i = 0; i < TSI108PIC_MAX_SOURCES; i++)
		irq_desc[i + TSI108_IRQ_BASE].handler = &tsi108_pic_irq;

	for (i = 0; i < NUM_PCI_IRQS; i++) {
		irq_desc[i + IRQ_PCI_INTAD_BASE].handler = &tsi108_pci_irq;
		irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL;
	}

	/* Initialize the spurious interrupt */
	tsi108_pic_set_spurious(TSI108_IRQ_SPURIOUS);
	tsi108_pic_set_task_priority(0);

	init_pci_source();
	tsi108_pic_enable_irq(IRQ_TSI108_PCI);

	i = tsi108_pic_read_reg(TSI108_INT_VECTOR(0));
	tsi108_pic_write_reg(TSI108_INT_EOI(0), 0);

	if (ppc_md.progress) ppc_md.progress("tsi108_pic_init: exit",0x222);
}