/**
* Handle the timer interrupt by reading and parsing the status register
* for the given timer.
*
* Return the channel number(s) in binary flags (0+2+3=>channel=12)
* and a pointer to an array 4 long uint16_t value[4]
*/
int
up_input_pwm_timer_isr(uint8_t timer, uint8_t *channel, uint16_t value[4])
{
uint32_t status;
/* copy interrupt status */
status = rSR(timer);
/* ack the interrupts we just read */
rSR(timer) = ~status;
*channel = 0;
/* which channel was this */
/* channel 1 */
if (status & (GTIM_SR_CC1IF | GTIM_SR_CC1OF)) {
value[0] = input_pwm_decode(status & (GTIM_SR_CC1IF | GTIM_SR_CC1OF), timer, 1);
*channel |= (1 << 0);
}
/* channel 2 */
if (status & (GTIM_SR_CC2IF | GTIM_SR_CC2OF)){
value[1] = input_pwm_decode(status & (GTIM_SR_CC2IF | GTIM_SR_CC2OF), timer, 2);
*channel |= (1 << 1);
}
/* channel 3 */
if (status & (GTIM_SR_CC3IF | GTIM_SR_CC3OF)){
value[2] = input_pwm_decode(status & (GTIM_SR_CC3IF | GTIM_SR_CC3OF), timer, 3);
*channel |= (1 << 2);
}
/* channel 4 */
if (status & (GTIM_SR_CC4IF | GTIM_SR_CC4OF)){
value[3] = input_pwm_decode(status & (GTIM_SR_CC4IF | GTIM_SR_CC4OF), timer, 4);
*channel |= (1 << 3);
}
return OK;
}
/**
* Handle the timer interrupt by reading and parsing the status register
* for the given timer.
*
* Return the channel number(s) in binary flags (0+2+3=>channel=12)
* and a pointer to an array 4 long uint16_t value[4]
*/
int
up_input_pwm_timer_isr(uint8_t timer, uint8_t *channel, uint16_t value[4])
//input_pwm_timer_isr(int irq, void *context)
{
uint32_t status;
// uint8_t timer;
/* find the timer that caused the interrupt */
/* for (int i=0;i<INPUT_PWM_MAX_TIMERS;i++)
if (input_pwm_timers[i].base != 0)
if (input_pwm_timers[i].irq_vector == irq) {
timer = i;
break;
}
*/
/* find out which channel caused the interupt */
/* grab the timer for latency tracking purposes */
//latency_actual = rCNT;
/* copy interrupt status */
status = rSR(timer);
/* ack the interrupts we just read */
rSR(timer) = ~status;
/* was this a PPM edge? */
// if (status & (SR_INT_PPM | SR_OVF_PPM)) {
// me->rc_decode(status);
// }
*channel = 0;
/* which channel was this */
/* channel 1 */
if (status & (GTIM_SR_CC1IF | GTIM_SR_CC1OF)) {
value[0] = input_pwm_decode(status & (GTIM_SR_CC1IF | GTIM_SR_CC1OF), timer, 1);
*channel |= (1 << 0);
}
/* channel 2 */
if (status & (GTIM_SR_CC2IF | GTIM_SR_CC2OF)){
value[1] = input_pwm_decode(status & (GTIM_SR_CC2IF | GTIM_SR_CC2OF), timer, 2);
*channel |= (1 << 1);
}
/* channel 3 */
if (status & (GTIM_SR_CC3IF | GTIM_SR_CC3OF)){
value[2] = input_pwm_decode(status & (GTIM_SR_CC3IF | GTIM_SR_CC3OF), timer, 3);
*channel |= (1 << 2);
}
/* channel 4 */
if (status & (GTIM_SR_CC4IF | GTIM_SR_CC4OF)){
value[3] = input_pwm_decode(status & (GTIM_SR_CC4IF | GTIM_SR_CC4OF), timer, 4);
*channel |= (1 << 3);
}
// printf("count = %d, status=%d\n", rCCR1(timer),status);
return OK;
}