/*!
* \brief Reset the MCI hardware.
*
* \param init If 0, the current settings will be kept, otherwise initial
* values are loaded.
*/
static void At91MciReset(int init)
{
uint32_t mode;
uint32_t dtmo;
uint32_t slot;
/* Enable MCI clock. */
outr(PMC_PCER, _BV(MCI_ID));
if (init) {
outr(MCI_IDR, 0xFFFFFFFF);
/* Set initial configuration. */
dtmo = MCI_DTOMUL_1M | MCI_DTOCYC;
mode = MCI_RDPROOF | MCI_WRPROOF | (2 << MCI_PWSDIV_LSB);
/* Slow start. */
mode |= At91MciClockDiv(MCI_INI_BITRATE) << MCI_CLKDIV_LSB;
slot = MCI_SDCSEL_SLOTB;
} else {
/* Retrieve current configuration. */
dtmo = inr(MCI_DTOR);
mode = inr(MCI_MR) & 0xffff;
slot = inr(MCI_SDCR);
}
/* Disable and software reset. */
outr(MCI_CR, MCI_MCIDIS | MCI_SWRST);
/* Set configuration values. */
outr(MCI_DTOR, dtmo);
outr(MCI_MR, mode);
outr(MCI_SDCR, slot);
/* Enable card interface. */
outr(MCI_CR, MCI_MCIEN | MCI_PWSEN);
}
uint32_t At91SpiGetModeFlags(unsigned int base, unsigned int cs)
{
uint32_t rc = SPIMF_MFDETECT;
unsigned int mv = inr(base + SPI_MR_OFF);
if (mv & SPI_MSTR) {
rc |= SPI_MSTR;
}
if (mv & SPI_PCSDEC) {
rc |= SPIMF_MASTER;
}
if (mv & SPI_MODFDIS) {
rc &= ~SPIMF_MFDETECT;
}
if (mv & SPI_LLB) {
rc |= SPIMF_LOOPBACK;
}
mv = inr(base + SPI_CSR0_OFF + cs * 4);
if (mv & SPI_CPOL) {
if (mv & SPI_NCPHA) {
rc |= SPIMF_SCKIAHI;
} else {
rc |= SPIMF_SCKIAHI | SPIMF_CAPRISE;
}
} else if (mv & SPI_NCPHA) {
rc |= SPIMF_CAPRISE;
}
return rc;
}
/*!
* \brief Get all pin levels of a specified bank/port.
*
* \param bank GPIO bank/port number.
*
* \return Pin levels. 0 is returned for unknown banks and pins.
*/
unsigned int GpioPortGet(int bank)
{
unsigned int rc = 0;
switch(bank) {
#ifdef PIO_PDSR
case NUTGPIO_PORT:
rc = inr(PIO_PDSR);
break;
#endif /* PIO_PDSR */
#ifdef PIOA_PDSR
case NUTGPIO_PORTA:
rc = inr(PIOA_PDSR);
break;
#endif /* PIO_PDSR */
#ifdef PIOB_PDSR
case NUTGPIO_PORTB:
rc = inr(PIOB_PDSR);
break;
#endif /* PIOB_PDSR */
#ifdef PIOC_PDSR
case NUTGPIO_PORTC:
rc = inr(PIOC_PDSR);
break;
#endif /* PIOC_PDSR */
}
return rc;
}
/*!
* \brief Get pin level.
*
* \param bank GPIO bank/port number.
* \param bit Bit number of the specified bank/port.
*
* \return 1 if the pin level is high. 0 is returned if the pin level
* is low or if the pin is undefined.
*/
int GpioPinGet(int bank, int bit)
{
int rc = 0;
switch(bank) {
#ifdef PIO_PDSR
case NUTGPIO_PORT:
rc = (inr(PIO_PDSR) & _BV(bit)) != 0;
break;
#endif /* PIO_PDSR */
#ifdef PIOA_PDSR
case NUTGPIO_PORTA:
rc = (inr(PIOA_PDSR) & _BV(bit)) != 0;
break;
#endif /* PIOA_PDSR */
#ifdef PIOB_PDSR
case NUTGPIO_PORTB:
rc = (inr(PIOB_PDSR) & _BV(bit)) != 0;
break;
#endif /* PIOB_PDSR */
#ifdef PIOC_PDSR
case NUTGPIO_PORTC:
rc = (inr(PIOC_PDSR) & _BV(bit)) != 0;
break;
#endif /* PIOC_PDSR */
}
return rc;
}
/*!
* \brief Transfer data on the SPI bus in polling mode.
*
* A device must have been selected by calling At91SpiSelect().
*
* \param node Specifies the SPI bus node.
* \param txbuf Pointer to the transmit buffer. If NULL, undetermined
* byte values are transmitted.
* \param rxbuf Pointer to the receive buffer. If NULL, then incoming
* data is discarded.
* \param xlen Number of bytes to transfer.
*
* \return Always 0.
*/
int At91SpiBusPollTransfer(NUTSPINODE * node, CONST void *txbuf, void *rxbuf, int xlen)
{
uint8_t b = 0xff;
uint8_t *txp = (uint8_t *) txbuf;
uint8_t *rxp = (uint8_t *) rxbuf;
uintptr_t base;
/* Sanity check. */
NUTASSERT(node != NULL);
NUTASSERT(node->node_bus != NULL);
NUTASSERT(node->node_bus->bus_base != 0);
base = node->node_bus->bus_base;
while (xlen--) {
if (txp) {
b = *txp++;
}
/* Transmission starts by writing the transmit data. */
outr(base + SPI_TDR_OFF, b);
/* Wait for receiver data register full. */
while((inr(base + SPI_SR_OFF) & SPI_RDRF) == 0);
/* Read incoming data. */
b = (uint8_t)inr(base + SPI_RDR_OFF);
if (rxp) {
*rxp++ = b;
}
}
return 0;
}
/*!
* \brief Read characters from debug device.
*
* This function is called by the low level input routines of the
* \ref xrCrtLowio "C runtime library", using the _NUTDEVICE::dev_read
* entry.
*
* The function will block the calling thread until at least one
* character has been received.
*
* \param fp Pointer to a \ref _NUTFILE structure, obtained by a
* previous call to At91DevDebugOpen().
* \param buffer Pointer to the buffer that receives the data. If zero,
* then all characters in the input buffer will be
* removed.
* \param size Maximum number of bytes to read.
*
* \return The number of bytes read, which may be less than the number
* of bytes specified. A return value of -1 indicates an error,
* while zero is returned in case of a timeout.
*/
int At91DevDebugRead(NUTFILE * fp, void *buffer, int size)
{
int rc;
unsigned int ch;
char *bp = (char *) buffer;
/* Wait for the first character, forever. */
for (rc = 0; rc < size; rc++) {
while ((inr(fp->nf_dev->dev_base + US_CSR_OFF) & US_RXRDY) == 0) {
NutSleep(1);
if ((rc || bp == NULL) &&
(inr(fp->nf_dev->dev_base + US_CSR_OFF) & US_RXRDY) == 0) {
return rc;
}
}
ch = inr(fp->nf_dev->dev_base + US_RHR_OFF);
if (bp) {
if (ch == '\r') {
*bp++ = '\n';
} else {
*bp++ = (char) ch;
}
}
}
return rc;
}
/*!
* \brief Software interrupt control.
*
* \param cmd Control command.
* - NUT_IRQCTL_INIT Initialize and disable interrupt.
* - NUT_IRQCTL_STATUS Query interrupt status.
* - NUT_IRQCTL_ENABLE Enable interrupt.
* - NUT_IRQCTL_DISABLE Disable interrupt.
* - NUT_IRQCTL_GETPRIO Query interrupt priority.
* - NUT_IRQCTL_SETPRIO Set interrupt priority.
* - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
* \param param Pointer to optional parameter.
*
* \return 0 on success, -1 otherwise.
*/
static int SoftwareIrqCtl(int cmd, void *param)
{
int rc = 0;
unsigned int *ival = (unsigned int *)param;
int_fast8_t enabled = inr(AIC_IMR) & _BV(SWIRQ_ID);
/* Disable interrupt. */
if (enabled) {
outr(AIC_IDCR, _BV(SWIRQ_ID));
}
switch(cmd) {
case NUT_IRQCTL_INIT:
/* Set the vector. */
outr(AIC_SVR(SWIRQ_ID), (unsigned int)SoftwareIrqEntry);
/* Initialize to edge triggered with defined priority. */
outr(AIC_SMR(SWIRQ_ID), AIC_SRCTYPE_INT_EDGE_TRIGGERED | NUT_IRQPRI_SWIRQ);
/* Clear interrupt */
outr(AIC_ICCR, _BV(SWIRQ_ID));
break;
case NUT_IRQCTL_STATUS:
if (enabled) {
*ival |= 1;
}
else {
*ival &= ~1;
}
break;
case NUT_IRQCTL_ENABLE:
enabled = 1;
break;
case NUT_IRQCTL_DISABLE:
enabled = 0;
break;
case NUT_IRQCTL_GETPRIO:
*ival = inr(AIC_SMR(SWIRQ_ID)) & AIC_PRIOR;
break;
case NUT_IRQCTL_SETPRIO:
outr(AIC_SMR(SWIRQ_ID), (inr(AIC_SMR(SWIRQ_ID)) & ~AIC_PRIOR) | *ival);
break;
#ifdef NUT_PERFMON
case NUT_IRQCTL_GETCOUNT:
*ival = (unsigned int)sig_SWIRQ.ir_count;
sig_SWIRQ.ir_count = 0;
break;
#endif
default:
rc = -1;
break;
}
/* Enable interrupt. */
if (enabled) {
outr(AIC_IECR, _BV(SWIRQ_ID));
}
return rc;
}
/*!
* \brief Send a single character to debug device 0.
*
* A newline character will be automatically prepended
* by a carriage return.
*/
static void DebugPut(const NUTDEVICE * dev, char ch)
{
if (ch == '\n') {
while ((inr(dev->dev_base + US_CSR_OFF) & US_TXRDY) == 0);
outr(dev->dev_base + US_THR_OFF, '\r');
}
while ((inr(dev->dev_base + US_CSR_OFF) & US_TXRDY) == 0);
outr(dev->dev_base + US_THR_OFF, ch);
}
/*
* ATIDSPSave --
*
* This function is called to remember DSP register values on VT-B and later
* controllers.
*/
void
ATIDSPSave
(
ATIPtr pATI,
ATIHWPtr pATIHW
)
{
pATIHW->dsp_on_off = inr(DSP_ON_OFF);
pATIHW->dsp_config = inr(DSP_CONFIG);
}
static void ADCInterrupt(void *arg)
{
register uint32_t adcsr = inr(ADC_SR) & inr(ADC_CHSR);
uint16_t ADC_Value;
uint16_t channel;
for (channel = 0; channel < ADC_MAX_CHANNEL; channel ++) {
if (adcsr & _BV(channel)) {
ADC_Value = inr(ADC_CDR(channel));
if (ADCBufWrite(channel, ADC_Value) != 0) {
// Send error message
}
}
}
}
void Timer0Entry(void)
{
IRQ_ENTRY();
dummy = inr(TC0_SR);
os_handler(0);
IRQ_EXIT();
}
void ADCSetMode(TADCMode mode)
{
uint32_t regval;
regval = inr(ADC_MR);
regval &= ~ADC_SLEEP;
switch (mode) {
case ADC_OFF:
regval &= ~ADC_TRGEN;
regval |= ADC_SLEEP;
break;
case SINGLE_CONVERSION:
regval &= ~ADC_TRGEN;
break;
case FREE_RUNNING_T0:
regval &= ~ADC_TRGSEL;
regval |= ADC_TRGEN | ADC_TRGSEL_TIOA0;
break;
case FREE_RUNNING_T1:
regval &= ~ADC_TRGSEL;
regval |= ADC_TRGEN | ADC_TRGSEL_TIOA1;
break;
case FREE_RUNNING_T2:
regval &= ~ADC_TRGSEL;
regval |= ADC_TRGEN | ADC_TRGSEL_TIOA2;
break;
case FREE_RUNNING_EXT:
regval &= ~ADC_TRGSEL;
regval |= ADC_TRGEN | ADC_TRGSEL_EXT;
break;
}
outr(ADC_MR, regval);
}
unsigned int At91SpiGetBits(unsigned int base, unsigned int cs)
{
unsigned int rc;
switch (inr(base + SPI_CSR0_OFF + cs * 4) & SPI_BITS) {
case SPI_BITS_9:
rc = 9;
break;
case SPI_BITS_10:
rc = 10;
break;
case SPI_BITS_11:
rc = 11;
break;
case SPI_BITS_12:
rc = 12;
break;
case SPI_BITS_13:
rc = 13;
break;
case SPI_BITS_14:
rc = 14;
break;
case SPI_BITS_15:
rc = 15;
break;
case SPI_BITS_16:
rc = 16;
break;
default:
rc = 8;
break;
}
return rc;
}
/*!
* \brief Retrieves the number of characters in input buffer.
*
* This function is called by the low level size routine of the C runtime
* library, using the _NUTDEVICE::dev_size entry.
*
* \param fp Pointer to a \ref _NUTFILE structure, obtained by a
* previous call to UsartOpen().
*
* \return The number of bytes currently stored in input buffer.
*/
long At91DevDebugSize(NUTFILE *fp)
{
if (inr(fp->nf_dev->dev_base + US_CSR_OFF) & US_RXRDY) {
return 1;
}
return 0;
}
/*!
* \brief PIO interrupt control.
*/
static int PioCtlA(int cmd, void *param, int bit)
{
int rc = 0;
unsigned int *ival = (unsigned int *) param;
uint32_t enabled = inr(PIOA_IMR) & _BV(bit);
/* Disable interrupt. */
if (enabled) {
outr(PIOA_IDR, _BV(bit));
}
switch (cmd) {
case NUT_IRQCTL_STATUS:
if (enabled) {
*ival |= 1;
} else {
*ival &= ~1;
}
break;
case NUT_IRQCTL_ENABLE:
enabled = 1;
break;
case NUT_IRQCTL_DISABLE:
enabled = 0;
break;
default:
rc = -1;
break;
}
/* Enable interrupt. */
if (enabled) {
outr(PIOA_IER, _BV(bit));
}
return rc;
}
void board_2048::Initialization()
{
//Установка фона
QPalette* palette = new QPalette();
palette->setBrush(QPalette::Background,*(new QBrush(*(new QPixmap("21_2.jpg")))));
setPalette(*palette);
//Ui -> Labels
labels[0][0] = ui->label;
labels[0][1] = ui->label_2;
labels[0][2] = ui->label_3;
labels[0][3] = ui->label_4;
labels[1][0] = ui->label_5;
labels[1][1] = ui->label_6;
labels[1][2] = ui->label_7;
labels[1][3] = ui->label_8;
labels[2][0] = ui->label_9;
labels[2][1] = ui->label_10;
labels[2][2] = ui->label_11;
labels[2][3] = ui->label_12;
labels[3][0] = ui->label_13;
labels[3][1] = ui->label_14;
labels[3][2] = ui->label_15;
labels[3][3] = ui->label_16;
for (int i = 0; i < 4; ++i)
for (int j = 0; j < 4; ++j)
{
labels[i][j]->setText("");
labels[i][j]->setAlignment(Qt::AlignCenter);
change_Image(i, j);
}
//Загрузка изображения кнопок управления
QPixmap image(".//45.jpg");
QPixmap inr(".//456.jpg");
QPixmap inup(".//535.jpg");
QPixmap indow(".//99.jpg");
//Установки кнопок, лэйблов
ui->left_But->setIcon(image);
ui->left_But->setIconSize(image.size());
ui->right_But->setIcon(inr);
ui->right_But->setIconSize(inr.size());
ui->down_But->setIcon(indow);
ui->down_But->setIconSize(indow.size());
ui->up_But->setIcon(inup);
ui->up_But->setIconSize(inup.size());
ui->bestScore->setText("Best: \n" + QString::number(Best));
ui->bestScore->setStyleSheet("QLabel { background-color: #cda1b5; color: black; font:20pt; font-weight:400; border-radius: 10px; border-color: red;}");
ui->bestScore->setAlignment(Qt::AlignCenter);
ui->onlinelab->setStyleSheet("QLabel { background-color: #cda1b5; color: black; font:20pt; font-weight:400; border-radius: 10px; border-color: red;}");
ui->onlinelab->hide();
ui->curScore->setText("Score: \n" + QString::number(Score));
ui->curScore->setStyleSheet("QLabel { background-color: #cda1b5; color: black; font:20pt; font-weight:400; border-radius: 10px; border-color: red;}");
ui->curScore->setAlignment(Qt::AlignCenter);
}
static unsigned int LcdReadNibble(void)
{
unsigned int rc;
LCD_EN_SET();
LcdDelay(LCD_SHORT_DELAY);
rc = inr(LCD_DATA_PIO_ID+PIO_PDSR_OFF) & LCD_DATA;
LCD_EN_CLR();
LcdDelay(LCD_SHORT_DELAY);
#ifdef LCD_DATA_LSB
rc >>= LCD_DATA_LSB
#else
{
unsigned int val = 0;
if (rc & LCD_D0) {
val |= 0x01;
}
if (rc & LCD_D1) {
val |= 0x02;
}
if (rc & LCD_D2) {
val |= 0x04;
}
if (rc & LCD_D3) {
val |= 0x08;
}
rc = val;
}
#endif
return rc;
}
void ADCSetPrescale(uint32_t prescale)
{
if (prescale > 128) prescale = 128;
prescale = (prescale / 2) - 1;
outr(ADC_MR, ((inr(ADC_MR) & ~(ADC_PRESCAL | ADC_STARTUP | ADC_SHTIM)) |
(prescale << ADC_PRESCAL_LSB) | ADC_STARTUP | ADC_SHTIM)); // set maximum sample & hold and startup time
}
/*!
* \brief Toggle external hardware reset line.
*/
static void eNet_sam7X_Reset(void)
{
uint32_t rstcr_tmp = inr(RSTC_MR) & 0x00FFFFFF;
/* Set reset pulse length to 250us, disable user reset. */
outr(RSTC_MR, RSTC_KEY | (2 << RSTC_ERSTL_LSB));
/* Invoke external reset. */
outr(RSTC_CR, RSTC_KEY | RSTC_EXTRST);
while ((inr(RSTC_SR) & RSTC_NRSTL) == 0);
/* If we have 10k/100n RC, we need to wait 25us (1200 cycles)
** for NRST becoming low. */
eNet_sam7X_Delay(250);
/* Wait until reset pin is released. */
while ((inr(RSTC_SR) & RSTC_NRSTL) == 0);
/* Due to the RC filter, the pin is rising very slowly. */
eNet_sam7X_Delay(25000);
outr(RSTC_MR, RSTC_KEY | rstcr_tmp);
}
int At91SpiSetCsDelay(unsigned int base, unsigned int dly)
{
outr(base + SPI_MR_OFF, (inr(base + SPI_MR_OFF) & ~SPI_DLYBCS) | ((dly << SPI_DLYBCS_LSB) & SPI_DLYBCS));
if (At91SpiGetCsDelay(base) != dly) {
return -1;
}
return 0;
}
/*!
* \brief Wait until all SPI bus transfers are done.
*
* \param node Specifies the SPI bus node.
* \param tmo Timeout in milliseconds. To disable timeout, set this
* parameter to NUT_WAIT_INFINITE.
*
* \return Always 0.
*/
int At91SpiBusWait(NUTSPINODE * node, uint32_t tmo)
{
while ((inr(node->node_bus->bus_base + SPI_SR_OFF) & SPI_RXBUFF) == 0) {
if (NutEventWait(&node->node_bus->bus_ready, tmo)) {
return -1;
}
}
return 0;
}
/*!
* \brief Send command to multimedia card.
*
* \param ifc Specifies the hardware interface.
* \param cmd Command code. See MMCMD_ macros.
* \param param Optional command parameter.
*/
static u_int At91MciTxCmd(MCIFC * ifc, u_int cmd, u_int param)
{
u_int sr;
u_int rl;
u_int i;
u_int wfs = MCI_CMDRDY;
#ifdef NUTDEBUG
printf("[MmcCmd %X", cmd);
#endif
outr(MCI_PTCR, PDC_TXTDIS | PDC_RXTDIS);
if ((cmd & MCI_TRCMD_START) != 0 && ifc->ifc_buff) {
outr(MCI_MR, (inr(MCI_MR) & ~MCI_BLKLEN) | (MMC_BLOCK_SIZE << MCI_BLKLEN_LSB) | MCI_PDCMODE);
outr(MCI_RPR, (u_int) ifc->ifc_buff);
outr(MCI_RCR, MMC_BLOCK_SIZE / 4);
outr(MCI_PTCR, PDC_RXTEN);
wfs = MCI_ENDRX;
ifc->ifc_buff = NULL;
} else {
outr(MCI_RCR, 0);
outr(MCI_RNCR, 0);
outr(MCI_TCR, 0);
outr(MCI_TNCR, 0);
}
outr(MCI_ARGR, param);
outr(MCI_CMDR, cmd);
while (((sr = inr(MCI_SR)) & wfs) == 0);
if ((cmd & MCI_RSPTYP) == MCI_RSPTYP_48) {
rl = 2;
} else if ((cmd & MCI_RSPTYP) == MCI_RSPTYP_136) {
rl = 4;
} else {
rl = 0;
}
for (i = 0; i < rl; i++) {
ifc->ifc_resp[i] = inr(MCI_RSPR);
}
#ifdef NUTDEBUG
printf("=%X]", sr);
#endif
return sr;
}
/*!
* \brief Toggle external hardware reset line.
*/
static void Sam9260ekReset(void)
{
/* Set reset pulse length to 250us, disable user reset. */
outr(RSTC_MR, RSTC_KEY | (2 << RSTC_ERSTL_LSB));
/* Invoke external reset. */
outr(RSTC_CR, RSTC_KEY | RSTC_EXTRST);
Sam9g45ekDelay(250);
/* Wait until reset pin is released. */
while ((inr(RSTC_SR) & RSTC_NRSTL) == 0);
Sam9g45ekDelay(25000);
}
/*!
* \brief Toggle external hardware reset line.
*/
static void MorphoqReset(void)
{
unsigned int mr;
/* Save initial configuration. */
mr = inr(RSTC_MR) & ~RSTC_KEY_MSK;
/* Set reset pulse length to 250us, disable user reset. */
outr(RSTC_MR, RSTC_KEY | (2 << RSTC_ERSTL_LSB));
/* Invoke external reset. */
outr(RSTC_CR, RSTC_KEY | RSTC_EXTRST);
/* If we have 10k/100n RC, we need to wait 25us (1200 cycles)
** for NRST becoming low. */
MorphoqDelay(250);
/* Wait until reset pin is released. */
while ((inr(RSTC_SR) & RSTC_NRSTL) == 0);
/* Due to the RC filter, the pin is rising very slowly. */
MorphoqDelay(25000);
/* Restore initial configuration. */
outr(RSTC_MR, RSTC_KEY | mr);
}
int At91SpiSetTxDelay(unsigned int base, unsigned int cs, unsigned int dly)
{
unsigned int csr = base + SPI_CSR0_OFF + cs * 4;
outr(csr, (inr(csr) & ~SPI_DLYBCT) | ((dly << SPI_DLYBCT_LSB) & SPI_DLYBCT));
if (At91SpiGetTxDelay(base, cs) != dly) {
return -1;
}
return 0;
}
/*!
* \brief PIOC interrupt service.
*/
static void PioIsrC(void *arg)
{
GPIO_VECTOR *vct = (GPIO_VECTOR *)arg;
unsigned int isr;
for (isr = inr(PIOC_ISR); isr; isr >>= 1, vct++) {
if ((isr & 1) != 0 && vct->iov_handler) {
(vct->iov_handler) (vct->iov_arg);
}
}
}
/*!
* \brief Configure the SPI operation mode.
*
* \param base SPI register base.
* \param cs Chip select line.
* \param mode Any of the following
* - SPIMF_MASTER Master mode.
* - SPIMF_PCSDEC Decoded chip selects.
* - SPIMF_MFDETECT Mode fault detection.
* - SPIMF_LOOPBACK Loopback mode.
* - SPIMF_SCKIAHI Clock is high when inactive.
* - SPIMF_CAPRISE Data captured on rising edge.
* - SPIMF_KEEPCS Chip select remains active after transfer.
*/
int At91SpiSetModeFlags(unsigned int base, unsigned int cs, uint32_t mode)
{
unsigned int mv;
mv = inr(base + SPI_MR_OFF) & ~(SPI_MSTR | SPI_PCSDEC | SPI_MODFDIS | SPI_LLB);
if (mode & SPIMF_MASTER) {
mv |= SPI_MSTR;
}
if (mode & SPIMF_PCSDEC) {
mv |= SPI_PCSDEC;
}
if (mode & SPIMF_MFDETECT) {
mv &= ~SPI_MODFDIS;
}
if (mode & SPIMF_LOOPBACK) {
mv |= SPI_LLB;
}
outr(base + SPI_MR_OFF, mv);
mv = inr(base + SPI_CSR0_OFF + cs * 4) & ~(SPI_CPOL | SPI_NCPHA | SPI_CSAAT);
if (mode & SPIMF_SCKIAHI) {
if (mode & SPIMF_CAPRISE) {
mv |= SPI_CPOL;
} else {
mv |= SPI_CPOL | SPI_NCPHA;
}
} else {
if (mode & SPIMF_CAPRISE) {
mv |= SPI_NCPHA;
}
}
if (mode & SPIMF_KEEPCS) {
mv |= SPI_CSAAT;
}
outr(base + SPI_CSR0_OFF + cs * 4, mv);
if (At91SpiGetModeFlags(base, cs) != mode) {
return -1;
}
return 0;
}
void TimerCounter0IrqEntry(void)
{
IRQ_ENTRY();
#ifdef NUT_PERFMON
sig_TC0.ir_count++;
#endif
dummy = inr(TC0_SR);
if (sig_TC0.ir_handler) {
(sig_TC0.ir_handler) (sig_TC0.ir_arg);
}
IRQ_EXIT();
}
/*!
* \brief Write value to an 8-bit power management register.
*
* \param reg PMM register to write to.
* \param val Value to write.
*
* \return 0 on success, -1 otherwise.
*/
static int PmmWriteReg(unsigned int reg, unsigned int val)
{
volatile int tmo;
outr(TWI_MMR, 0x22 << TWI_DADR_LSB);
outr(TWI_CR, TWI_START);
outr(TWI_THR, reg);
for (tmo = 0; (inr(TWI_SR) & TWI_TXRDY) == 0; tmo++) {
if (tmo > 100000) {
return -1;
}
}
outr(TWI_CR, TWI_STOP);
outr(TWI_THR, val);
for (tmo = 0; (inr(TWI_SR) & TWI_TXCOMP) == 0; tmo++) {
if (tmo > 100000) {
return -1;
}
}
return 0;
}
/*!
* \brief PIO interrupt service.
*/
static void PioIsrA(void *arg)
{
GPIO_VECTOR *vct = (GPIO_VECTOR *)arg;
unsigned int isr = inr(PIOA_ISR);
while (isr) {
if ((isr & 1) != 0 && vct->iov_handler) {
(vct->iov_handler) (vct->iov_arg);
}
isr >>= 1;
vct++;
}
}
