static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; /* FIXME: fix those values*/ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); }
static void mainboard_init(device_t dev) { struct southbridge_intel_i82801gx_config *config; device_t dev0, idedev; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3); /* If we're resuming from suspend, blink suspend LED */ dev0 = dev_find_slot(0, PCI_DEVFN(0,0)); if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC) ec_write(0x0c, 0xc7); idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1)); if (!(inb(DEFAULT_GPIOBASE + 0x0c) & 0x40)) { /* legacy I/O connected */ pmh7_ultrabay_power_enable(1); ec_write(0x0c, 0x84); } else if (idedev && idedev->chip_info && h8_ultrabay_device_present()) { config = idedev->chip_info; config->ide_enable_primary = 1; pmh7_ultrabay_power_enable(1); ec_write(0x0c, 0x84); } else { pmh7_ultrabay_power_enable(0); ec_write(0x0c, 0x04); } /* set dock status led */ ec_write(0x0c, 0x08); ec_write(0x0c, inb(0x164c) & 8 ? 0x89 : 0x09); }
static void mainboard_enable(device_t dev) { device_t dev0; u16 pmbase; dev->ops->init = mainboard_init; dev->ops->acpi_fill_ssdt_generator = fill_ssdt; pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), PMBASE) & 0xff80; printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase); outl(0, pmbase + SMI_EN); enable_lapic(); pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE, DEFAULT_GPIOBASE | 1); pci_write_config8(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_CNTL, 0x10); /* If we're resuming from suspend, blink suspend LED */ dev0 = dev_find_slot(0, PCI_DEVFN(0, 0)); if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC) ec_write(0x0c, 0xc7); install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_LFP, 2); }
static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = butterfly_onboard_smbios_data; dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); }
static void mainboard_enable(struct device *dev) { install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); #if CONFIG(GENERATE_SMBIOS_TABLES) dev->ops->get_smbios_data = mainboard_smbios_data; #endif }
static void mainboard_enable(device_t dev) { ec_setup(); /* LCD panel type is SIO GPIO40-43. It's controlled by a DIP switch but was always set to 4 while only values of 5 and 6 worked. */ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, (inb(0x60f) & 0x0f) + 1); /* We have no driver for the embedded controller since the firmware does most of the job. Hence, initialize keyboards here. */ pc_keyboard_init(); }
static void mainboard_enable(struct device *dev) { dev->ops->get_smbios_strings = mainboard_smbios_strings, install_intel_vga_int15_handler( GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); if (!acpi_is_wakeup_s3()) lenovo_s230u_ec_init(); }
static void mainboard_init(device_t dev) { device_t dev0, idedev, sdhci_dev; ec_clr_bit(0x03, 2); if (inb(0x164c) & 0x08) { ec_set_bit(0x03, 2); ec_write(0x0c, 0x88); } install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3); /* If we're resuming from suspend, blink suspend LED */ dev0 = dev_find_slot(0, PCI_DEVFN(0,0)); if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC) ec_write(0x0c, 0xc7); idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1)); if (idedev && idedev->chip_info && dock_ultrabay_device_present()) { struct southbridge_intel_i82801gx_config *config = idedev->chip_info; config->ide_enable_primary = 1; /* enable Ultrabay power */ outb(inb(0x1628) | 0x01, 0x1628); ec_write(0x0c, 0x84); } else { /* disable Ultrabay power */ outb(inb(0x1628) & ~0x01, 0x1628); ec_write(0x0c, 0x04); } /* Set SDHCI write protect polarity "SDWPPol" */ sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0); if (sdhci_dev) { if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) { /* unlock */ pci_write_config8(sdhci_dev, 0xf9, 0xfc); /* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */ pci_write_config8(sdhci_dev, 0xfa, 0x20); /* restore lock */ pci_write_config8(sdhci_dev, 0xf9, 0x00); } } }
static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); }
static void mainboard_enable(device_t dev) { install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 2); dev->ops->acpi_fill_ssdt_generator = fill_ssdt; }
static void mainboard_enable(struct device *dev) { install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_CRT, 0); }
static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); }
static void mainboard_init(device_t dev) { install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3); }
static void mainboard_enable(device_t dev) { install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); verb_setup(); }
static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); verb_setup(); }
static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = parrot_onboard_smbios_data; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); }
static void mainboard_enable(device_t dev) { u16 pmbase; printk(BIOS_SPEW, "starting SPI configuration\n"); /* Configure SPI. */ RCBA32(0x3800) = 0x07ff0500; RCBA32(0x3804) = 0x3f046008; RCBA32(0x3808) = 0x0058efc0; RCBA32(0x384c) = 0x92000000; RCBA32(0x3850) = 0x00000a0b; RCBA32(0x3858) = 0x07ff0500; RCBA32(0x385c) = 0x04ff0003; RCBA32(0x3860) = 0x00020001; RCBA32(0x3864) = 0x00000fff; RCBA32(0x3874) = 0; RCBA32(0x3890) = 0xf8400000; RCBA32(0x3894) = 0x143b5006; RCBA32(0x3898) = 0x05200302; RCBA32(0x389c) = 0x0601209f; RCBA32(0x38b0) = 0x00000004; RCBA32(0x38b4) = 0x03040002; RCBA32(0x38c0) = 0x00000007; RCBA32(0x38c8) = 0x00002005; RCBA32(0x38c4) = 0x00802005; RCBA32(0x3804) = 0x3f04e008; printk(BIOS_SPEW, "SPI configured\n"); int i; const u8 dmp[256] = { 0x00, 0x20, 0x00, 0x00, 0x00, 0x02, 0x89, 0xe4, 0x30, 0x00, 0x40, 0x14, 0x00, 0x00, 0x00, 0x11, 0x03, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0xf4, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x01, 0x04, 0x00, 0x08, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x42, 0x07, 0x09, 0x09, 0xf0, 0x00, 0x00, 0xf0, 0xa9, 0x00, 0x00, 0x06, 0x00, 0x00, 0xff, 0x00, 0x00, 0x01, 0x00, 0x04, 0xff, 0xff, 0x00, 0x00, 0x00, 0xb1, 0x00, 0x00, 0x00, 0x00, 0x04, 0x0b, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x28, 0x1b, 0x21, 0x00, 0x2c, 0x3b, 0x13, 0x00, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x5a, 0x57, 0x5c, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, 0x00, 0x00, 0x52, 0x10, 0x52, 0x10, 0x64, 0x00, 0x00, 0x00, 0x74, 0x30, 0x00, 0x60, 0x00, 0x00, 0xaf, 0x0b, 0x30, 0x45, 0x2e, 0x30, 0x38, 0x41, 0x43, 0x2e, 0x30, 0x31, 0x2e, 0x31, 0x36, 0x20, 0x00, 0x00, }; for (i = 0; i < 256; i++) ec_write (i, dmp[i]); pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), PMBASE) & 0xff80; printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase); outl(0, pmbase + SMI_EN); enable_lapic(); pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE, DEFAULT_GPIOBASE | 1); pci_write_config8(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_CNTL, 0x10); install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_LFP, 2); /* This sneaked in here, because EasyNote has no SuperIO chip. */ pc_keyboard_init(); verb_setup(); }