static int __init integrator_ap_timer_init_of(struct device_node *node) { const char *path; void __iomem *base; int err; int irq; struct clk *clk; unsigned long rate; struct device_node *pri_node; struct device_node *sec_node; base = of_io_request_and_map(node, 0, "integrator-timer"); if (IS_ERR(base)) return PTR_ERR(base); clk = of_clk_get(node, 0); if (IS_ERR(clk)) { pr_err("No clock for %pOFn\n", node); return PTR_ERR(clk); } clk_prepare_enable(clk); rate = clk_get_rate(clk); writel(0, base + TIMER_CTRL); err = of_property_read_string(of_aliases, "arm,timer-primary", &path); if (err) { pr_warn("Failed to read property\n"); return err; } pri_node = of_find_node_by_path(path); err = of_property_read_string(of_aliases, "arm,timer-secondary", &path); if (err) { pr_warn("Failed to read property\n"); return err; } sec_node = of_find_node_by_path(path); if (node == pri_node) /* The primary timer lacks IRQ, use as clocksource */ return integrator_clocksource_init(rate, base); if (node == sec_node) { /* The secondary timer will drive the clock event */ irq = irq_of_parse_and_map(node, 0); return integrator_clockevent_init(rate, base, irq); } pr_info("Timer @%p unused\n", base); clk_disable_unprepare(clk); return 0; }
/* * Set up timer(s). */ static void __init ap_init_timer(void) { u32 khz = TICKS_PER_uSEC * 1000; writel(0, TIMER0_VA_BASE + TIMER_CTRL); writel(0, TIMER1_VA_BASE + TIMER_CTRL); writel(0, TIMER2_VA_BASE + TIMER_CTRL); integrator_clocksource_init(khz); integrator_clockevent_init(khz); }
/* * Set up timer(s). */ static void __init ap_init_timer(void) { struct clk *clk; unsigned long rate; clk = clk_get_sys("ap_timer", NULL); BUG_ON(IS_ERR(clk)); clk_enable(clk); rate = clk_get_rate(clk); writel(0, TIMER0_VA_BASE + TIMER_CTRL); writel(0, TIMER1_VA_BASE + TIMER_CTRL); writel(0, TIMER2_VA_BASE + TIMER_CTRL); integrator_clocksource_init(rate); integrator_clockevent_init(rate); }
static void __init ap_of_timer_init(void) { struct device_node *node; const char *path; void __iomem *base; int err; int irq; struct clk *clk; unsigned long rate; clk = clk_get_sys("ap_timer", NULL); BUG_ON(IS_ERR(clk)); clk_prepare_enable(clk); rate = clk_get_rate(clk); err = of_property_read_string(of_aliases, "arm,timer-primary", &path); if (WARN_ON(err)) return; node = of_find_node_by_path(path); base = of_iomap(node, 0); if (WARN_ON(!base)) return; writel(0, base + TIMER_CTRL); integrator_clocksource_init(rate, base); err = of_property_read_string(of_aliases, "arm,timer-secondary", &path); if (WARN_ON(err)) return; node = of_find_node_by_path(path); base = of_iomap(node, 0); if (WARN_ON(!base)) return; irq = irq_of_parse_and_map(node, 0); writel(0, base + TIMER_CTRL); integrator_clockevent_init(rate, base, irq); }