/*---------------------------------------------------------------------------*/
PROCESS_THREAD(interrupt_sample_process, ev, data)
{
/* Any process must start with this. */
PROCESS_BEGIN();
interrupt_init(1, 1, 1, 1);
interrupt_enable(INT0);
interrupt_enable(INT1);
/* Register current process with INT0 & INT1*/
interrupt_register(INT0);
interrupt_register(INT1);
while(1) {
/* Wait for an event. */
PROCESS_WAIT_EVENT();
/* Got the interrupt event~ */
if (ev == PROCESS_EVENT_INTERRUPT) {
/* Check for the int_vect. */
if (INT0 == ((struct interrupt *)data)->int_vect) {
/* Got an INT0 interrupt. */
leds_toggle(LEDS_RED);
}
else if (INT1 == ((struct interrupt *)data)->int_vect) {
/* Got an INT1 interrupt. */
leds_toggle(LEDS_YELLOW);
interrupt_disable(INT0);
}
}
} // while (1)
/* Any process must end with this, even if it is never reached. */
PROCESS_END();
}
void cts_task(void)
{
enum cts_rc rc;
int i;
gpio_enable_interrupt(GPIO_CTS_IRQ1);
gpio_enable_interrupt(GPIO_CTS_IRQ2);
interrupt_enable();
for (i = 0; i < CTS_TEST_ID_COUNT; i++) {
clear_state();
sync();
rc = tests[i].run();
interrupt_enable();
CPRINTF("\n%s %d\n", tests[i].name, rc);
cflush();
}
CPRINTS("Interrupt test suite finished");
cflush();
while (1) {
watchdog_reload();
sleep(1);
}
}
int dma_setup() {
clock_gate_switch(DMAC0_CLOCKGATE, ON);
clock_gate_switch(DMAC1_CLOCKGATE, ON);
interrupt_install(DMAC0_INTERRUPT, dmaIRQHandler, 1);
interrupt_install(DMAC1_INTERRUPT, dmaIRQHandler, 2);
interrupt_enable(DMAC0_INTERRUPT);
interrupt_enable(DMAC1_INTERRUPT);
return 0;
}
static void do_set_display_mode(display_mode *dm)
{
uint32 bpp;
/* disable interrupts using the kernel driver */
interrupt_enable(false);
bpp = calcBitsPerPixel (dm->space);
voodoo_set_desktop_regs(bpp, dm);
/* enable interrupts using the kernel driver */
interrupt_enable(true);
si->fbc.bytes_per_row = (dm->virtual_width * bpp + 7) / 8;
}
/*
* Common interrupt handler.
*/
void
interrupt_handler(void)
{
uint32_t bits;
int vector, old_ipl, new_ipl;
/* Get interrupt source */
bits = ICU_IRQSTS;
for (vector = 0; vector < NIRQS; vector++) {
if (bits & (uint32_t)(1 << vector))
break;
}
if (vector == NIRQS)
goto out;
/* Adjust interrupt level */
old_ipl = irq_level;
new_ipl = ipl_table[vector];
if (new_ipl > old_ipl) /* Ignore spurious interrupt */
irq_level = new_ipl;
update_mask();
/* Dispatch interrupt */
interrupt_enable();
irq_handler(vector);
interrupt_disable();
/* Restore interrupt level */
irq_level = old_ipl;
update_mask();
out:
return;
}
static enum cts_rc timer_calibration_test(void)
{
/* Error margin: +/-2 msec (0.2% for one second) */
const int32_t margin = 2 * MSEC;
int32_t elapsed, delta;
timestamp_t t0, t1;
gpio_enable_interrupt(GPIO_CTS_NOTIFY);
interrupt_enable();
sync();
t0 = get_time();
/* Wait for interrupt */
task_wait_event(-1);
t1 = get_time();
elapsed = (int32_t)(t1.val - t0.val);
delta = elapsed - SECOND;
if (delta < -margin) {
CPRINTS("DUT clock runs too fast: %+d usec", delta);
return CTS_RC_FAILURE;
}
if (margin < delta) {
CPRINTS("DUT clock runs too slow: %+d usec", delta);
return CTS_RC_FAILURE;
}
return CTS_RC_SUCCESS;
}
int spi_setup()
{
int i;
for(i = 0; i < SPICount; i++)
{
// Only enable SPIs 1-3.
if(((0x7 >> i) & 1) == 0)
continue;
SPIRegisters *regs = &SPIRegs[i];
SPIStruct *data = &SPIData[i];
memset(data, 0, sizeof(*data));
data->registers = regs;
data->clockSource = NCLK;
clock_gate_switch(regs->gate, ON);
SET_REG(data->registers->control, 0);
interrupt_install(regs->irq, spi_irq_handler, i);
interrupt_enable(regs->irq);
}
return 0;
}
void alarm_update(){
// printf("!\n");
MYALARM *t;
TIME now;
interrupt_disable();
for(t=alarms;t<&alarms[MAXALARM];t++){
if(t->inuse == TRUE){
// printf("find the first next_timer\n");
next_timer =t;
break;
}
}
if(t == &alarms[MAXALARM]){
alarm(0);
// printf("just return?\n");
return ;
}
for(t=alarms;t<&alarms[MAXALARM];t++){
if(t->inuse == TRUE){
// printf("%d %d\n",t->time,t->declare_time);
fflush(0);
if((t->time + t->declare_time) <( next_timer->time + next_timer->declare_time)){
next_timer = t;
// printf("refresh\n");
}
}
}
time(&now);
alarm(0);
alarm(next_timer->time+next_timer->declare_time - now);
interrupt_enable();
}
void timer_init(int timer, void (*func)(void))
{
TIMER_COUNT_REG(timer) = 0;
TIMER_CONTROL_REG(timer) = 0x0040;
timer_callback[timer] = func;
interrupt_enable(INT_TIMER_0 + timer, timer_interrupt_table[timer]);
}
int event_setup() {
#if !defined(CONFIG_IPHONE_4) && !defined(CONFIG_IPAD)
// In our implementation, we set TicksPerSec when we setup the clock
// so we don't have to do it here
init_event_list();
Timers[EventTimer].handler2 = eventTimerHandler;
// Initialize the timer hardware for something that goes off once every 100 Hz.
// The handler for the timer will reset it so it's periodic
timer_init(EventTimer, TicksPerSec/100, 0, 0, 0, FALSE, FALSE, FALSE, FALSE, TRUE);
// Turn the timer on
timer_on_off(EventTimer, ON);
#else
RTCHasInit = TRUE;
init_event_list();
// SET_REG(TIMER_REGISTER_TICK, TIMER_STATE_MANUALUPDATE);
interrupt_install(TIMER_IRQ, eventTimerHandler, 0);
interrupt_enable(TIMER_IRQ);
#endif
return 0;
}
/*FUNCTION**********************************************************************
*
* Function Name : gpio_input_pin_init
* Description : Initialize one GPIO input pin used by board.
*
*END**************************************************************************/
void gpio_input_pin_init(const gpio_input_pin_user_config_t *inputPin)
{
/* Get actual port and pin number.*/
uint32_t gpioInstance = GPIO_EXTRACT_PORT(inputPin->pinName);
uint32_t pin = GPIO_EXTRACT_PIN(inputPin->pinName);
/* Un-gate port clock*/
clock_manager_set_gate(kClockModulePORT, gpioInstance, true);
/* Set current pin as digital input.*/
gpio_hal_set_pin_direction(gpioInstance, pin, kGpioDigitalInput);
/* Configure GPIO input features. */
port_hal_configure_pull(gpioInstance, pin, inputPin->config.isPullEnable);
port_hal_pull_select(gpioInstance, pin, inputPin->config.pullSelect);
port_hal_configure_passive_filter(gpioInstance, pin,
inputPin->config.isPassiveFilterEnabled);
#if FSL_FEATURE_PORT_HAS_DIGITAL_FILTER
port_hal_configure_digital_filter(gpioInstance, pin,
inputPin->config.isDigitalFilterEnabled);
#endif
port_hal_configure_pin_interrupt(gpioInstance, pin, inputPin->config.interrupt);
/* Configure NVIC */
if ((inputPin->config.interrupt) && (gpio_irq_ids[gpioInstance]))
{
/* Enable GPIO interrupt.*/
interrupt_enable(gpio_irq_ids[gpioInstance]);
}
}
int main(void) {
// We'll use UART0, so set it up
PIN0_PORT_PCR = PORT_PCR_MUX(3);
PIN1_PORT_PCR = PORT_PCR_MUX(3);
uart_setup(UART0_BASE_PTR, 115200);
uart_putline(UART0_BASE_PTR, "\r\nHello there!");
// Set direction to output
PIN_GPIO_PDDR( BLINK_PIN ) = (1 << PIN_PIN( BLINK_PIN ));
// Select the GPIO function on the port
PIN_PORT_PCR( BLINK_PIN ) = PORT_PCR_MUX(1) | PORT_PCR_SRE_MASK | PORT_PCR_DSE_MASK;
// Let's also systick!
interrupt_enable();
SYST_RVR = 7200000;//(SYST_CALIB & SysTick_CALIB_TENMS_MASK) * 10;
SYST_CSR = SysTick_CSR_ENABLE_MASK | SysTick_CSR_TICKINT_MASK | SysTick_CSR_CLKSOURCE_MASK;
while (1) {
pin_gpio_set_high(BLINK_PIN);
uart_putchar(UART0_BASE_PTR, 'H');
delay(500);
pin_gpio_set_low(BLINK_PIN);
uart_putchar(UART0_BASE_PTR, 'L');
delay(500);
}
}
static int key_led_drv_open(struct inode *inode, struct file *file)
{
/* 配置gpkey 0,1为输入引脚 */
/* 配置gpled 0,1为输出引脚 */
int result;
/*AXI-GPIO初始化*/
*(gpkey+GPIO_CHAN1_TSR) = (1<<0) | (1<<1);
*(gpled+GPIO_CHAN1_TSR) = (0<<0) | (0<<1);
printk("debug0 read GPIO_CHAN1_TSR val = %lu\n",*(gpkey+GPIO_CHAN1_TSR));
printk("debug0 read gpkey = %lu\n",*(gpkey));
interrupt_enable();
/*注册中断*/
result = request_irq(IRQ_NUMBER, buttons_irq, IRQ_TYPE_EDGE_RISING, "key_irq", NULL);
if (result < 0)
printk("unable to request IRQ%d : %d\n", IRQ_NUMBER, result);
else
printk("request IRQ%d success : %d\n", IRQ_NUMBER, result);
*gpled = 0x02;
return 0;
}
/*
************************************************************************************************************************
* Release block memory from pool
*
* Description: This function is called to release memory from pool
*
* Arguments : block_ptr is the address want to return to memory pool.
* ---------------------
*
* Returns RAW_SUCCESS: raw os return success
* Note(s) This methods will not cause fragmention.
*
*
************************************************************************************************************************
*/
U16 block_release(MEM_POOL *pool_ptr, void *block_ptr)
{
U8 *work_ptr;
if (! (block_ptr && pool_ptr)) {
return FALSE;
}
U32 cpu_sr = interrupt_disable();
work_ptr = ((U8 *) block_ptr);
/* Put the block back in the available list. */
*((U8 **)work_ptr) = pool_ptr->block_pool_available_list;
/* Adjust the head pointer. */
pool_ptr->block_pool_available_list = work_ptr;
/* Increment the count of available blocks. */
pool_ptr->block_pool_available++;
interrupt_enable(cpu_sr);
/* Return completion status. */
return TRUE;
}
static void do_print_later(void)
{
int lines_per_loop = 32; /* too much at once fails */
int copy_of_stuff_in;
int copy_of_overflow;
interrupt_disable();
copy_of_stuff_in = stuff_in;
copy_of_overflow = stuff_overflow;
stuff_overflow = 0;
interrupt_enable();
if (copy_of_overflow)
ccprintf("*** WARNING: %d MESSAGES WERE LOST ***\n",
copy_of_overflow);
while (lines_per_loop && stuff_out != copy_of_stuff_in) {
ccprintf("at %.6ld: ", stuff_to_print[stuff_out].t);
ccprintf(stuff_to_print[stuff_out].fmt,
stuff_to_print[stuff_out].a0,
stuff_to_print[stuff_out].a1,
stuff_to_print[stuff_out].a2,
stuff_to_print[stuff_out].a3,
stuff_to_print[stuff_out].a4);
ccprintf("\n");
stuff_out = (stuff_out + 1) % MAX_ENTRIES;
lines_per_loop--;
}
}
MYALARM *alarm_declare(int tm,MYALARM *t){
if(tm<0 || tm>MAXTIME){
printf("error time in alarm_declare\n");
return NULL;
}
MYALARM *temp;
interrupt_disable();
for(t=alarms;t<&alarms[MAXALARM];t++){
if(t->inuse == FALSE)
break;
}
if(t == &alarms[MAXALARM]){
printf("alarms is full now,please try later\n");
return NULL;
}
t->inuse=TRUE;
t->time = (time_t)tm;
time(&t->declare_time);
alarm_update();
interrupt_enable();
return t;
}
/*
* method: FIFO or LIFO;
*/
void msg_put(QUEUE *entry, MSG *msg, U8 method)
{
if ((entry == NULL) || (msg == NULL) || (entry->count > entry->length))
OS_LOG("Message put in queue error\n");
TCB *tcb_tmp;
U32 cpu_sr = interrupt_disable();
/*Check tasks block on the message queue list*/
if (!is_list_last(&entry->list)) {
tcb_tmp = list_entry(entry->list.next, TCB, list);
msg_block_queue_delete(tcb_tmp);
prio_ready_queue_insert_head(tcb_tmp);
}
if (entry->count == entry->length) {
/*XXX Todo: if queue is full, block the task*/
// block_queue(new_task);
OS_LOG("Message queue overflow\n");
}else
entry->count++;
if (method == FIFO)
list_insert_behind(&entry->msg_head, &msg->list);
else
/*Last come first server.*/
list_insert_spec(&entry->msg_head, &msg->list);
interrupt_enable(cpu_sr);
/*Maybe don't schedule?*/
schedule();
}
void usb_plug_evt(bool plugged, void *param)
{
if (plugged) {
if (usb_initialized == 0) {
usb_driver_intf->usb_connect();
usb_driver_intf->usb_driver_init(SOC_USB_BASE_ADDR);
f.function_init(f.priv, f.alt_strings);
interrupt_enable(SOC_USB_INTERRUPT);
usb_initialized = 1;
} else {
pr_error(LOG_MODULE_USB,
"Trying to init already initialized driver");
}
} else {
if (usb_initialized == 1) {
interrupt_disable(SOC_USB_INTERRUPT);
usb_driver_intf->usb_disconnect();
usb_initialized = 0;
int ret = garbage_collect();
if (ret) {
pr_error(LOG_MODULE_USB,
"Mem leak avoided (idx: %d)", ret);
}
} else {
pr_error(LOG_MODULE_USB,
"Trying to free already freed driver");
}
}
}
void timer_delete(struct timer *timer)
{
unsigned long flags = interrupt_disable();
if (timer->i != TIMER_INVALID_INDEX)
__timer_delete(timer);
interrupt_enable(flags);
}
//I2C Control Register : I2CxCON
void reset_all_config(){
I2C4CON &= 0x00010000; //ON以外を0でフィル
interrupt_enable(false);
interrupt_flag(false);
interrupt_function(0);
}
//control register : TxCON
void reset_all_config(){
T7CON &= 0x00010000; //ON以外を0でフィル
count(0);
interrupt_enable(false);
interrupt_function(0);
}
int gpio_setup() {
int i;
GPIORegs = (GPIORegisters*) GPIO;
for(i = 0; i < GPIO_NUMINTGROUPS; i++) {
// writes to all the interrupt status register to acknowledge and discard any pending
SET_REG(GPIOIC + GPIO_INTSTAT + (i * 0x4), GPIO_INTSTAT_RESET);
// disable all interrupts
SET_REG(GPIOIC + GPIO_INTEN + (i * 0x4), GPIO_INTEN_RESET);
}
memset(InterruptGroups, 0, sizeof(InterruptGroups));
interrupt_install(0x21, gpio_handle_interrupt, 0);
interrupt_install(0x20, gpio_handle_interrupt, 1);
interrupt_install(0x1f, gpio_handle_interrupt, 2);
interrupt_install(0x03, gpio_handle_interrupt, 3);
interrupt_install(0x02, gpio_handle_interrupt, 4);
interrupt_install(0x01, gpio_handle_interrupt, 5);
interrupt_install(0x00, gpio_handle_interrupt, 6);
interrupt_enable(0x21);
interrupt_enable(0x20);
interrupt_enable(0x1f);
interrupt_enable(0x03);
interrupt_enable(0x02);
interrupt_enable(0x01);
interrupt_enable(0x00);
clock_gate_switch(GPIO_CLOCKGATE, ON);
return 0;
}
int usb_start(USBEnumerateHandler hEnumerate, USBStartHandler hStart) {
enumerateHandler = hEnumerate;
startHandler = hStart;
currentlySending = 0xFF;
if(txQueue == NULL)
txQueue = createRingBuffer(TX_QUEUE_LEN);
initializeDescriptors();
if(controlSendBuffer == NULL)
controlSendBuffer = memalign(DMA_ALIGN, CONTROL_SEND_BUFFER_LEN);
if(controlRecvBuffer == NULL)
controlRecvBuffer = memalign(DMA_ALIGN, CONTROL_RECV_BUFFER_LEN);
SET_REG(USB + GAHBCFG, GAHBCFG_DMAEN | GAHBCFG_BSTLEN_INCR8 | GAHBCFG_MASKINT);
SET_REG(USB + GUSBCFG, GUSBCFG_PHYIF16BIT | GUSBCFG_SRPENABLE | GUSBCFG_HNPENABLE | ((5 & GUSBCFG_TURNAROUND_MASK) << GUSBCFG_TURNAROUND_SHIFT));
SET_REG(USB + DCFG, DCFG_HISPEED); // some random setting. See specs
SET_REG(USB + DCFG, GET_REG(USB + DCFG) & ~(DCFG_DEVICEADDRMSK));
InEPRegs[0].control = USB_EPCON_ACTIVE;
OutEPRegs[0].control = USB_EPCON_ACTIVE;
SET_REG(USB + GRXFSIZ, RX_FIFO_DEPTH);
SET_REG(USB + GNPTXFSIZ, (TX_FIFO_DEPTH << GNPTXFSIZ_DEPTH_SHIFT) | TX_FIFO_STARTADDR);
int i;
for(i = 0; i < USB_NUM_ENDPOINTS; i++) {
InEPRegs[i].interrupt = USB_EPINT_INEPNakEff | USB_EPINT_INTknEPMis | USB_EPINT_INTknTXFEmp
| USB_EPINT_TimeOUT | USB_EPINT_AHBErr | USB_EPINT_EPDisbld | USB_EPINT_XferCompl;
OutEPRegs[i].interrupt = USB_EPINT_OUTTknEPDis
| USB_EPINT_SetUp | USB_EPINT_AHBErr | USB_EPINT_EPDisbld | USB_EPINT_XferCompl;
InEPRegs[i].control = (InEPRegs[i].control & ~(DCTL_NEXTEP_MASK << DCTL_NEXTEP_SHIFT));
}
SET_REG(USB + GINTMSK, GINTMSK_OTG | GINTMSK_SUSPEND | GINTMSK_RESET | GINTMSK_INEP | GINTMSK_OEP | GINTMSK_DISCONNECT);
SET_REG(USB + DAINTMSK, DAINTMSK_ALL);
SET_REG(USB + DOEPMSK, USB_EPINT_XferCompl | USB_EPINT_SetUp | USB_EPINT_Back2BackSetup);
SET_REG(USB + DIEPMSK, USB_EPINT_XferCompl | USB_EPINT_AHBErr | USB_EPINT_TimeOUT);
InEPRegs[0].interrupt = USB_EPINT_ALL;
OutEPRegs[0].interrupt = USB_EPINT_ALL;
SET_REG(USB + DCTL, DCTL_PROGRAMDONE + DCTL_CGOUTNAK + DCTL_CGNPINNAK);
udelay(USB_PROGRAMDONE_DELAYUS);
SET_REG(USB + GOTGCTL, GET_REG(USB + GOTGCTL) | GOTGCTL_SESSIONREQUEST);
receiveControl(controlRecvBuffer, sizeof(USBSetupPacket));
change_state(USBPowered);
interrupt_enable(USB_INTERRUPT);
return 0;
}
/**
* Initiates transmission of all bytes within the specified FIFO via SPI
*/
void spi_transmit_fifo(fifo_t* buffer)
{
// if (spi_still_transmitting_fifo(my_spi))
// return;
spi_buffer = buffer;
interrupt_enable(INTERRUPT_SPI);
spi_interrupt_upon_READY_enable(my_spi);
spi_enable(my_spi);
}
void timer_init(void)
{
g_ticks = 0;
rcc_enable(TIMER_RCCDEV);
/* Configure the PPM input pin for input capture. */
pin_enable(PPM_PIN);
pin_set_af(PPM_PIN, TIMER_PPM_PIN_AF);
pin_set_pupd(PPM_PIN, PIN_PUPD_UP);
pin_set_mode(PPM_PIN, PIN_MODE_AF);
#if 0
/* Configure the debugger to freeze TIM1 when the core is halted. */
DBGMCU->APB2FZ |= DBGMCU_APB1_FZ_DBG_TIM1_STOP;
#endif
TIMER_DEV->CR1 = 0;
TIMER_DEV->CR2 = 0;
TIMER_DEV->SMCR = 0;
TIMER_DEV->DIER = TIM_DIER_UIE | DIER_PPM;
TIMER_DEV->CCER = 0;
TIMER_DEV->CCMR1 = CCMR1_PPM;
TIMER_DEV->CCMR2 = CCMR2_PPM;
TIMER_DEV->CCER = CCER_PPM;
TIMER_DEV->CNT = 0;
TIMER_DEV->PSC = TIMER_PRESCALAR;
TIMER_DEV->ARR = 0xFFFF;
#if defined(TIMER_IRQ) /* single IRQ timer */
interrupt_set_priority(TIMER_IRQ, TIMER_IRQ_PRIORITY);
interrupt_enable(TIMER_IRQ);
#else /* multi-IRQ timer */
interrupt_set_priority(TIMER_UP_IRQ, TIMER_IRQ_PRIORITY);
interrupt_set_priority(TIMER_CC_IRQ, TIMER_IRQ_PRIORITY);
interrupt_enable(TIMER_UP_IRQ);
interrupt_enable(TIMER_CC_IRQ);
#endif
TIMER_DEV->CR1 |= TIM_CR1_CEN;
}
void timer_add(struct timer *timer)
{
size_t i;
unsigned long flags = interrupt_disable();
assert(timer_context.n < ARRAY_SIZE(timer_context.heap));
i = timer_context.n++;
timer_context.heap[i] = timer;
timer_context.heap[i]->i = i;
heap_pull_up(i);
interrupt_enable(flags);
}
int spi_setup() {
clock_gate_switch(SPI0_CLOCKGATE, ON);
clock_gate_switch(SPI1_CLOCKGATE, ON);
clock_gate_switch(SPI2_CLOCKGATE, ON);
memset(spi_info, 0, sizeof(SPIInfo) * NUM_SPIPORTS);
int i;
for(i = 0; i < NUM_SPIPORTS; i++) {
spi_info[i].clockSource = NCLK;
SET_REG(SPIRegs[i].control, 0);
}
interrupt_install(SPI0_IRQ, spiIRQHandler, 0);
interrupt_install(SPI1_IRQ, spiIRQHandler, 1);
interrupt_install(SPI2_IRQ, spiIRQHandler, 2);
interrupt_enable(SPI0_IRQ);
interrupt_enable(SPI1_IRQ);
interrupt_enable(SPI2_IRQ);
return 0;
}
uint8_t lpc_sib_read_reg(uint8_t io_offset, uint8_t index_value)
{
uint8_t data_value;
/* Disable interrupts */
interrupt_disable();
/* Lock host CFG module */
SET_BIT(NPCX_LKSIOHA, NPCX_LKSIOHA_LKCFG);
/* Enable Core-to-Host Modules Access */
SET_BIT(NPCX_SIBCTRL, NPCX_SIBCTRL_CSAE);
/* Enable Core access to CFG module */
SET_BIT(NPCX_CRSMAE, NPCX_CRSMAE_CFGAE);
/* Verify Core read/write to host modules is not in progress */
while (IS_BIT_SET(NPCX_SIBCTRL, NPCX_SIBCTRL_CSRD))
;
while (IS_BIT_SET(NPCX_SIBCTRL, NPCX_SIBCTRL_CSWR))
;
/* Specify the io_offset A0 = 0. the index register is accessed */
NPCX_IHIOA = io_offset;
/* Write the data. This starts the write access to the host module */
NPCX_IHD = index_value;
/* Wait while Core write operation is in progress */
while (IS_BIT_SET(NPCX_SIBCTRL, NPCX_SIBCTRL_CSWR))
;
/* Specify the io_offset A0 = 1. the data register is accessed */
NPCX_IHIOA = io_offset+1;
/* Start a Core read from host module */
SET_BIT(NPCX_SIBCTRL, NPCX_SIBCTRL_CSRD);
/* Wait while Core read operation is in progress */
while (IS_BIT_SET(NPCX_SIBCTRL, NPCX_SIBCTRL_CSRD))
;
/* Read the data */
data_value = NPCX_IHD;
/* Disable Core access to CFG module */
CLEAR_BIT(NPCX_CRSMAE, NPCX_CRSMAE_CFGAE);
/* Disable Core-to-Host Modules Access */
CLEAR_BIT(NPCX_SIBCTRL, NPCX_SIBCTRL_CSAE);
/* unlock host CFG module */
CLEAR_BIT(NPCX_LKSIOHA, NPCX_LKSIOHA_LKCFG);
/* Enable interrupts */
interrupt_enable();
return data_value;
}
void Curie_I2S::enableInterrupts()
{
uint32_t int_i2s_mask = *I2S_MASK_INT;
int_i2s_mask &= 0xFFFFFEFF;
*I2S_MASK_INT = int_i2s_mask;
uint32_t i2s_cid_ctrl = *I2S_CID_CTRL;
//i2s_cid_ctrl |= 0x87008000;
i2s_cid_ctrl |= 0x00008000;
*I2S_CID_CTRL = i2s_cid_ctrl;
interrupt_disable(IRQ_I2S_INTR);
interrupt_connect(IRQ_I2S_INTR , &i2sInterruptHandler);
interrupt_enable(IRQ_I2S_INTR);
}
static error_t ctrlc_open (device_handle_t _handle, open_mode_t _mode)
{
ctrlc_handle_t handle = (ctrlc_handle_t)_handle;
UNUSED (_mode);
if (handle->is_opened_) {
return ERROR_T (ERROR_CTRLC_OPEN_OPENED);
}
handle->is_opened_ = true;
interrupt_enable (_handle->interrupt_vector_);
console_print ("\nInfo: press Ctrl+C to terminate!\n");
return 0;
}
