static bool lapic_tmr_init(tmr_cb_t master) {
if(intr_state())
fatal("interrupts may not be enabled in lapic_tmr_init()!\n");
_master = master;
// fastest possible rate: 0xB (1011) -> FSB tick rate. on modern
// systems, this should allow near nanoseconds resolution.
APIC_REG(APIC_REG_DIVIDE_CONFIG) = 0xB;
uint8_t old_rate = rtc_set_rate(RTC_RATE_128HZ);
rtc_calibrate(lapic_tmr_calibrate);
// enable interrupts for this to work, disable the again afterwards.
intr_enable(true);
// wait for calibration to finish.
while(!_lapic_hz)
asm volatile("hlt");
intr_disable();
rtc_set_rate(old_rate);
info("local apic timer calibrated to %ld hz\n", _lapic_hz);
intr_add(IRQ_LAPIC_TIMER, lapic_tmr_handler);
APIC_REG(APIC_REG_LVT_TIMER) = IRQ_LAPIC_TIMER;
return true;
}
void sched_init() {
if(intr_state())
fatal("interrupts may not be enabled in sched_init()\n");
spl_init(&_sched_lock);
memset(_sched_queues, 0, sizeof(_sched_queues));
}
void sched_init() {
if(intr_state())
fatal("interrupts may not be enabled in sched_init()\n");
spl_init(&_sched_lock);
memset(_sched_queues, 0, sizeof(_sched_queues));
intr_add(SYSC_INTERRUPT, sched_syscall_handler);
}
