pcireg_t irongate_conf_read(void *ipv, pcitag_t tag, int offset) { int d; /* * The AMD 751 appears in PCI configuration space, but * that is ... counter-intuitive to the way we normally * attach PCI-Host bridges on the Alpha. So, filter out * the AMD 751 device here. We provide a private entry * point for getting at it from machdep code. */ irongate_decompose_tag(ipv, tag, NULL, &d, NULL); if (d == IRONGATE_PCIHOST_DEV && offset == PCI_ID_REG) return ((pcireg_t) -1); return (irongate_conf_read0(ipv, tag, offset)); }
/* * Set up the chipset's function pointers. */ void irongate_init(struct irongate_config *icp, int mallocsafe) { pcitag_t tag; pcireg_t reg; icp->ic_mallocsafe = mallocsafe; /* * Set up PCI configuration space; we can only read the * revision info through configuration space. */ irongate_pci_init(&icp->ic_pc, icp); #if 0 alpha_pci_chipset = &icp->ic_pc; #endif tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0); /* Read the revision. */ reg = irongate_conf_read0(icp, tag, PCI_CLASS_REG); icp->ic_rev = PCI_REVISION(reg); if (icp->ic_initted == 0) { /* Don't do these twice, since they set up extents. */ icp->ic_iot = irongate_bus_io_init(icp); icp->ic_memt = irongate_bus_mem_init(icp); #if 0 /* Only one each PCI I/O and MEM window. */ alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1; alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1; alpha_bus_get_window = irongate_bus_get_window; #endif } icp->ic_initted = 1; }