void sh_css_sp_init_pipeline(struct sh_css_pipeline *me, enum ia_css_pipe_id id, uint8_t pipe_num, bool preview_mode, bool low_light, bool xnr, bool two_ppc, bool continuous, bool offline, bool input_needs_raw_binning, enum sh_css_pipe_config_override copy_ovrd, enum ia_css_input_mode input_mode, const mipi_port_ID_t port_id) { /* Get first stage */ struct sh_css_pipeline_stage *stage; struct sh_css_binary *first_binary = me->stages->binary; unsigned num; enum ia_css_pipe_id pipe_id = id; unsigned int thread_id; uint8_t if_config_index; if (input_mode == IA_CSS_INPUT_MODE_SENSOR || input_mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { if_config_index = (uint8_t) (port_id - MIPI_PORT0_ID); } else if (input_mode == IA_CSS_INPUT_MODE_MEMORY){ if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; } else if_config_index = 0x0; sh_css_query_sp_thread_id(pipe_num, &thread_id); memset(&sh_css_sp_group.pipe[thread_id], 0, sizeof(struct sh_css_sp_pipeline)); /* Count stages */ for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { stage->stage_num = num; sh_css_debug_pipe_graph_dump_stage(stage, id); } me->num_stages = num; if (first_binary != NULL) { /* Init pipeline data */ sh_css_sp_init_group(two_ppc, first_binary->input_format, offline, if_config_index); /* for Capture, do we need to add more modes like */ if (continuous && (first_binary->info->mode == SH_CSS_BINARY_MODE_PREVIEW || first_binary->info->mode == SH_CSS_BINARY_MODE_PRIMARY)) { #if 0 sh_css_sp_start_raw_copy(first_binary, first_args->cc_frame, two_ppc, input_needs_raw_binning, copy_ovrd); sh_css_debug_pipe_graph_dump_sp_raw_copy(first_args->cc_frame); #endif } } /* if (first_binary != NULL) */ /* Init stage data */ sh_css_init_host2sp_frame_data(); sh_css_sp_group.pipe[thread_id].num_stages = 0; sh_css_sp_group.pipe[thread_id].pipe_id = pipe_id; sh_css_sp_group.pipe[thread_id].thread_id = thread_id; sh_css_sp_group.pipe[thread_id].pipe_num = pipe_num; sh_css_sp_group.pipe[thread_id].input_system_mode = (uint32_t)input_mode; sh_css_sp_group.pipe[thread_id].port_id = port_id; sh_css_sp_group.pipe[thread_id].dvs_frame_delay = (uint32_t)me->dvs_frame_delay; /* TODO: next indicates from which queues parameters need to be sampled, needs checking/improvement */ if (sh_css_pipe_uses_params(me)) { sh_css_sp_group.pipe[thread_id].pipe_config = SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id; } /* For continuous use-cases, SP copy is responsible for sampling the * parameters */ if (continuous) sh_css_sp_group.pipe[thread_id].pipe_config = 0; for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { sh_css_sp_group.pipe[thread_id].num_stages++; if (is_sp_stage(stage)) { sp_init_sp_stage(stage, pipe_num, two_ppc, input_needs_raw_binning, copy_ovrd, if_config_index); } else { sp_init_stage(stage, pipe_num, num, preview_mode, low_light, xnr, if_config_index); } store_sp_stage_data(pipe_id, pipe_num, num); } store_sp_group_data(); }
void sh_css_sp_init_pipeline(struct ia_css_pipeline *me, enum ia_css_pipe_id id, uint8_t pipe_num, bool xnr, bool two_ppc, bool continuous, bool offline, unsigned int required_bds_factor, enum sh_css_pipe_config_override copy_ovrd, enum ia_css_input_mode input_mode, const struct ia_css_metadata_config *md_config, const struct ia_css_metadata_info *md_info #if !defined(IS_ISP_2500_SYSTEM) , const mipi_port_ID_t port_id #endif ) { /* Get first stage */ struct ia_css_pipeline_stage *stage = NULL; struct ia_css_binary *first_binary = NULL; unsigned num; enum ia_css_pipe_id pipe_id = id; unsigned int thread_id; uint8_t if_config_index, tmp_if_config_index; assert(me != NULL); #if !defined(HAS_NO_INPUT_SYSTEM) assert(me->stages != NULL); first_binary = me->stages->binary; if (input_mode == IA_CSS_INPUT_MODE_SENSOR || input_mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { assert (port_id < N_MIPI_PORT_ID); if (port_id >= N_MIPI_PORT_ID) /* should not happen but KW does not know */ return; /* we should be able to return an error */ if_config_index = (uint8_t) (port_id - MIPI_PORT0_ID); } else if (input_mode == IA_CSS_INPUT_MODE_MEMORY){ if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; } else if_config_index = 0x0; #else (void)input_mode; if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; #endif ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); memset(&sh_css_sp_group.pipe[thread_id], 0, sizeof(struct sh_css_sp_pipeline)); /* Count stages */ for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { stage->stage_num = num; ia_css_debug_pipe_graph_dump_stage(stage, id); } me->num_stages = num; if (first_binary != NULL) { /* Init pipeline data */ sh_css_sp_init_group(two_ppc, first_binary->input_format, offline, if_config_index); } /* if (first_binary != NULL) */ #if defined(USE_INPUT_SYSTEM_VERSION_2401) /* Signal the host immediately after start for SP_ISYS_COPY only */ if ((me->num_stages == 1) && me->stages && (me->stages->sp_func == IA_CSS_PIPELINE_ISYS_COPY)) sh_css_sp_group.config.no_isp_sync = true; #endif /* Init stage data */ sh_css_init_host2sp_frame_data(); sh_css_sp_group.pipe[thread_id].num_stages = 0; sh_css_sp_group.pipe[thread_id].pipe_id = pipe_id; sh_css_sp_group.pipe[thread_id].thread_id = thread_id; sh_css_sp_group.pipe[thread_id].pipe_num = pipe_num; sh_css_sp_group.pipe[thread_id].num_execs = me->num_execs; sh_css_sp_group.pipe[thread_id].required_bds_factor = required_bds_factor; #if !defined(HAS_NO_INPUT_SYSTEM) sh_css_sp_group.pipe[thread_id].input_system_mode = (uint32_t)input_mode; sh_css_sp_group.pipe[thread_id].port_id = port_id; #endif sh_css_sp_group.pipe[thread_id].dvs_frame_delay = (uint32_t)me->dvs_frame_delay; /* TODO: next indicates from which queues parameters need to be sampled, needs checking/improvement */ if (ia_css_pipeline_uses_params(me)) { sh_css_sp_group.pipe[thread_id].pipe_config = SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id; } /* For continuous use-cases, SP copy is responsible for sampling the * parameters */ if (continuous) sh_css_sp_group.pipe[thread_id].pipe_config = 0; sh_css_sp_group.pipe[thread_id].inout_port_config = me->inout_port_config; #if defined (SH_CSS_ENABLE_METADATA) if (md_info != NULL && md_info->size > 0) { sh_css_sp_group.pipe[thread_id].metadata.width = md_info->resolution.width; sh_css_sp_group.pipe[thread_id].metadata.height = md_info->resolution.height; sh_css_sp_group.pipe[thread_id].metadata.stride = md_info->stride; sh_css_sp_group.pipe[thread_id].metadata.size = md_info->size; ia_css_isys_convert_stream_format_to_mipi_format( md_config->data_type, MIPI_PREDICTOR_NONE, &sh_css_sp_group.pipe[thread_id].metadata.format); } #else (void)md_config; (void)md_info; #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_sp_init_pipeline pipe_id %d port_config %08x\n",pipe_id,sh_css_sp_group.pipe[thread_id].inout_port_config); for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { sh_css_sp_group.pipe[thread_id].num_stages++; if (is_sp_stage(stage)) { sp_init_sp_stage(stage, pipe_num, two_ppc, copy_ovrd, if_config_index); } else { if ((stage->stage_num != 0) || SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(me->inout_port_config)) tmp_if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; else tmp_if_config_index = if_config_index; sp_init_stage(stage, pipe_num, xnr, tmp_if_config_index); } store_sp_stage_data(pipe_id, pipe_num, num); } sh_css_sp_group.pipe[thread_id].pipe_config |= (uint32_t) (me->acquire_isp_each_stage << IA_CSS_ACQUIRE_ISP_POS); store_sp_group_data(); }