static void __init pluto_uart_init(void)
{
struct clk *c;
int i;
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
if (IS_ERR_OR_NULL(c)) {
pr_err("Not able to get the clock for %s\n",
uart_parent_clk[i].name);
continue;
}
uart_parent_clk[i].parent_clk = c;
uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
}
pluto_uart_pdata.parent_clk_list = uart_parent_clk;
pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
pluto_loopback_uart_pdata.parent_clk_count =
ARRAY_SIZE(uart_parent_clk);
pluto_loopback_uart_pdata.is_loopback = true;
tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs())
uart_debug_init();
platform_add_devices(pluto_uart_devices,
ARRAY_SIZE(pluto_uart_devices));
}
static void __init whistler_uart_init(void)
{
int i;
struct clk *c;
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
if (IS_ERR_OR_NULL(c)) {
pr_err("Not able to get the clock for %s\n",
uart_parent_clk[i].name);
continue;
}
uart_parent_clk[i].parent_clk = c;
uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
}
whistler_uart_pdata.parent_clk_list = uart_parent_clk;
whistler_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
tegra_uarta_device.dev.platform_data = &whistler_uart_pdata;
tegra_uartb_device.dev.platform_data = &whistler_uart_pdata;
tegra_uartc_device.dev.platform_data = &whistler_uart_pdata;
if (!is_tegra_debug_uartport_hs())
uart_debug_init();
platform_add_devices(whistler_uart_devices,
ARRAY_SIZE(whistler_uart_devices));
}
static void __init ardbeg_uart_init(void)
{
#ifndef CONFIG_USE_OF
tegra_uarta_device.dev.platform_data = &ardbeg_uarta_pdata;
tegra_uartb_device.dev.platform_data = &ardbeg_uartb_pdata;
tegra_uartc_device.dev.platform_data = &ardbeg_uartc_pdata;
platform_add_devices(ardbeg_uart_devices,
ARRAY_SIZE(ardbeg_uart_devices));
#endif
tegra_uartd_device.dev.platform_data = &ardbeg_uartd_pdata;
if (!is_tegra_debug_uartport_hs()) {
int debug_port_id = uart_console_debug_init(3);
if (debug_port_id < 0)
return;
#ifdef CONFIG_TEGRA_FIQ_DEBUGGER
tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
#else
platform_device_register(uart_console_debug_device);
#endif
} else {
tegra_uartd_device.dev.platform_data = &ardbeg_uartd_pdata;
platform_device_register(&tegra_uartd_device);
}
}
static void __init roth_uart_init(void)
{
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs())
uart_debug_init();
platform_add_devices(roth_uart_devices,
ARRAY_SIZE(roth_uart_devices));
}
static void __init cardhu_uart_init(void)
{
struct clk *c;
int i;
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
if (IS_ERR_OR_NULL(c)) {
pr_err("Not able to get the clock for %s\n",
uart_parent_clk[i].name);
continue;
}
uart_parent_clk[i].parent_clk = c;
uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
}
cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
cardhu_loopback_uart_pdata.parent_clk_count =
ARRAY_SIZE(uart_parent_clk);
cardhu_loopback_uart_pdata.is_loopback = true;
tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
/* UARTE is used for loopback test purpose */
tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs()) {
if(!console_none_on_cmdline){
uart_debug_init();
printk("console_none_on_cmdline+uart_debug_init");
}
/* Clock enable for the debug channel */
if (!IS_ERR_OR_NULL(debug_uart_clk)) {
pr_info("The debug console clock name is %s\n",
debug_uart_clk->name);
c = tegra_get_clock_by_name("pll_p");
if (IS_ERR_OR_NULL(c))
pr_err("Not getting the parent clock pll_p\n");
else
clk_set_parent(debug_uart_clk, c);
clk_enable(debug_uart_clk);
clk_set_rate(debug_uart_clk, clk_get_rate(c));
} else {
pr_err("Not getting the clock %s for debug console\n",
debug_uart_clk->name);
}
}
platform_add_devices(cardhu_uart_devices,
ARRAY_SIZE(cardhu_uart_devices));
}
static void acer_dock_init(void)
{
tegra_gpio_enable(TEGRA_GPIO_PR0);
tegra_gpio_enable(TEGRA_GPIO_PR1);
tegra_gpio_enable(TEGRA_GPIO_PX6);
if (is_tegra_debug_uartport_hs()) {
platform_device_register(&dock_switch);
} else {
pr_info("UART DEBUG MESSAGE ON!!!\n");
}
}
int __init shuttle_uart_register_devices(void)
{
struct clk *c;
int i;
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
if (IS_ERR_OR_NULL(c)) {
pr_err("Not able to get the clock for %s\n",
uart_parent_clk[i].name);
continue;
}
uart_parent_clk[i].parent_clk = c;
uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
}
shuttle_uart_pdata.parent_clk_list = uart_parent_clk;
shuttle_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
tegra_uarta_device.dev.platform_data = &shuttle_uart_pdata;
tegra_uartb_device.dev.platform_data = &shuttle_uart_pdata;
tegra_uartc_device.dev.platform_data = &shuttle_uart_pdata;
tegra_uartd_device.dev.platform_data = &shuttle_uart_pdata;
tegra_uarte_device.dev.platform_data = &shuttle_uart_pdata;
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs()) {
uart_debug_init();
/* Clock enable for the debug channel */
if (!IS_ERR_OR_NULL(debug_uart_clk)) {
pr_info("The debug console clock name is %s\n",
debug_uart_clk->name);
c = tegra_get_clock_by_name("pll_p");
if (IS_ERR_OR_NULL(c))
pr_err("Not getting the parent clock pll_p\n");
else
clk_set_parent(debug_uart_clk, c);
clk_enable(debug_uart_clk);
clk_set_rate(debug_uart_clk, debug_uart_port_clk_rate);
} else {
pr_err("Not getting the clock %s for debug console\n",
debug_uart_clk->name);
}
}
return platform_add_devices(shuttle_uart_devices,
ARRAY_SIZE(shuttle_uart_devices));
}
static void __init cardhu_uart_init(void)
{
struct clk *c;
int i;
struct board_info board_info;
tegra_get_board_info(&board_info);
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
if (IS_ERR_OR_NULL(c)) {
pr_err("Not able to get the clock for %s\n",
uart_parent_clk[i].name);
continue;
}
uart_parent_clk[i].parent_clk = c;
uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
}
cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
cardhu_loopback_uart_pdata.parent_clk_count =
ARRAY_SIZE(uart_parent_clk);
cardhu_loopback_uart_pdata.is_loopback = true;
tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
/* UARTE is used for loopback test purpose */
tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs())
uart_debug_init();
#ifdef CONFIG_TEGRA_IRDA
if (((board_info.board_id == BOARD_E1186) ||
(board_info.board_id == BOARD_E1198)) &&
cardhu_irda_pdata.is_irda) {
cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
cardhu_irda_pdata.parent_clk_count =
ARRAY_SIZE(uart_parent_clk);
tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
}
#endif
platform_add_devices(cardhu_uart_devices,
ARRAY_SIZE(cardhu_uart_devices));
}
static void __init dalmore_uart_init(void)
{
int debug_port_id;
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs()) {
debug_port_id = uart_console_debug_init(3);
if (debug_port_id < 0)
return;
platform_device_register(uart_console_debug_device);
} else {
tegra_uartd_device.dev.platform_data = &dalmore_uartd_pdata;
platform_device_register(&tegra_uartd_device);
}
}
static void __init enterprise_uart_init(void)
{
int i;
struct clk *c;
for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
c = tegra_get_clock_by_name(uart_parent_clk[i].name);
if (IS_ERR_OR_NULL(c)) {
pr_err("Not able to get the clock for %s\n",
uart_parent_clk[i].name);
continue;
}
uart_parent_clk[i].parent_clk = c;
uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
}
enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
enterprise_loopback_uart_pdata.parent_clk_count =
ARRAY_SIZE(uart_parent_clk);
enterprise_loopback_uart_pdata.is_loopback = true;
#ifndef CONFIG_MODEM_ICERA_E450
modem_uart_pdata = enterprise_uart_pdata;
modem_uart_pdata.wake_peer = wake_modem;
modem_uart_pdata.sleep_ctrl = modem_sleep_control;
tegra_uarta_device.dev.platform_data = &modem_uart_pdata;
#else
tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
#endif
tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
/* UARTE is used for loopback test purpose */
tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs())
uart_debug_init();
platform_add_devices(enterprise_uart_devices,
ARRAY_SIZE(enterprise_uart_devices));
}
static void __init p1852_uart_init(void)
{
/* Register low speed only if it is selected */
if (!is_tegra_debug_uartport_hs()) {
uart_debug_init();
/* Clock enable for the debug channel */
if (!IS_ERR_OR_NULL(debug_uart_clk)) {
pr_info("The debug console clock name is %s\n",
debug_uart_clk->name);
clk_enable(debug_uart_clk);
clk_set_rate(debug_uart_clk, 408000000);
} else {
pr_err("Not getting the clock %s for debug console\n",
debug_uart_clk->name);
}
}
platform_add_devices(p1852_uart_devices,
ARRAY_SIZE(p1852_uart_devices));
}
static void __init loki_uart_init(void)
{
int debug_port_id;
#ifndef CONFIG_USE_OF
tegra_uarta_device.dev.platform_data = &loki_uarta_pdata;
tegra_uartb_device.dev.platform_data = &loki_uartb_pdata;
tegra_uartc_device.dev.platform_data = &loki_uartc_pdata;
platform_add_devices(loki_uart_devices,
ARRAY_SIZE(loki_uart_devices));
#endif
tegra_uartd_device.dev.platform_data = &loki_uartd_pdata;
if (!is_tegra_debug_uartport_hs()) {
debug_port_id = uart_console_debug_init(3);
if (debug_port_id < 0)
return;
platform_device_register(uart_console_debug_device);
} else {
tegra_uartd_device.dev.platform_data = &loki_uartd_pdata;
platform_device_register(&tegra_uartd_device);
}
}
static void __init tegra_ventana_init(void)
{
#if defined(CONFIG_TOUCHSCREEN_PANJIT_I2C) || \
defined(CONFIG_TOUCHSCREEN_ATMEL_MT_T9)
struct board_info BoardInfo;
#endif
tegra_common_init();
tegra_clk_init_from_table(ventana_clk_init_table);
ventana_pinmux_init();
ventana_i2c_init();
snprintf(usb_serial_num, sizeof(usb_serial_num), "%llx", tegra_chip_uid());
andusb_plat.serial_number = kstrdup(usb_serial_num, GFP_KERNEL);
tegra_i2s_device1.dev.platform_data = &tegra_audio_pdata[0];
tegra_i2s_device2.dev.platform_data = &tegra_audio_pdata[1];
tegra_spdif_device.dev.platform_data = &tegra_spdif_pdata;
if (is_tegra_debug_uartport_hs() == true)
platform_device_register(&tegra_uartd_device);
else
platform_device_register(&debug_uart);
tegra_das_device.dev.platform_data = &tegra_das_pdata;
tegra_ehci2_device.dev.platform_data
= &ventana_ehci2_ulpi_platform_data;
platform_add_devices(ventana_devices, ARRAY_SIZE(ventana_devices));
ventana_sdhci_init();
ventana_charge_init();
ventana_regulator_init();
#if defined(CONFIG_TOUCHSCREEN_PANJIT_I2C) || \
defined(CONFIG_TOUCHSCREEN_ATMEL_MT_T9)
tegra_get_board_info(&BoardInfo);
/* boards with sku > 0 have atmel touch panels */
if (BoardInfo.sku) {
pr_info("Initializing Atmel touch driver\n");
ventana_touch_init_atmel();
} else {
pr_info("Initializing Panjit touch driver\n");
ventana_touch_init_panjit();
}
#endif
#ifdef CONFIG_KEYBOARD_GPIO
ventana_keys_init();
#endif
#ifdef CONFIG_KEYBOARD_TEGRA
ventana_kbc_init();
#endif
ventana_wired_jack_init();
ventana_usb_init();
ventana_gps_init();
ventana_panel_init();
ventana_sensors_init();
ventana_bt_rfkill();
ventana_power_off_init();
ventana_emc_init();
#ifdef CONFIG_BT_BLUESLEEP
tegra_setup_bluesleep();
#endif
}
/**********************************************************
** Function: Headset driver init function
** Parameter: none
** Return value: none
**
************************************************************/
static int __init headset_init(void)
{
int ret;
printk(KERN_INFO "%s+ #####\n", __func__);
printk("HEADSET: Headset detection init\n");
console_disable = is_tegra_debug_uartport_hs();
project_info = tegra3_get_project_id();
hs_data = kzalloc(sizeof(struct headset_data), GFP_KERNEL);
if (!hs_data)
return -ENOMEM;
hs_data->debouncing_time = ktime_set(0, 100000000); /* 100 ms */
hs_data->sdev.name = "h2w";
hs_data->sdev.print_name = headset_name_show;
hs_data->sdev.print_state = headset_state_show;
hs_data->ldev.name = "lineout";
hs_data->ldev.print_name = lineout_name_show;
hs_data->ldev.print_state = lineout_state_show;
ret = switch_dev_register(&hs_data->sdev);
if (ret < 0)
goto err_switch_dev_register;
ret = switch_dev_register(&hs_data->ldev);
if (ret < 0)
goto err_switch_dev_register;
g_detection_work_queue = create_workqueue("detection");
hrtimer_init(&hs_data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
hs_data->timer.function = detect_event_timer_func;
printk("HEADSET: Headset detection mode\n");
btn_config_gpio();/*Config hook detection GPIO*/
if(project_info == TEGRA3_PROJECT_ME301T ||
project_info == TEGRA3_PROJECT_ME301TL ||
project_info == TEGRA3_PROJECT_ME570T)
switch_config_gpio(); /*Config uart and headphone switch*/
wake_lock_init(&hp_detect_wakelock, WAKE_LOCK_SUSPEND,
"headset detection");
INIT_WORK(&lineout_work, lineout_work_queue);
if (project_info == TEGRA3_PROJECT_ME301T ||
project_info == TEGRA3_PROJECT_ME301TL)
INIT_WORK(&hook_work, hook_work_queue);
switch (project_info) {
case TEGRA3_PROJECT_TF201:
case TEGRA3_PROJECT_TF300T:
case TEGRA3_PROJECT_TF300TG:
case TEGRA3_PROJECT_TF300TL:
case TEGRA3_PROJECT_TF500T:
case TEGRA3_PROJECT_TF700T:
hs_data->lineout_gpio = LINEOUT_GPIO;
lineout_config_gpio();
break;
case TEGRA3_PROJECT_ME301T:
hs_data->lineout_gpio = LINEOUT_ME301T;
lineout_config_no_dock();
break;
default:
hs_data->lineout_gpio = LINEOUT_GPIO;
lineout_config_gpio();
break;
}
jack_config_gpio();/*Config jack detection GPIO*/
printk(KERN_INFO "%s- #####\n", __func__);
return 0;
err_switch_dev_register:
printk(KERN_ERR "Headset: Failed to register driver\n");
return ret;
}
static void __init tegra_ventana_init(void)
{
#if defined(CONFIG_TOUCHSCREEN_PANJIT_I2C) || \
defined(CONFIG_TOUCHSCREEN_ATMEL_MT_T9)
struct board_info BoardInfo;
#endif
tegra_common_init();
tegra_clk_init_from_table(ventana_clk_init_table);
ventana_pinmux_init();
ventana_i2c_init();
snprintf(usb_serial_num, sizeof(usb_serial_num), "%llx", tegra_chip_uid());
andusb_plat.serial_number = kstrdup(usb_serial_num, GFP_KERNEL);
tegra_i2s_device1.dev.platform_data = &tegra_audio_pdata[0];
tegra_i2s_device2.dev.platform_data = &tegra_audio_pdata[1];
tegra_spdif_device.dev.platform_data = &tegra_spdif_pdata;
#ifdef CONFIG_BUILDTYPE_SHIP
if (console_set_none == 1)
{
tegra_pinmux_set_tristate(TEGRA_PINGROUP_IRRX,
TEGRA_TRI_TRISTATE);
tegra_pinmux_set_tristate(TEGRA_PINGROUP_IRTX,
TEGRA_TRI_TRISTATE);
}
else
{
if (is_tegra_debug_uartport_hs() == true)
platform_device_register(&tegra_uartd_device);
else
platform_device_register(&debug_uart);
}
#else
if (is_tegra_debug_uartport_hs() == true)
platform_device_register(&tegra_uartd_device);
else
platform_device_register(&debug_uart);
#endif
tegra_das_device.dev.platform_data = &tegra_das_pdata;
platform_add_devices(ventana_devices, ARRAY_SIZE(ventana_devices));
ventana_sdhci_init();
ventana_regulator_init();
#if defined(CONFIG_TOUCHSCREEN_PANJIT_I2C) || \
defined(CONFIG_TOUCHSCREEN_ATMEL_MT_T9)
tegra_get_board_info(&BoardInfo);
/* boards with sku > 0 have atmel touch panels */
/* if (BoardInfo.sku) {
pr_info("Initializing Atmel touch driver\n");
ventana_touch_init_atmel();
} else {
pr_info("Initializing Panjit touch driver\n");
ventana_touch_init_panjit();
}*/
#endif
#ifdef CONFIG_TOUCHSCREEN_ATMEL_mXT224
ventana_touch_init_atmel();
#endif
#ifdef CONFIG_ATA2538_CAPKEY
ventana_capkey_init();
#endif
#ifdef CONFIG_TEGRA_KEYPAD
tegra_keypad_init();
#endif
#ifdef CONFIG_KEYBOARD_GPIO
#endif
#ifdef CONFIG_KEYBOARD_TEGRA
#endif
ventana_datacards_init();
ventana_usb_init();
ventana_gps_init();
ventana_panel_init();
ventana_sensors_init();
ventana_bt_rfkill();
ventana_power_off_init();
tegra_setup_bluesleep();
}
