static void l2x0pmu_write_counter(int idx, u32 val)
{
/*
* L2X0 counters can only be written to when they are disabled.
* As perf core does not disable counters before writing to them
* under interrupts, we must do so here.
*/
u32 cfg = l2x0pmu_disable_counter(idx);
writel_relaxed(val, COUNTER_ADDR(idx));
l2x0pmu_write_cfg(cfg, idx);
}
static void l2x0pmu_write_counter(int idx, u32 val)
{
/*
*/
u32 cfg = l2x0pmu_disable_counter(idx);
writel_relaxed(val, COUNTER_ADDR(idx));
l2x0pmu_write_cfg(cfg, idx);
}
static u32 l2x0pmu_disable_counter(int idx)
{
u32 cfg, oldcfg;
cfg = oldcfg = l2x0pmu_read_cfg(idx);
cfg &= ~L2X0_EVENT_CNT_CFG_MASK;
cfg &= ~L2X0_EVENT_CNT_CFG_INTR_MASK;
l2x0pmu_write_cfg(cfg, idx);
return oldcfg;
}
static void l2x0pmu_enable_counter(u32 cfg, int idx)
{
cfg |= L2X0_EVENT_CNT_CFG_INTR_OVERFLOW;
l2x0pmu_write_cfg(cfg, idx);
}