static int ea8061_gamma_ctrl(struct ea8061 *lcd, int brightness)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
#ifdef CONFIG_BACKLIGHT_SMART_DIMMING
unsigned int gamma;
unsigned char gamma_set[GAMMA_TABLE_COUNT] = {0,};
gamma = convert_brightness_to_gamma(brightness);
gamma_set[0] = 0xfa;
gamma_set[1] = 0x01;
calc_gamma_table(&lcd->smart_dim, gamma, gamma_set + 2);
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)gamma_set,
GAMMA_TABLE_COUNT);
#else
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)ea8061_gamma22_table[brightness],
GAMMA_TABLE_COUNT);
#endif
/* update gamma table. */
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_SHORT_WRITE_PARAM,
0xf7, 0x03);
ea8061_acl_on(lcd);
return 0;
}
static void s6e8aa0_elvss_nvm_set(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send[] = {
0xd9, 0x14, 0x40, 0x0c, 0xcb, 0xce, 0x6e, 0xc4, 0x0f,
0x40, 0x41, 0xd9, 0x00, 0x60, 0x19
};
/* FIXME: !! need to change brightness and elvss */
if (lcd->ver == VER_32) {
data_to_send[8] = 0x07;
data_to_send[11] = 0xc1;
} else {
switch (lcd->brightness) {
case 0 ... 6: /* 30cd ~ 100cd */
data_to_send[11] = 0xdf;
break;
case 7 ... 11: /* 120cd ~ 150cd */
data_to_send[11] = 0xdd;
break;
case 12 ... 15: /* 180cd ~ 210cd */
data_to_send[11] = 0xd9;
break;
case 16 ... 24: /* 240cd ~ 300cd */
data_to_send[11] = 0xd0;
break;
default:
break;
}
}
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void ea8061_sleep_out(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00);
}
void s6e8aa0_update_panel_cond(int high_freq)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd_global);
const unsigned char *data;
unsigned int size;
const unsigned char data_to_send_60fps[] = {
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1,
0xff, 0xff, 0xc8
};
const unsigned char data_to_send_40fps[] = {
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
0x7e, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x0a, 0x0a,
0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1,
0xff, 0xff, 0xc8
};
if (high_freq) {
data = data_to_send_60fps;
size = ARRAY_SIZE(data_to_send_60fps);
} else {
data = data_to_send_40fps;
size = ARRAY_SIZE(data_to_send_40fps);
}
ops->cmd_write(lcd_to_master(lcd_global), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data, size);
}
static void ea8061_display_off(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE, 0x28, 0x00);
}
static void s6e8aa0_display_on(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00);
}
static int ea8061_set_power(struct lcd_device *ld, int power)
{
struct ea8061 *lcd = lcd_get_data(ld);
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
int ret = 0;
if (power != FB_BLANK_UNBLANK && power != FB_BLANK_POWERDOWN &&
power != FB_BLANK_NORMAL) {
dev_err(lcd->dev, "power value should be 0, 1 or 4.\n");
return -EINVAL;
}
if (lcd->power == power) {
dev_err(lcd->dev, "power mode is same as previous one.\n");
return -EINVAL;
}
if (ops->set_blank_mode) {
ret = ops->set_blank_mode(lcd_to_master(lcd), power);
if (!ret && lcd->power != power)
lcd->power = power;
}
return ret;
}
static int ea8061_read_reg(struct ea8061 *lcd, unsigned int addr, char *buf)
{
unsigned char data[MAX_READ_LENGTH];
unsigned int size;
int i;
int pos = 0;
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
memset(data, 0x0, ARRAY_SIZE(data));
size = ops->cmd_read(lcd_to_master(lcd),
MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM,
addr, MAX_READ_LENGTH, data);
if (!size) {
dev_err(lcd->dev, "failed to read 0x%.2x register.\n", addr);
return size;
}
pos += sprintf(buf, "0x%.2x, ", addr);
for (i = 1; i < size+1; i++) {
if (i % 9 == 0)
pos += sprintf(buf+pos, "\n");
pos += sprintf(buf+pos, "0x%.2x, ", data[i-1]);
}
pos += sprintf(buf+pos, "\n");
return pos;
}
static void ea8061_disp_cond(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x36, 0x02);
}
static void ea8061_acl_off(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
/* FIXME: off, 33%, 40%, 50% */
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x55, 0x00);
}
static void ea8061_read_id(struct ea8061 *lcd, u8 *mtp_id)
{
unsigned int ret;
unsigned int addr = 0xD1; /* MTP ID */
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ret = ops->cmd_read(lcd_to_master(lcd),
MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM,
addr, 3, mtp_id);
}
static void ea8061_disable_mtp_register(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
const unsigned char data_to_send[] = {
0xF1, 0xA5, 0xA5
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8aa0_apply_level_1_key(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
const unsigned char data_to_send[] = {
0xf0, 0x5a, 0x5a
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void ea8061_apply_level_2_key(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
const unsigned char data_to_send[] = {
0xFC, 0x5A, 0x5A
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void ea8061_slew_ctl(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send[] = {
0xB4, 0x33, 0x0D, 0x00
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8aa0_etc_mipi_control4(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
const unsigned char data_to_send[] = {
0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8aa0_display_condition_set(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
const unsigned char data_to_send[] = {
0xf2, 0x80, 0x03, 0x0d
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8aa0_etc_power_control(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send[] = {
0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
};
if (lcd->ver == VER_32)
data_to_send[3] = 0x15;
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void ea8061_elvss_nvm_set(struct ea8061 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send[] = {
0xB2, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0C, 0x0D,
0x0E, 0x0F, 0x10, 0x11, 0x0B, 0x0C, 0x0E, 0x10, 0x12,
0x13, 0x15, 0x17, 0x18, 0x1A, 0x1A, 0x1B, 0x1B, 0x1B,
0x1C, 0x1C, 0x1C, 0xB4, 0xA0, 0x00, 0x00, 0x00, 0x00
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8aa0_etc_elvss_control(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send[] = {
0xb1, 0x04, 0x00
};
if (lcd->id == 0x00)
data_to_send[2] = 0x95;
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static int ea8061_write_reg(struct ea8061 *lcd, char *name)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
const struct firmware *fw;
char fw_path[MAX_STR+1];
int ret = 0;
mutex_lock(&lcd->lock);
snprintf(fw_path, MAX_STR, LDI_FW_PATH, name);
ret = request_firmware(&fw, fw_path, lcd->dev);
if (ret) {
dev_err(lcd->dev, "failed to request firmware.\n");
mutex_unlock(&lcd->lock);
return ret;
}
if (fw->size == 1)
ret = ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE,
(unsigned int)fw->data[0], 0);
else if (fw->size == 2)
ret = ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE_PARAM,
(unsigned int)fw->data[0], fw->data[1]);
else
ret = ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)fw->data, fw->size);
if (ret)
dev_err(lcd->dev, "failed to write 0x%.2x register and %d error.\n",
fw->data[0], ret);
release_firmware(fw);
mutex_unlock(&lcd->lock);
return ret;
}
static void s6e8aa0_etc_pentile_control(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send[] = {
0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
0x00
};
if (lcd->ver == VER_32 || lcd->ver == VER_96)
data_to_send[5] = 0xc0;
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static void ea8061_panel_cond(struct ea8061 *lcd, int high_freq)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
const unsigned char data_to_send[] = {
0xc4, 0x4E, 0xBD, 0x00, 0x00, 0x58, 0xA7, 0x0B, 0x34,
0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x92, 0x0B, 0x92,
0x08, 0x08, 0x07, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00,
0x00, 0x00, 0x02, 0x04, 0x04
};
/* ToDo : Low requency control */
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
}
static unsigned int ea8061_read_mtp(struct ea8061 *lcd, u8 *mtp_data)
{
unsigned int ret;
unsigned int addr = 0xD3; /* MTP addr */
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ea8061_enable_mtp_register(lcd);
ret = ops->cmd_read(lcd_to_master(lcd),
MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM,
addr, LDI_MTP_LENGTH, mtp_data);
ea8061_disable_mtp_register(lcd);
return ret;
}
static void s6e8aa0_panel_cond(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send_v42[] = {
0xf8, 0x01, 0x34, 0x00, 0x00, 0x00, 0x95, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x00, 0x00, 0x10, 0x00, 0x00, 0x20,
0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x63, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc8,
0xc1, 0xd3, 0x01
};
unsigned char data_to_send_v142[] = {
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1,
0xff, 0xff, 0xc8
};
unsigned char data_to_send_v32[] = {
0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x94, 0x00, 0x3c,
0x7d, 0x10, 0x27, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
0x23, 0x6e, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc3,
0xf6, 0xf6, 0xc1
};
unsigned char *data_to_send;
unsigned int size;
if (lcd->ver == VER_42) {
data_to_send = data_to_send_v42;
size = ARRAY_SIZE(data_to_send_v42);
} else if (lcd->ver == VER_142) {
data_to_send_v142[18] = s6e8aa0_apply_aid_panel_cond(lcd->aid);
data_to_send = data_to_send_v142;
size = ARRAY_SIZE(data_to_send_v142);
} else if (lcd->ver == VER_32) {
data_to_send = data_to_send_v32;
size = ARRAY_SIZE(data_to_send_v32);
} else
return;
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, size);
}
void s6e8aa0_panel_cond(int high_freq)
{
struct s6e8aa0 *lcd = lcd_global;
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send_v42[] = {
0xf8, 0x01, 0x34, 0x00, 0x00, 0x00, 0x95, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x00, 0x00, 0x10, 0x00, 0x00, 0x20,
0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x63, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc8,
0xc1, 0xd3, 0x01
};
/* same with v174(0xae) panel */
unsigned char data_to_send_v142[] = {
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1,
0xff, 0xff, 0xc8
};
unsigned char data_to_send_v32[] = {
0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x94, 0x00, 0x3c,
0x7d, 0x10, 0x27, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
0x23, 0x6e, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc3,
0xf6, 0xf6, 0xc1
};
unsigned char data_to_send_v210[] = {
0xf8, 0x3d, 0x32, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x39,
0x78, 0x08, 0x26, 0x78, 0x3c, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x69, 0x00, 0x00, 0x00, 0x02, 0x07, 0x07,
0x21, 0x21, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1,
0xff, 0xff, 0xc8
};
unsigned char *data_to_send;
unsigned int size;
if (lcd->ver == VER_42) {
data_to_send = data_to_send_v42;
size = ARRAY_SIZE(data_to_send_v42);
} else if (lcd->ver == VER_142 || lcd->ver == VER_174) {
data_to_send_v142[18] = s6e8aa0_apply_aid_panel_cond(lcd->aid);
data_to_send = data_to_send_v142;
size = ARRAY_SIZE(data_to_send_v142);
} else if (lcd->ver == VER_32) {
data_to_send = data_to_send_v32;
size = ARRAY_SIZE(data_to_send_v32);
} else if (lcd->ver == VER_210) {
data_to_send = data_to_send_v210;
size = ARRAY_SIZE(data_to_send_v210);
} else
return;
if (!high_freq) {
data_to_send[9] = 0x7e;
data_to_send[25] = 0x0a;
data_to_send[26] = 0x0a;
}
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, size);
}
static void s6e8aa0_panel_cond(struct s6e8aa0 *lcd, int high_freq)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
unsigned char data_to_send_v42[] = {
0xf8, 0x01, 0x34, 0x00, 0x00, 0x00, 0x95, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x00, 0x00, 0x10, 0x00, 0x00, 0x20,
0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x63, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc8,
0xc1, 0xd3, 0x01
};
/* same with v174(0xae) panel */
unsigned char data_to_send_v142[] = {
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1,
0xff, 0xff, 0xc8
};
unsigned char data_to_send_v32[] = {
0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x94, 0x00, 0x3c,
0x7d, 0x10, 0x27, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
0x23, 0x6e, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc3,
0xf6, 0xf6, 0xc1
};
unsigned char data_to_send_v96[] = {
0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x94, 0x00, 0x3c,
0x7d, 0x10, 0x27, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
0x23, 0x37, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc3,
0xf6, 0xf6, 0xc1
};
unsigned char data_to_send_v210[] = {
0xf8, 0x3d, 0x32, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x39,
0x78, 0x08, 0x26, 0x78, 0x3c, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x69, 0x00, 0x00, 0x00, 0x02, 0x07, 0x07,
0x21, 0x21, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1,
0xff, 0xff, 0xc8
};
unsigned char *data_to_send;
unsigned int size;
struct lcd_property *property = lcd->property;
unsigned char cfg;
if (lcd->ver == VER_42) {
data_to_send = data_to_send_v42;
size = ARRAY_SIZE(data_to_send_v42);
} else if (lcd->ver == VER_142) {
data_to_send_v142[18] = s6e8aa0_apply_aid_panel_cond(lcd->aid);
data_to_send = data_to_send_v142;
if (property) {
if (property->flip & LCD_PROPERTY_FLIP_VERTICAL) {
/* GTCON */
cfg = data_to_send[1];
cfg &= ~(PANELCTL_GTCON_MASK);
cfg |= (PANELCTL_GTCON_110);
data_to_send[1] = cfg;
}
if (property->flip & LCD_PROPERTY_FLIP_HORIZONTAL) {
/* SS */
cfg = data_to_send[1];
cfg &= ~(PANELCTL_SS_MASK);
cfg |= (PANELCTL_SS_1_800);
data_to_send[1] = cfg;
}
if (property->flip & (LCD_PROPERTY_FLIP_VERTICAL |
LCD_PROPERTY_FLIP_HORIZONTAL)) {
/* CLK1,2_CON */
cfg = data_to_send[30];
cfg &= ~(PANELCTL_CLK1_CON_MASK |
PANELCTL_CLK2_CON_MASK);
cfg |= (PANELCTL_CLK1_000 | PANELCTL_CLK2_001);
data_to_send[30] = cfg;
/* INT1,2_CON */
cfg = data_to_send[31];
cfg &= ~(PANELCTL_INT1_CON_MASK |
PANELCTL_INT2_CON_MASK);
cfg |= (PANELCTL_INT1_000 | PANELCTL_INT2_001);
data_to_send[31] = cfg;
/* BICTL,B_CON */
cfg = data_to_send[32];
cfg &= ~(PANELCTL_BICTL_CON_MASK |
PANELCTL_BICTLB_CON_MASK);
cfg |= (PANELCTL_BICTL_000 |
PANELCTL_BICTLB_001);
data_to_send[32] = cfg;
/* EM_CLK1,1B_CON */
cfg = data_to_send[36];
cfg &= ~(PANELCTL_EM_CLK1_CON_MASK |
PANELCTL_EM_CLK1B_CON_MASK);
cfg |= (PANELCTL_EM_CLK1_110 |
PANELCTL_EM_CLK1B_110);
data_to_send[36] = cfg;
/* EM_CLK2,2B_CON */
cfg = data_to_send[37];
cfg &= ~(PANELCTL_EM_CLK2_CON_MASK |
PANELCTL_EM_CLK2B_CON_MASK);
cfg |= (PANELCTL_EM_CLK2_110 |
PANELCTL_EM_CLK2B_110);
data_to_send[37] = cfg;
/* EM_INT1,2_CON */
cfg = data_to_send[38];
cfg &= ~(PANELCTL_EM_INT1_CON_MASK |
PANELCTL_EM_INT2_CON_MASK);
cfg |= (PANELCTL_EM_INT1_000 |
PANELCTL_EM_INT2_001);
data_to_send[38] = cfg;
}
}
size = ARRAY_SIZE(data_to_send_v142);
} else if (lcd->ver == VER_174) {
data_to_send_v142[18] = s6e8aa0_apply_aid_panel_cond(lcd->aid);
data_to_send = data_to_send_v142;
size = ARRAY_SIZE(data_to_send_v142);
} else if (lcd->ver == VER_32) {
data_to_send = data_to_send_v32;
size = ARRAY_SIZE(data_to_send_v32);
} else if (lcd->ver == VER_96) {
data_to_send = data_to_send_v96;
size = ARRAY_SIZE(data_to_send_v96);
} else if (lcd->ver == VER_210) {
data_to_send = data_to_send_v210;
size = ARRAY_SIZE(data_to_send_v210);
} else
return;
if (!high_freq) {
data_to_send[9] = 0x7e;
data_to_send[25] = 0x0a;
data_to_send[26] = 0x0a;
}
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, size);
}
static void s6e8aa0_etc_mipi_control3(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xe3, 0x40);
}
static void s6e8aa0_acl_off(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xc0, 0x00);
}
static void s6e8aa0_acl_ctrl_set(struct s6e8aa0 *lcd)
{
struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
struct backlight_device *bd = lcd->bd;
int brightness = bd->props.brightness;
/* FIXME: !! must be review acl % value */
/* Full white 50% reducing setting */
const unsigned char cutoff_50[] = {
0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
0x00, 0x00, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x08, 0x0f, 0x16, 0x1d, 0x24, 0x2a, 0x31, 0x38,
0x3f, 0x46
};
/* Full white 45% reducing setting */
const unsigned char cutoff_45[] = {
0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
0x00, 0x00, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x07, 0x0d, 0x13, 0x19, 0x1f, 0x25, 0x2b, 0x31,
0x37, 0x3d
};
/* Full white 40% reducing setting */
const unsigned char cutoff_40[] = {
0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
0x00, 0x00, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x06, 0x0c, 0x11, 0x16, 0x1c, 0x21, 0x26, 0x2b,
0x31, 0x36
};
if (lcd->acl_enable) {
if (lcd->cur_acl == 0) {
if (brightness == 0 || brightness == 1) {
s6e8aa0_acl_off(lcd);
dev_dbg(&lcd->ld->dev,
"cur_acl=%d\n", lcd->cur_acl);
} else
s6e8aa0_acl_on(lcd);
}
switch (brightness) {
case 0 ... 1: /* 30cd */
s6e8aa0_acl_off(lcd);
lcd->cur_acl = 0;
break;
case 2 ... 6: /* 50cd ~ 100cd */
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)cutoff_40,
ARRAY_SIZE(cutoff_40));
lcd->cur_acl = 40;
break;
case 7 ... 16: /* 120cd ~ 210cd */
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)cutoff_45,
ARRAY_SIZE(cutoff_45));
lcd->cur_acl = 45;
break;
case 17 ... 24: /* 220cd ~ 300cd */
ops->cmd_write(lcd_to_master(lcd),
MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)cutoff_50,
ARRAY_SIZE(cutoff_50));
lcd->cur_acl = 50;
break;
default:
break;
}
} else {
