void __init loadmmu(void)
{
switch(mips_cputype) {
#ifdef CONFIG_CPU_R3000
case CPU_R2000:
case CPU_R3000:
case CPU_R3000A:
case CPU_R3081E:
printk("Loading R[23]00 MMU routines.\n");
ld_mmu_r2300();
break;
#endif
#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_R4300) || \
defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_NEVADA)
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
case CPU_R4200:
case CPU_R4300:
case CPU_R4400PC:
case CPU_R4400SC:
case CPU_R4400MC:
case CPU_R4600:
case CPU_R4640:
case CPU_R4650:
case CPU_R4700:
case CPU_R5000:
case CPU_R5000A:
case CPU_NEVADA:
printk("Loading R4000 MMU routines.\n");
ld_mmu_r4xx0();
break;
#endif
#ifdef CONFIG_CPU_R10000
case CPU_R10000:
printk("Loading R10000 MMU routines.\n");
ld_mmu_andes();
break;
#endif
default:
/* XXX We need an generic routine in the MIPS port
* XXX to jabber stuff onto the screen on all machines
* XXX before the console is setup. The ARCS prom
* XXX routines look good for this, but only the SGI
* XXX code has a full library for that at this time.
*/
panic("Yeee, unsupported mmu/cache architecture.");
}
}
void __init loadmmu(void)
{
if (mips_cpu.options & MIPS_CPU_4KTLB) {
#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
defined(CONFIG_CPU_NEVADA)
ld_mmu_r4xx0();
r4k_tlb_init();
#endif
#if defined(CONFIG_CPU_RM7000)
ld_mmu_rm7k();
r4k_tlb_init();
#endif
#if defined(CONFIG_CPU_R5432) || defined(CONFIG_CPU_R5500)
ld_mmu_r5432();
r4k_tlb_init();
#endif
#if defined(CONFIG_CPU_TX49XX)
ld_mmu_tx49();
r4k_tlb_init();
#endif
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
ld_mmu_mips32();
r4k_tlb_init();
#endif
} else switch(mips_cpu.cputype) {
#ifdef CONFIG_CPU_R3000
case CPU_R2000:
case CPU_R3000:
case CPU_R3000A:
case CPU_R3081E:
ld_mmu_r23000();
r3k_tlb_init();
break;
case CPU_TX3912:
case CPU_TX3922:
case CPU_TX3927:
case CPU_TX39XX:
ld_mmu_tx39();
r3k_tlb_init();
break;
#endif
#ifdef CONFIG_CPU_TX39XX
case CPU_TX3912:
case CPU_TX3922:
case CPU_TX3927:
case CPU_TX39XX:
ld_mmu_tx39();
r3k_tlb_init();
break;
#endif
#ifdef CONFIG_CPU_R10000
case CPU_R10000:
ld_mmu_andes();
r4k_tlb_init();
break;
#endif
#ifdef CONFIG_CPU_SB1
case CPU_SB1:
ld_mmu_sb1();
sb1_tlb_init();
break;
#endif
default:
panic("Yeee, unsupported mmu/cache architecture.");
}
}
